JP2004104776A5 - - Google Patents

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Publication number
JP2004104776A5
JP2004104776A5 JP2003297026A JP2003297026A JP2004104776A5 JP 2004104776 A5 JP2004104776 A5 JP 2004104776A5 JP 2003297026 A JP2003297026 A JP 2003297026A JP 2003297026 A JP2003297026 A JP 2003297026A JP 2004104776 A5 JP2004104776 A5 JP 2004104776A5
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Japan
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JP2003297026A
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English (en)
Japanese (ja)
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JP2004104776A (ja
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Priority claimed from EP02292244A external-priority patent/EP1401108A1/en
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Publication of JP2004104776A publication Critical patent/JP2004104776A/ja
Publication of JP2004104776A5 publication Critical patent/JP2004104776A5/ja
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JP2003297026A 2002-09-12 2003-08-21 電子装置 Pending JP2004104776A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP02292244A EP1401108A1 (en) 2002-09-12 2002-09-12 Electronic device avoiding write access conflicts in interleaving, in particular optimized concurrent interleaving architecture for high throughput turbo-decoding

Publications (2)

Publication Number Publication Date
JP2004104776A JP2004104776A (ja) 2004-04-02
JP2004104776A5 true JP2004104776A5 (enExample) 2006-08-17

Family

ID=31896984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003297026A Pending JP2004104776A (ja) 2002-09-12 2003-08-21 電子装置

Country Status (3)

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US (2) US6901492B2 (enExample)
EP (1) EP1401108A1 (enExample)
JP (1) JP2004104776A (enExample)

Families Citing this family (26)

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US7035932B1 (en) * 2000-10-27 2006-04-25 Eric Morgan Dowling Federated multiprotocol communication
US7305593B2 (en) * 2003-08-26 2007-12-04 Lsi Corporation Memory mapping for parallel turbo decoding
KR20060011249A (ko) * 2004-07-29 2006-02-03 삼성전자주식회사 블록 인터리빙을 사용하는 이동통신 시스템에서디인터리빙 버퍼 운용 방법 및 그 장치
KR100568976B1 (ko) * 2004-12-14 2006-04-07 한국전자통신연구원 임시 네트워크에서의 비콘 프레임 전송 방법
KR100912156B1 (ko) * 2005-02-03 2009-08-14 파나소닉 주식회사 병렬 인터리버, 병렬 디인터리버 및 인터리브 방법
FR2888349A1 (fr) * 2005-07-06 2007-01-12 St Microelectronics Sa Adaptation de debit binaire dans un flot de traitement de donnees
US7409606B2 (en) * 2005-08-31 2008-08-05 Motorola, Inc. Method and system for interleaving in a parallel turbo decoder
EP1786109A1 (en) * 2005-11-15 2007-05-16 STMicroelectronics N.V. Block encoding and decoding method and apparatus, with controllable decoding latency
JP4692751B2 (ja) * 2005-11-28 2011-06-01 日本電気株式会社 ターボ復号器及びそれを備えた通信システム
US8122315B2 (en) * 2005-12-01 2012-02-21 Electronics And Telecommunications Research Institute LDPC decoding apparatus and method using type-classified index
US7783936B1 (en) 2006-09-28 2010-08-24 L-3 Communications, Corp. Memory arbitration technique for turbo decoding
GB2443866B (en) * 2006-11-15 2009-08-26 Motorola Inc Interleaver for use in turbo coding
US20110066821A1 (en) * 2008-05-21 2011-03-17 Nxp B.V. data handling system comprising a rearrangement network
CN102037652A (zh) * 2008-05-21 2011-04-27 Nxp股份有限公司 包括存储器组的数据处理系统和数据重排
US20110087949A1 (en) * 2008-06-09 2011-04-14 Nxp B.V. Reconfigurable turbo interleavers for multiple standards
US8179731B2 (en) * 2009-03-27 2012-05-15 Analog Devices, Inc. Storage devices with soft processing
US8707002B2 (en) * 2009-06-09 2014-04-22 Canon Kabushiki Kaisha Control apparatus
KR101397275B1 (ko) * 2009-07-30 2014-05-20 짐 디. 그레이 앤드 어소시에이츠, 아이엔시. 안테나 시스템과 안테나용 커넥터
US20110202819A1 (en) * 2010-02-12 2011-08-18 Yuan Lin Configurable Error Correction Encoding and Decoding
US8879670B2 (en) * 2010-09-08 2014-11-04 Agence Spatiale Europeenne Flexible channel decoder
US8621160B2 (en) 2010-12-17 2013-12-31 Futurewei Technologies, Inc. System and method for contention-free memory access
US9436558B1 (en) * 2010-12-21 2016-09-06 Acronis International Gmbh System and method for fast backup and restoring using sorted hashes
KR20140140252A (ko) * 2013-05-29 2014-12-09 한국전자통신연구원 인터리빙 및 디인터리빙을 위한 메모리 엑세스 장치 및 그 방법
US9411684B2 (en) * 2014-03-18 2016-08-09 Micron Technology, Inc. Low density parity check circuit
US9467252B2 (en) 2014-11-26 2016-10-11 Freescale Semiconductor, Inc. Turbo decoders with extrinsic addressing and associated methods
TWI835417B (zh) * 2022-11-23 2024-03-11 瑞昱半導體股份有限公司 電子裝置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5761695A (en) * 1995-09-19 1998-06-02 Hitachi, Ltd. Cache memory control method and apparatus, and method and apparatus for controlling memory capable of interleave control
US6425057B1 (en) * 1998-08-27 2002-07-23 Hewlett-Packard Company Caching protocol method and system based on request frequency and relative storage duration
US6651141B2 (en) * 2000-12-29 2003-11-18 Intel Corporation System and method for populating cache servers with popular media contents
TWI260171B (en) * 2001-04-16 2006-08-11 Interdigital Tech Corp Physical layer processing for a wireless communication system using code division multiple access
US20030110357A1 (en) * 2001-11-14 2003-06-12 Nguyen Phillip V. Weight based disk cache replacement method

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