JP2003526221A - Ｂｇａパッケージのためのバイパス減結合が改良されたプリント回路基板アセンブリ - Google Patents

Ｂｇａパッケージのためのバイパス減結合が改良されたプリント回路基板アセンブリ

Info

Publication number
JP2003526221A
JP2003526221A JP2001565717A JP2001565717A JP2003526221A JP 2003526221 A JP2003526221 A JP 2003526221A JP 2001565717 A JP2001565717 A JP 2001565717A JP 2001565717 A JP2001565717 A JP 2001565717A JP 2003526221 A JP2003526221 A JP 2003526221A
Authority
JP
Japan
Prior art keywords
capacitor
bga
pcb
circuit board
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001565717A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003526221A5 (enExample
Inventor
ドレイク，マイケル
トレスラー，クリス
ゲレロ，エドワード
シェリング，グレッグ
ベネット，ジョン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JP2003526221A publication Critical patent/JP2003526221A/ja
Publication of JP2003526221A5 publication Critical patent/JP2003526221A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10515—Stacked components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
JP2001565717A 2000-03-03 2000-11-21 Ｂｇａパッケージのためのバイパス減結合が改良されたプリント回路基板アセンブリ Pending JP2003526221A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/518,491 2000-03-03
US09/518,491 US6404649B1 (en) 2000-03-03 2000-03-03 Printed circuit board assembly with improved bypass decoupling for BGA packages
PCT/US2000/031960 WO2001067833A1 (en) 2000-03-03 2000-11-21 A printed circuit board assembly with improved bypass decoupling for bga packages

Publications (2)

Publication Number Publication Date
JP2003526221A true JP2003526221A (ja) 2003-09-02
JP2003526221A5 JP2003526221A5 (enExample) 2007-12-06

Family

ID=24064157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001565717A Pending JP2003526221A (ja) 2000-03-03 2000-11-21 Ｂｇａパッケージのためのバイパス減結合が改良されたプリント回路基板アセンブリ

Country Status (7)

Country Link
US (1) US6404649B1 (enExample)
EP (1) EP1260121B1 (enExample)
JP (1) JP2003526221A (enExample)
KR (1) KR100747130B1 (enExample)
CN (1) CN1204793C (enExample)
DE (1) DE60029011T2 (enExample)
WO (1) WO2001067833A1 (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
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US7247932B1 (en) * 2000-05-19 2007-07-24 Megica Corporation Chip package with capacitor
TW502492B (en) * 2000-05-30 2002-09-11 Alps Electric Co Ltd Electronic circuit unit
US6900991B2 (en) * 2001-12-03 2005-05-31 Intel Corporation Electronic assembly with sandwiched capacitors and methods of manufacture
US20040000704A1 (en) * 2002-07-01 2004-01-01 George Tsao Process for grid array assembly and electronic device made thereby
US7005736B2 (en) * 2002-09-30 2006-02-28 Intel Corporation Semiconductor device power interconnect striping
US20040125580A1 (en) * 2002-12-31 2004-07-01 Intel Corporation Mounting capacitors under ball grid array
US7153723B1 (en) 2003-12-04 2006-12-26 Emc Corporation Method of forming a ball grid array device
US7235875B2 (en) * 2004-12-09 2007-06-26 International Business Machines Corporation Modular heat sink decoupling capacitor array forming heat sink fins and power distribution interposer module
KR100714625B1 (ko) * 2005-10-18 2007-05-07 삼성전기주식회사 박막 캐패시터 내장형 인쇄회로기판의 제조방법
US7622325B2 (en) * 2005-10-29 2009-11-24 Stats Chippac Ltd. Integrated circuit package system including high-density small footprint system-in-package
US8222079B2 (en) * 2007-09-28 2012-07-17 International Business Machines Corporation Semiconductor device and method of making semiconductor device
US7872483B2 (en) 2007-12-12 2011-01-18 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US9607935B2 (en) 2009-04-21 2017-03-28 Ati Technologies Ulc Semiconductor chip package with undermount passive devices
US8289727B2 (en) * 2010-06-11 2012-10-16 Taiwan Semiconductor Manufacturing Company, Ltd. Package substrate
US8631706B2 (en) 2010-07-21 2014-01-21 International Business Machines Corporation Noise suppressor for semiconductor packages
US9510448B2 (en) 2014-08-29 2016-11-29 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Maximizing surface area of surface mount contact pads of circuit board also having via contact pads
US9769926B2 (en) * 2015-04-23 2017-09-19 Dell Products L.P. Breakout via system
US11495588B2 (en) 2018-12-07 2022-11-08 Advanced Micro Devices, Inc. Circuit board with compact passive component arrangement

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63157919U (enExample) * 1987-04-01 1988-10-17
JPH09130031A (ja) * 1995-10-27 1997-05-16 Hitachi Ltd 電子部品の実装方法
JPH10163263A (ja) * 1996-11-29 1998-06-19 Nec Corp マルチチップモジュールの実装構造
JPH11121899A (ja) * 1997-10-20 1999-04-30 Fuji Xerox Co Ltd 電子部品実装体および電子部品の実装方法
JPH11260999A (ja) * 1998-03-13 1999-09-24 Sumitomo Metal Ind Ltd ノイズを低減した積層半導体装置モジュール
JP2001203435A (ja) * 2000-01-21 2001-07-27 Ibiden Co Ltd ボールグリッドアレイ型パッケージの接続構造

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US4734818A (en) * 1985-01-22 1988-03-29 Rogers Corporation Decoupling capacitor for surface mounted leadless chip carriers, surface mounted leaded chip carriers and Pin Grid Array packages
GB2176654B (en) 1985-06-11 1988-08-10 Avx Corp Method for optimising the decoupling of integrated circuit devices
US4779164A (en) * 1986-12-12 1988-10-18 Menzies Jr L William Surface mounted decoupling capacitor
US4853826A (en) * 1988-08-01 1989-08-01 Rogers Corporation Low inductance decoupling capacitor
US5010447A (en) * 1988-12-28 1991-04-23 Texas Instruments Incorporated Divided capacitor mounting pads
US4885841A (en) * 1989-02-21 1989-12-12 Micron Technology, Inc. Vibrational method of aligning the leads of surface-mount electronic components with the mounting pads of printed circuit boards during the molten solder mounting process
US5272590A (en) * 1990-02-12 1993-12-21 Hernandez Jorge M Integrated circuit package having an internal cavity for incorporating decoupling capacitor
US5309324A (en) * 1991-11-26 1994-05-03 Herandez Jorge M Device for interconnecting integrated circuit packages to circuit boards
KR0134648B1 (ko) * 1994-06-09 1998-04-20 김광호 노이즈가 적은 적층 멀티칩 패키지
JPH0982557A (ja) 1995-09-18 1997-03-28 Canon Inc バイパスコンデンサ
JPH09102432A (ja) 1995-10-05 1997-04-15 Canon Inc バイパスコンデンサ及びその形成方法
JPH09223861A (ja) 1996-02-19 1997-08-26 Canon Inc 半導体集積回路及びプリント配線基板
US5654676A (en) * 1996-06-10 1997-08-05 Motorola, Inc. Shielded VCO module having trimmable capacitor plate external to shield
US5751555A (en) * 1996-08-19 1998-05-12 Motorola, Inc. Electronic component having reduced capacitance
JPH1084011A (ja) 1996-09-06 1998-03-31 Hitachi Ltd 半導体装置及びこの製造方法並びにその実装方法
US5841686A (en) * 1996-11-22 1998-11-24 Ma Laboratories, Inc. Dual-bank memory module with shared capacitors and R-C elements integrated into the module substrate
KR19980084427A (ko) * 1997-05-23 1998-12-05 김영환 패키지장치의 내장형 바이패스 커패시터
US5798567A (en) * 1997-08-21 1998-08-25 Hewlett-Packard Company Ball grid array integrated circuit package which employs a flip chip integrated circuit and decoupling capacitors
US6272020B1 (en) * 1997-10-16 2001-08-07 Hitachi, Ltd. Structure for mounting a semiconductor device and a capacitor device on a substrate
US5939782A (en) * 1998-03-03 1999-08-17 Sun Microsystems, Inc. Package construction for integrated circuit chip with bypass capacitor
US5973928A (en) * 1998-08-18 1999-10-26 International Business Machines Corporation Multi-layer ceramic substrate decoupling
US6144559A (en) * 1999-04-08 2000-11-07 Agilent Technologies Process for assembling an interposer to probe dense pad arrays

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63157919U (enExample) * 1987-04-01 1988-10-17
JPH09130031A (ja) * 1995-10-27 1997-05-16 Hitachi Ltd 電子部品の実装方法
JPH10163263A (ja) * 1996-11-29 1998-06-19 Nec Corp マルチチップモジュールの実装構造
JPH11121899A (ja) * 1997-10-20 1999-04-30 Fuji Xerox Co Ltd 電子部品実装体および電子部品の実装方法
JPH11260999A (ja) * 1998-03-13 1999-09-24 Sumitomo Metal Ind Ltd ノイズを低減した積層半導体装置モジュール
JP2001203435A (ja) * 2000-01-21 2001-07-27 Ibiden Co Ltd ボールグリッドアレイ型パッケージの接続構造

Also Published As

Publication number Publication date
EP1260121B1 (en) 2006-06-21
KR20020082865A (ko) 2002-10-31
KR100747130B1 (ko) 2007-08-09
DE60029011D1 (de) 2006-08-03
CN1204793C (zh) 2005-06-01
US6404649B1 (en) 2002-06-11
WO2001067833A1 (en) 2001-09-13
DE60029011T2 (de) 2007-01-11
EP1260121A1 (en) 2002-11-27
CN1437839A (zh) 2003-08-20

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