JP2003297078A5 - - Google Patents
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- JP2003297078A5 JP2003297078A5 JP2002099065A JP2002099065A JP2003297078A5 JP 2003297078 A5 JP2003297078 A5 JP 2003297078A5 JP 2002099065 A JP2002099065 A JP 2002099065A JP 2002099065 A JP2002099065 A JP 2002099065A JP 2003297078 A5 JP2003297078 A5 JP 2003297078A5
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- cell
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- bit line
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Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002099065A JP3984090B2 (ja) | 2002-04-01 | 2002-04-01 | 強誘電体メモリ装置 |
| US10/403,076 US6934177B2 (en) | 2002-04-01 | 2003-04-01 | Ferroelectric memory device and read control method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002099065A JP3984090B2 (ja) | 2002-04-01 | 2002-04-01 | 強誘電体メモリ装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2003297078A JP2003297078A (ja) | 2003-10-17 |
| JP2003297078A5 true JP2003297078A5 (enExample) | 2005-06-30 |
| JP3984090B2 JP3984090B2 (ja) | 2007-09-26 |
Family
ID=29388073
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002099065A Expired - Fee Related JP3984090B2 (ja) | 2002-04-01 | 2002-04-01 | 強誘電体メモリ装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6934177B2 (enExample) |
| JP (1) | JP3984090B2 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4326226B2 (ja) * | 2003-01-20 | 2009-09-02 | Okiセミコンダクタ株式会社 | 半導体集積回路 |
| JP3940728B2 (ja) * | 2004-04-09 | 2007-07-04 | 株式会社東芝 | 半導体記憶装置 |
| JP3917604B2 (ja) * | 2004-05-17 | 2007-05-23 | 株式会社東芝 | 半導体記憶装置 |
| JP4149979B2 (ja) * | 2004-09-16 | 2008-09-17 | 株式会社東芝 | 強誘電体ランダムアクセスメモリ |
| KR100562646B1 (ko) * | 2004-12-22 | 2006-03-20 | 주식회사 하이닉스반도체 | 저전압용 반도체 메모리 장치 |
| JP2008102982A (ja) * | 2006-10-17 | 2008-05-01 | Toshiba Corp | 強誘電体メモリ |
| JP2008108355A (ja) * | 2006-10-25 | 2008-05-08 | Toshiba Corp | 強誘電体半導体記憶装置及び強誘電体半導体記憶装置の読み出し方法 |
| US8125829B2 (en) * | 2008-05-02 | 2012-02-28 | Micron Technology, Inc. | Biasing system and method |
| JP2010033624A (ja) * | 2008-07-25 | 2010-02-12 | Toshiba Corp | 半導体記憶装置 |
| WO2018044486A1 (en) | 2016-08-31 | 2018-03-08 | Micron Technology, Inc. | Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory |
| WO2018044485A1 (en) | 2016-08-31 | 2018-03-08 | Micron Technology, Inc. | Ferroelectric memory cells |
| US10867675B2 (en) | 2017-07-13 | 2020-12-15 | Micron Technology, Inc. | Apparatuses and methods for memory including ferroelectric memory cells and dielectric memory cells |
| US11062763B2 (en) * | 2019-04-09 | 2021-07-13 | Micron Technology, Inc. | Memory array with multiplexed digit lines |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5144583A (en) * | 1989-01-09 | 1992-09-01 | Kabushiki Kaisha Toshiba | Dynamic semiconductor memory device with twisted bit-line structure |
| JP3617615B2 (ja) * | 1999-11-08 | 2005-02-09 | シャープ株式会社 | 強誘電体記憶装置 |
| JP3913451B2 (ja) * | 2000-08-23 | 2007-05-09 | 株式会社東芝 | 半導体記憶装置 |
| JP4040243B2 (ja) * | 2000-09-08 | 2008-01-30 | 株式会社東芝 | 強誘電体メモリ |
| US6522569B2 (en) * | 2000-09-20 | 2003-02-18 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| KR100489357B1 (ko) * | 2002-08-08 | 2005-05-16 | 주식회사 하이닉스반도체 | 불휘발성 강유전체 메모리 장치의 셀 어레이와, 그의 구동장치 및 방법 |
-
2002
- 2002-04-01 JP JP2002099065A patent/JP3984090B2/ja not_active Expired - Fee Related
-
2003
- 2003-04-01 US US10/403,076 patent/US6934177B2/en not_active Expired - Fee Related
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