JP2003263892A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JP2003263892A
JP2003263892A JP2002065805A JP2002065805A JP2003263892A JP 2003263892 A JP2003263892 A JP 2003263892A JP 2002065805 A JP2002065805 A JP 2002065805A JP 2002065805 A JP2002065805 A JP 2002065805A JP 2003263892 A JP2003263892 A JP 2003263892A
Authority
JP
Japan
Prior art keywords
bank
address
data
circuit
banks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002065805A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003263892A5 (enExample
Inventor
Norimasa Hara
徳正 原
Sakatoshi Saito
栄俊 斉藤
Hideo Kato
秀雄 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2002065805A priority Critical patent/JP2003263892A/ja
Priority to US10/383,633 priority patent/US6906960B2/en
Publication of JP2003263892A publication Critical patent/JP2003263892A/ja
Publication of JP2003263892A5 publication Critical patent/JP2003263892A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/22—Nonvolatile memory in which reading can be carried out from one memory bank or array whilst a word or sector in another bank or array is being erased or programmed simultaneously

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
JP2002065805A 2002-03-11 2002-03-11 半導体記憶装置 Pending JP2003263892A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002065805A JP2003263892A (ja) 2002-03-11 2002-03-11 半導体記憶装置
US10/383,633 US6906960B2 (en) 2002-03-11 2003-03-10 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002065805A JP2003263892A (ja) 2002-03-11 2002-03-11 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2003263892A true JP2003263892A (ja) 2003-09-19
JP2003263892A5 JP2003263892A5 (enExample) 2005-09-02

Family

ID=29197934

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002065805A Pending JP2003263892A (ja) 2002-03-11 2002-03-11 半導体記憶装置

Country Status (2)

Country Link
US (1) US6906960B2 (enExample)
JP (1) JP2003263892A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007115015A (ja) * 2005-10-20 2007-05-10 Kawasaki Microelectronics Kk メモリシステムおよび検索方法
JP2011510427A (ja) * 2008-01-17 2011-03-31 モーセッド・テクノロジーズ・インコーポレイテッド 不揮発性半導体記憶装置
KR20150017588A (ko) * 2013-08-07 2015-02-17 에스케이하이닉스 주식회사 액티브 제어 장치 및 이를 포함하는 반도체 장치

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7149841B2 (en) * 2003-03-31 2006-12-12 Micron Technology, Inc. Memory devices with buffered command address bus
US7082075B2 (en) * 2004-03-18 2006-07-25 Micron Technology, Inc. Memory device and method having banks of different sizes
TWI250403B (en) * 2004-11-15 2006-03-01 Sunplus Technology Co Ltd Dram controller and video system
CN100397361C (zh) * 2004-11-23 2008-06-25 凌阳科技股份有限公司 动态随机存取内存控制器与视频系统
US7283418B2 (en) * 2005-07-26 2007-10-16 Micron Technology, Inc. Memory device and method having multiple address, data and command buses
JPWO2007023544A1 (ja) * 2005-08-25 2009-03-26 スパンション エルエルシー 記憶装置、記憶装置の制御方法、および記憶制御装置の制御方法
JP4772546B2 (ja) * 2006-03-17 2011-09-14 富士通セミコンダクター株式会社 半導体メモリ、メモリシステムおよびメモリシステムの動作方法
US11010076B2 (en) 2007-03-29 2021-05-18 Violin Systems Llc Memory system with multiple striping of raid groups and method for performing the same
US9632870B2 (en) 2007-03-29 2017-04-25 Violin Memory, Inc. Memory system with multiple striping of raid groups and method for performing the same
US9727452B2 (en) * 2007-12-14 2017-08-08 Virident Systems, Llc Distributing metadata across multiple different disruption regions within an asymmetric memory system
US8804424B2 (en) * 2011-08-25 2014-08-12 Micron Technology, Inc. Memory with three transistor memory cell device
KR102782323B1 (ko) * 2017-07-30 2025-03-18 뉴로블레이드, 리미티드. 메모리 기반 분산 프로세서 아키텍처
KR102504614B1 (ko) * 2018-04-27 2023-03-02 에스케이하이닉스 주식회사 반도체 장치
US12474867B2 (en) * 2023-09-21 2025-11-18 Texas Instruments Incorporated Methods, apparatus, and articles of manufacture to interleave data accesses for improved throughput

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3570879B2 (ja) * 1997-07-09 2004-09-29 富士通株式会社 不揮発性半導体記憶装置
JP4047515B2 (ja) 1999-05-10 2008-02-13 株式会社東芝 半導体装置
US6377502B1 (en) * 1999-05-10 2002-04-23 Kabushiki Kaisha Toshiba Semiconductor device that enables simultaneous read and write/erase operation
EP1052646B1 (en) * 1999-05-11 2004-07-14 Fujitsu Limited Non-volatile semiconductor memory device permitting data-read operation performed during data-write/erase operation
JP3530425B2 (ja) 1999-08-20 2004-05-24 Ｎｅｃマイクロシステム株式会社 半導体記憶装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007115015A (ja) * 2005-10-20 2007-05-10 Kawasaki Microelectronics Kk メモリシステムおよび検索方法
JP2011510427A (ja) * 2008-01-17 2011-03-31 モーセッド・テクノロジーズ・インコーポレイテッド 不揮発性半導体記憶装置
US8533405B2 (en) 2008-01-17 2013-09-10 Mosaid Technologies Incorporated Nonvolatile semiconductor memory device
KR20150017588A (ko) * 2013-08-07 2015-02-17 에스케이하이닉스 주식회사 액티브 제어 장치 및 이를 포함하는 반도체 장치
KR102161278B1 (ko) * 2013-08-07 2020-09-29 에스케이하이닉스 주식회사 액티브 제어 장치 및 이를 포함하는 반도체 장치

Also Published As

Publication number Publication date
US6906960B2 (en) 2005-06-14
US20030227800A1 (en) 2003-12-11

Similar Documents

Publication Publication Date Title
US6556504B2 (en) Nonvolatile semiconductor memory device and data input/output control method thereof
JP4050548B2 (ja) 半導体記憶装置
US6542956B1 (en) Latched address multi-chunk write to EEPROM
US7573738B2 (en) Mode selection in a flash memory device
US6788572B2 (en) Non-volatile multi-level semiconductor flash memory device and method of driving same
US8085607B2 (en) 3-level non-volatile semiconductor memory device and method of driving the same
JP2003263892A (ja) 半導体記憶装置
JP2003203493A (ja) Ｎａｎｄフラッシュメモリ装置
JP2006252624A (ja) 半導体記憶装置
JPH0574178A (ja) 不揮発性ｉｃメモリ
US20040221092A1 (en) Flash memory device with partial copy-back mode
US6483748B2 (en) Nonvolatile memory with background operation function
US6643758B2 (en) Flash memory capable of changing bank configuration
JPH06342591A (ja) 半導体メモリ装置
US6950337B2 (en) Nonvolatile memory device with simultaneous read/write
JP2006040497A (ja) 半導体記憶装置、不揮発性半導体記憶装置
US7551481B2 (en) User configurable commands for flash memory
KR100713983B1 (ko) 플래시 메모리 장치의 페이지 버퍼 및 그것을 이용한프로그램 방법
JPH07254298A (ja) 半導体記憶装置
JP2001243781A (ja) 半導体記憶装置
WO2007026393A1 (ja) 半導体装置およびその制御方法
JP3519542B2 (ja) 半導体記憶装置
JP2003051197A (ja) 半導体記憶装置
JP2002197877A (ja) 半導体記憶装置
JP2001143480A (ja) 半導体記憶装置とその制御方法

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050301

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050301

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070320

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070521

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20070918