JP2002524857A5 - - Google Patents

Download PDF

Info

Publication number
JP2002524857A5
JP2002524857A5 JP2000568124A JP2000568124A JP2002524857A5 JP 2002524857 A5 JP2002524857 A5 JP 2002524857A5 JP 2000568124 A JP2000568124 A JP 2000568124A JP 2000568124 A JP2000568124 A JP 2000568124A JP 2002524857 A5 JP2002524857 A5 JP 2002524857A5
Authority
JP
Japan
Prior art keywords
conductive
plug
dielectric layer
width
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000568124A
Other languages
English (en)
Other versions
JP2002524857A (ja
JP3898891B2 (ja
Filing date
Publication date
Priority claimed from US09/141,217 external-priority patent/US6400018B2/en
Application filed filed Critical
Publication of JP2002524857A publication Critical patent/JP2002524857A/ja
Publication of JP2002524857A5 publication Critical patent/JP2002524857A5/ja
Application granted granted Critical
Publication of JP3898891B2 publication Critical patent/JP3898891B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Claims (1)

  1. 第１表面および第２表面を有する誘電体層を備える基板と、
    前記第１表面上にある導電性層であって、前記誘電体層および導電性層が可撓性回路を形成する導電性層と、
    前記誘電体層内に形成された傾斜バイアであって、前記バイアが、第１の幅の第１開口部を前記第１表面に有し、前記第１の幅より大きい第２の幅の第２の開口部を前記第２表面に有する傾斜バイアと、
    前記導電性層に接続された導電性プラグであって、前記バイア内に形成され、前記第１開口部に隣接する部分から前記第２開口部に向かって延在し、前記第２開口部に隣接してプラグ界面で終端する導電性プラグと、
    前記プラグ界面に接続され、前記第２表面から突出するように延在する導電性はんだボールと、
    を含む回路。
JP2000568124A 1998-08-27 1999-01-15 バイアプラグアダプター Expired - Fee Related JP3898891B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/141,217 1998-08-27
US09/141,217 US6400018B2 (en) 1998-08-27 1998-08-27 Via plug adapter
PCT/US1999/000179 WO2000013232A1 (en) 1998-08-27 1999-01-15 Through hole bump contact

Publications (3)

Publication Number Publication Date
JP2002524857A JP2002524857A (ja) 2002-08-06
JP2002524857A5 true JP2002524857A5 (ja) 2005-09-15
JP3898891B2 JP3898891B2 (ja) 2007-03-28

Family

ID=22494705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000568124A Expired - Fee Related JP3898891B2 (ja) 1998-08-27 1999-01-15 バイアプラグアダプター

Country Status (10)

Country Link
US (2) US6400018B2 (ja)
EP (1) EP1118119A1 (ja)
JP (1) JP3898891B2 (ja)
KR (1) KR100367126B1 (ja)
CN (1) CN1192429C (ja)
AU (1) AU2451399A (ja)
CA (1) CA2338550A1 (ja)
IL (1) IL141051A0 (ja)
TW (1) TW463348B (ja)
WO (1) WO2000013232A1 (ja)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6400018B2 (en) * 1998-08-27 2002-06-04 3M Innovative Properties Company Via plug adapter
US6462414B1 (en) * 1999-03-05 2002-10-08 Altera Corporation Integrated circuit package utilizing a conductive structure for interlocking a conductive ball to a ball pad
JP3844936B2 (ja) 1999-03-26 2006-11-15 富士通株式会社 半導体装置
US6400574B1 (en) * 2000-05-11 2002-06-04 Micron Technology, Inc. Molded ball grid array
US6507118B1 (en) 2000-07-14 2003-01-14 3M Innovative Properties Company Multi-metal layer circuit
US6377475B1 (en) 2001-02-26 2002-04-23 Gore Enterprise Holdings, Inc. Removable electromagnetic interference shield
US6744640B2 (en) 2002-04-10 2004-06-01 Gore Enterprise Holdings, Inc. Board-level EMI shield with enhanced thermal dissipation
JP2003318545A (ja) * 2002-04-22 2003-11-07 Sony Corp 多層型プリント配線基板及び多層型プリント配線基板の製造方法
KR100481216B1 (ko) * 2002-06-07 2005-04-08 엘지전자 주식회사 볼 그리드 어레이 패키지 및 그의 제조 방법
US20040099716A1 (en) * 2002-11-27 2004-05-27 Motorola Inc. Solder joint reliability by changing solder pad surface from flat to convex shape
US7060624B2 (en) * 2003-08-13 2006-06-13 International Business Machines Corporation Deep filled vias
US8084866B2 (en) 2003-12-10 2011-12-27 Micron Technology, Inc. Microelectronic devices and methods for filling vias in microelectronic devices
JP2005175128A (ja) * 2003-12-10 2005-06-30 Fujitsu Ltd 半導体装置及びその製造方法
US7446399B1 (en) 2004-08-04 2008-11-04 Altera Corporation Pad structures to improve board-level reliability of solder-on-pad BGA structures
US7267861B2 (en) * 2005-05-31 2007-09-11 Texas Instruments Incorporated Solder joints for copper metallization having reduced interfacial voids
TWI273667B (en) * 2005-08-30 2007-02-11 Via Tech Inc Chip package and bump connecting structure thereof
DE102005055280B3 (de) * 2005-11-17 2007-04-12 Infineon Technologies Ag Verbindungselement zwischen Halbleiterchip und Schaltungsträger sowie Verfahren zur Herstellung und Verwendung des Verbindungselements
US7544304B2 (en) 2006-07-11 2009-06-09 Electro Scientific Industries, Inc. Process and system for quality management and analysis of via drilling
JP5010948B2 (ja) * 2007-03-06 2012-08-29 オリンパス株式会社 半導体装置
US7886437B2 (en) 2007-05-25 2011-02-15 Electro Scientific Industries, Inc. Process for forming an isolated electrically conductive contact through a metal package
US7892441B2 (en) * 2007-06-01 2011-02-22 General Dynamics Advanced Information Systems, Inc. Method and apparatus to change solder pad size using a differential pad plating
JP5501562B2 (ja) * 2007-12-13 2014-05-21 ピーエスフォー ルクスコ エスエイアールエル 半導体装置
WO2009122912A1 (ja) * 2008-03-31 2009-10-08 三洋電機株式会社 はんだ構造体、はんだ構造体の形成方法、はんだ構造体を含む半導体モジュール、および携帯機器
US7943862B2 (en) 2008-08-20 2011-05-17 Electro Scientific Industries, Inc. Method and apparatus for optically transparent via filling
TWI468093B (zh) * 2008-10-31 2015-01-01 Princo Corp 多層基板之導孔結構及其製造方法
TWI380423B (en) * 2008-12-29 2012-12-21 Advanced Semiconductor Eng Substrate structure and manufacturing method thereof
US8536458B1 (en) 2009-03-30 2013-09-17 Amkor Technology, Inc. Fine pitch copper pillar package and method
JP5195821B2 (ja) * 2010-06-03 2013-05-15 株式会社村田製作所 電子デバイスの製造方法
US8492893B1 (en) * 2011-03-16 2013-07-23 Amkor Technology, Inc. Semiconductor device capable of preventing dielectric layer from cracking
TWI449271B (zh) * 2011-11-16 2014-08-11 Dawning Leading Technology Inc 具有連接介面的電子裝置、其電路基板以及其製造方法
JP5971000B2 (ja) 2012-07-20 2016-08-17 富士通株式会社 配線基板、配線基板の製造方法、電子機器及び電子機器の製造方法
CN107393899B (zh) * 2013-06-11 2020-07-24 龙南骏亚精密电路有限公司 芯片封装基板
US9231357B1 (en) * 2013-09-30 2016-01-05 Emc Corporation Mid-plane assembly
US9935081B2 (en) * 2014-08-20 2018-04-03 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid interconnect for chip stacking
CN105636365B (zh) * 2014-10-27 2018-03-13 健鼎（无锡）电子有限公司 转接板的制作方法
US10359565B2 (en) 2017-02-07 2019-07-23 Nokia Of America Corporation Optoelectronic circuit having one or more double-sided substrates
US10068851B1 (en) * 2017-05-30 2018-09-04 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and method for manufacturing the same
EP3967114A1 (en) 2019-05-06 2022-03-16 3M Innovative Properties Company Patterned conductive article
US11605576B2 (en) * 2019-06-25 2023-03-14 Semiconductor Components Industries, Llc Via for semiconductor devices and related methods
TWI742991B (zh) * 2021-01-20 2021-10-11 啟耀光電股份有限公司 基板結構與電子裝置
CN113038703B (zh) * 2021-03-17 2022-08-05 京东方科技集团股份有限公司 一种柔性电路板及其制造方法及电子设备

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3541222A (en) 1969-01-13 1970-11-17 Bunker Ramo Connector screen for interconnecting adjacent surfaces of laminar circuits and method of making
JPS6049652A (ja) * 1983-08-29 1985-03-18 Seiko Epson Corp 半導体素子の製造方法
DE3684602D1 (de) 1986-10-08 1992-04-30 Ibm Verfahren zum herstellen von loetkontakten fuer ein keramisches modul ohne steckerstifte.
JPH03250628A (ja) * 1990-02-28 1991-11-08 Hitachi Ltd 半導体装置
US5130779A (en) * 1990-06-19 1992-07-14 International Business Machines Corporation Solder mass having conductive encapsulating arrangement
DE69233088T2 (de) 1991-02-25 2003-12-24 Canon K.K., Tokio/Tokyo Elektrisches Verbindungsteil und sein Herstellungsverfahren
US5203075A (en) 1991-08-12 1993-04-20 Inernational Business Machines Method of bonding flexible circuit to cicuitized substrate to provide electrical connection therebetween using different solders
JP3057130B2 (ja) * 1993-02-18 2000-06-26 三菱電機株式会社 樹脂封止型半導体パッケージおよびその製造方法
US5401913A (en) * 1993-06-08 1995-03-28 Minnesota Mining And Manufacturing Company Electrical interconnections between adjacent circuit board layers of a multi-layer circuit board
US5491303A (en) 1994-03-21 1996-02-13 Motorola, Inc. Surface mount interposer
US5385868A (en) 1994-07-05 1995-01-31 Taiwan Semiconductor Manufacturing Company, Ltd. Upward plug process for metal via holes
JP2595909B2 (ja) 1994-09-14 1997-04-02 日本電気株式会社 半導体装置
US5945741A (en) * 1995-11-21 1999-08-31 Sony Corporation Semiconductor chip housing having a reinforcing plate
JPH08148603A (ja) 1994-11-22 1996-06-07 Nec Kyushu Ltd ボールグリッドアレイ型半導体装置およびその製造方法
JP2763020B2 (ja) 1995-04-27 1998-06-11 日本電気株式会社 半導体パッケージ及び半導体装置
JP3015712B2 (ja) 1995-06-30 2000-03-06 日東電工株式会社 フィルムキャリアおよびそれを用いてなる半導体装置
JP3176542B2 (ja) * 1995-10-25 2001-06-18 シャープ株式会社 半導体装置及びその製造方法
JP3238074B2 (ja) 1996-07-25 2001-12-10 日立電線株式会社 半導体装置用テープキャリア
DE19702014A1 (de) 1996-10-14 1998-04-16 Fraunhofer Ges Forschung Chipmodul sowie Verfahren zur Herstellung eines Chipmoduls
US5973393A (en) * 1996-12-20 1999-10-26 Lsi Logic Corporation Apparatus and method for stackable molded lead frame ball grid array packaging of integrated circuits
US6114187A (en) * 1997-01-11 2000-09-05 Microfab Technologies, Inc. Method for preparing a chip scale package and product produced by the method
US6114763A (en) * 1997-05-30 2000-09-05 Tessera, Inc. Semiconductor package with translator for connection to an external substrate
US5977632A (en) * 1998-02-02 1999-11-02 Motorola, Inc. Flip chip bump structure and method of making
US5943597A (en) * 1998-06-15 1999-08-24 Motorola, Inc. Bumped semiconductor device having a trench for stress relief
US6400018B2 (en) * 1998-08-27 2002-06-04 3M Innovative Properties Company Via plug adapter

Similar Documents

Publication Publication Date Title
JP2002524857A5 (ja)
JP2004063767A5 (ja)
JP2000138433A5 (ja)
SG81960A1 (en) Semiconductor device, substrate for a semiconductor device, method of manufacture thereof, and electronic instrument
JP2004071565A5 (ja)
JP2008525987A5 (ja)
EP1796445A3 (en) Multilayer printed circuit board
EP1699277A4 (en) CERAMIC MULTILAYER SUBSTRATE
WO2004100276A3 (en) Light-emitting devices having coplanar electrical contacts adjacent to a substrate surface opposite an active region and methods of forming the same
EP1196013A3 (en) Printed circuit board and manufacturing method of the printed circuit board
EP1357775A4 (en) PCB AND METHOD FOR THE PRODUCTION THEREOF
JP2002009452A5 (ja)
JP2000124015A5 (ja)
JP2004031439A5 (ja)
JP2004103843A5 (ja)
WO2003034491A3 (en) Semiconductor component
EP1148543A3 (en) Semiconductor device and process of manufacturing the same
TW200501838A (en) Hybrid integrated circuit device
WO2006023034A3 (en) Probe pad arrangement for an integrated circuit and method of forming
WO2004061962A3 (en) Multi-layer integrated semiconductor structure
EP0869547A3 (en) Semiconductor device and manufacture method thereof
EP1207554A4 (en) ELECTRONIC COMPONENT
WO2003085775A3 (en) Spiral couplers
JPH09307208A (ja) フレキシブルプリント基板の接続端部構造
JP2003224228A5 (ja)