JP2002314020A - リードフレームの製版めっき方法 - Google Patents

リードフレームの製版めっき方法

Info

Publication number
JP2002314020A
JP2002314020A JP2001112218A JP2001112218A JP2002314020A JP 2002314020 A JP2002314020 A JP 2002314020A JP 2001112218 A JP2001112218 A JP 2001112218A JP 2001112218 A JP2001112218 A JP 2001112218A JP 2002314020 A JP2002314020 A JP 2002314020A
Authority
JP
Japan
Prior art keywords
lead frame
plating
resist
back surface
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001112218A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002314020A5 (enExample
Inventor
Chikao Ikenaga
知加雄 池永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dai Nippon Printing Co Ltd
Original Assignee
Dai Nippon Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dai Nippon Printing Co Ltd filed Critical Dai Nippon Printing Co Ltd
Priority to JP2001112218A priority Critical patent/JP2002314020A/ja
Publication of JP2002314020A publication Critical patent/JP2002314020A/ja
Publication of JP2002314020A5 publication Critical patent/JP2002314020A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Electroplating Methods And Accessories (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP2001112218A 2001-04-11 2001-04-11 リードフレームの製版めっき方法 Pending JP2002314020A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001112218A JP2002314020A (ja) 2001-04-11 2001-04-11 リードフレームの製版めっき方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001112218A JP2002314020A (ja) 2001-04-11 2001-04-11 リードフレームの製版めっき方法

Publications (2)

Publication Number Publication Date
JP2002314020A true JP2002314020A (ja) 2002-10-25
JP2002314020A5 JP2002314020A5 (enExample) 2010-01-21

Family

ID=18963672

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001112218A Pending JP2002314020A (ja) 2001-04-11 2001-04-11 リードフレームの製版めっき方法

Country Status (1)

Country Link
JP (1) JP2002314020A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011134851A (ja) * 2009-12-24 2011-07-07 Hitachi Chem Co Ltd 半導体装置、その製造法、半導体装置接続用配線基材、半導体装置搭載用配線板及びその製造法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10142807A (ja) * 1996-11-13 1998-05-29 Dainippon Printing Co Ltd 電着レジスト皮膜の露光方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10142807A (ja) * 1996-11-13 1998-05-29 Dainippon Printing Co Ltd 電着レジスト皮膜の露光方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011134851A (ja) * 2009-12-24 2011-07-07 Hitachi Chem Co Ltd 半導体装置、その製造法、半導体装置接続用配線基材、半導体装置搭載用配線板及びその製造法

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