JP2002236611A - 半導体装置と情報処理システム - Google Patents
半導体装置と情報処理システムInfo
- Publication number
- JP2002236611A JP2002236611A JP2001287198A JP2001287198A JP2002236611A JP 2002236611 A JP2002236611 A JP 2002236611A JP 2001287198 A JP2001287198 A JP 2001287198A JP 2001287198 A JP2001287198 A JP 2001287198A JP 2002236611 A JP2002236611 A JP 2002236611A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- identification information
- input
- internal
- serial bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
Landscapes
- Memory System (AREA)
- Read Only Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001287198A JP2002236611A (ja) | 2000-12-04 | 2001-09-20 | 半導体装置と情報処理システム |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000367874 | 2000-12-04 | ||
| JP2000-367874 | 2000-12-04 | ||
| JP2001287198A JP2002236611A (ja) | 2000-12-04 | 2001-09-20 | 半導体装置と情報処理システム |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2002236611A true JP2002236611A (ja) | 2002-08-23 |
| JP2002236611A5 JP2002236611A5 (enExample) | 2008-11-06 |
Family
ID=26605132
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001287198A Pending JP2002236611A (ja) | 2000-12-04 | 2001-09-20 | 半導体装置と情報処理システム |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002236611A (enExample) |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100357904C (zh) * | 2005-08-31 | 2007-12-26 | 上海海尔集成电路有限公司 | 一种微控制器配置接口操作方法 |
| JP2009164653A (ja) * | 2009-04-27 | 2009-07-23 | Renesas Technology Corp | マルチチップモジュール |
| JP2012181916A (ja) * | 2005-09-30 | 2012-09-20 | Mosaid Technologies Inc | 複数の独立したシリアルリンクメモリ |
| JP2013146063A (ja) * | 2012-01-13 | 2013-07-25 | Altera Corp | フレキシブル電子インターフェースのための装置および関連方法 |
| JP2014013252A (ja) * | 2013-09-12 | 2014-01-23 | Dainippon Printing Co Ltd | 回路板の検査方法、回路板の検査装置 |
| US8654601B2 (en) | 2005-09-30 | 2014-02-18 | Mosaid Technologies Incorporated | Memory with output control |
| JP2014063523A (ja) * | 2006-12-06 | 2014-04-10 | Conversant Intellectual Property Management Inc | 混合されたタイプのメモリデバイスを動作させるシステムおよび方法 |
| US8738879B2 (en) | 2005-09-30 | 2014-05-27 | Conversant Intellectual Property Managament Inc. | Independent link and bank selection |
| JP2014518427A (ja) * | 2011-07-01 | 2014-07-28 | インテル・コーポレーション | メモリのボリュームの識別子を決定する方法、装置およびシステム |
| KR101550940B1 (ko) | 2010-09-30 | 2015-09-07 | 현대자동차주식회사 | 차량용 엔진룸 박스의 와이어 보호장치 |
| US9240227B2 (en) | 2005-09-30 | 2016-01-19 | Conversant Intellectual Property Management Inc. | Daisy chain cascading devices |
| JP2016118979A (ja) * | 2014-12-22 | 2016-06-30 | 富士通フロンテック株式会社 | 媒体取扱装置 |
| US11609875B2 (en) | 2020-03-27 | 2023-03-21 | Murata Manufacturing Co., Ltd. | Data communication device and data communication module |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6143368A (ja) * | 1984-08-06 | 1986-03-01 | Sharp Corp | 集積回路 |
| JPH0496840A (ja) * | 1990-08-14 | 1992-03-30 | Hitachi Maxell Ltd | 半導体ファイルメモリ装置 |
| JPH0695974A (ja) * | 1992-09-10 | 1994-04-08 | Fujitsu Ltd | メモリ保護方式 |
| JPH07200458A (ja) * | 1993-12-17 | 1995-08-04 | Internatl Business Mach Corp <Ibm> | メモリ・アクセス装置及びその方法 |
| JPH10161929A (ja) * | 1996-11-27 | 1998-06-19 | Hitachi Ltd | 電子装置 |
| JPH11120075A (ja) * | 1997-10-20 | 1999-04-30 | Toshiba Corp | 半導体記憶装置及び半導体記憶システム |
| JP2000181802A (ja) * | 1998-12-11 | 2000-06-30 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| JP2000315185A (ja) * | 1999-04-30 | 2000-11-14 | Hitachi Ltd | 半導体メモリファイルシステム |
-
2001
- 2001-09-20 JP JP2001287198A patent/JP2002236611A/ja active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6143368A (ja) * | 1984-08-06 | 1986-03-01 | Sharp Corp | 集積回路 |
| JPH0496840A (ja) * | 1990-08-14 | 1992-03-30 | Hitachi Maxell Ltd | 半導体ファイルメモリ装置 |
| JPH0695974A (ja) * | 1992-09-10 | 1994-04-08 | Fujitsu Ltd | メモリ保護方式 |
| JPH07200458A (ja) * | 1993-12-17 | 1995-08-04 | Internatl Business Mach Corp <Ibm> | メモリ・アクセス装置及びその方法 |
| JPH10161929A (ja) * | 1996-11-27 | 1998-06-19 | Hitachi Ltd | 電子装置 |
| JPH11120075A (ja) * | 1997-10-20 | 1999-04-30 | Toshiba Corp | 半導体記憶装置及び半導体記憶システム |
| JP2000181802A (ja) * | 1998-12-11 | 2000-06-30 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| JP2000315185A (ja) * | 1999-04-30 | 2000-11-14 | Hitachi Ltd | 半導体メモリファイルシステム |
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100357904C (zh) * | 2005-08-31 | 2007-12-26 | 上海海尔集成电路有限公司 | 一种微控制器配置接口操作方法 |
| US9240227B2 (en) | 2005-09-30 | 2016-01-19 | Conversant Intellectual Property Management Inc. | Daisy chain cascading devices |
| JP2012181916A (ja) * | 2005-09-30 | 2012-09-20 | Mosaid Technologies Inc | 複数の独立したシリアルリンクメモリ |
| US9230654B2 (en) | 2005-09-30 | 2016-01-05 | Conversant Intellectual Property Management Inc. | Method and system for accessing a flash memory device |
| US8654601B2 (en) | 2005-09-30 | 2014-02-18 | Mosaid Technologies Incorporated | Memory with output control |
| US8738879B2 (en) | 2005-09-30 | 2014-05-27 | Conversant Intellectual Property Managament Inc. | Independent link and bank selection |
| US8743610B2 (en) | 2005-09-30 | 2014-06-03 | Conversant Intellectual Property Management Inc. | Method and system for accessing a flash memory device |
| JP2014063523A (ja) * | 2006-12-06 | 2014-04-10 | Conversant Intellectual Property Management Inc | 混合されたタイプのメモリデバイスを動作させるシステムおよび方法 |
| JP2009164653A (ja) * | 2009-04-27 | 2009-07-23 | Renesas Technology Corp | マルチチップモジュール |
| KR101550940B1 (ko) | 2010-09-30 | 2015-09-07 | 현대자동차주식회사 | 차량용 엔진룸 박스의 와이어 보호장치 |
| JP2014518427A (ja) * | 2011-07-01 | 2014-07-28 | インテル・コーポレーション | メモリのボリュームの識別子を決定する方法、装置およびシステム |
| JP2013146063A (ja) * | 2012-01-13 | 2013-07-25 | Altera Corp | フレキシブル電子インターフェースのための装置および関連方法 |
| US9647668B2 (en) | 2012-01-13 | 2017-05-09 | Altera Corporation | Apparatus for flexible electronic interfaces and associated methods |
| US10063235B2 (en) | 2012-01-13 | 2018-08-28 | Altera Corporation | Apparatus for flexible electronic interfaces and associated methods |
| US10797702B2 (en) | 2012-01-13 | 2020-10-06 | Altera Corporation | Apparatus for flexible electronic interfaces and associated methods |
| JP2014013252A (ja) * | 2013-09-12 | 2014-01-23 | Dainippon Printing Co Ltd | 回路板の検査方法、回路板の検査装置 |
| JP2016118979A (ja) * | 2014-12-22 | 2016-06-30 | 富士通フロンテック株式会社 | 媒体取扱装置 |
| US11609875B2 (en) | 2020-03-27 | 2023-03-21 | Murata Manufacturing Co., Ltd. | Data communication device and data communication module |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080917 |
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