JP2002110865A - 回路装置 - Google Patents

回路装置

Info

Publication number
JP2002110865A
JP2002110865A JP2000295230A JP2000295230A JP2002110865A JP 2002110865 A JP2002110865 A JP 2002110865A JP 2000295230 A JP2000295230 A JP 2000295230A JP 2000295230 A JP2000295230 A JP 2000295230A JP 2002110865 A JP2002110865 A JP 2002110865A
Authority
JP
Japan
Prior art keywords
terminal
interposer
substrate
semiconductor
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000295230A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002110865A5 (https=
Inventor
Mie Matsuo
美恵 松尾
Nobuo Hayasaka
伸夫 早坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2000295230A priority Critical patent/JP2002110865A/ja
Priority to US09/957,510 priority patent/US6614106B2/en
Priority to TW090123478A priority patent/TW538511B/zh
Publication of JP2002110865A publication Critical patent/JP2002110865A/ja
Publication of JP2002110865A5 publication Critical patent/JP2002110865A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00Electrical arrangements for controlling or matching impedance
    • H10W44/20Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/401Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9415Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/944Dispositions of multiple bond pads
    • H10W72/9445Top-view layouts, e.g. mirror arrays

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2000295230A 2000-09-27 2000-09-27 回路装置 Pending JP2002110865A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2000295230A JP2002110865A (ja) 2000-09-27 2000-09-27 回路装置
US09/957,510 US6614106B2 (en) 2000-09-27 2001-09-21 Stacked circuit device and method for evaluating an integrated circuit substrate using the stacked circuit device
TW090123478A TW538511B (en) 2000-09-27 2001-09-24 Stacked circuit device and method for evaluating an integrated circuit substrate using the stacked circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000295230A JP2002110865A (ja) 2000-09-27 2000-09-27 回路装置

Publications (2)

Publication Number Publication Date
JP2002110865A true JP2002110865A (ja) 2002-04-12
JP2002110865A5 JP2002110865A5 (https=) 2005-06-16

Family

ID=18777689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000295230A Pending JP2002110865A (ja) 2000-09-27 2000-09-27 回路装置

Country Status (3)

Country Link
US (1) US6614106B2 (https=)
JP (1) JP2002110865A (https=)
TW (1) TW538511B (https=)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004282072A (ja) * 2003-03-14 2004-10-07 General Electric Co <Ge> インタポーザ、インタポーザパッケージ、及びそれらを使用したデバイス組立体
US6812557B2 (en) 2002-09-30 2004-11-02 Kabushiki Kaisha Toshiba Stacked type semiconductor device
US7095112B2 (en) 2002-09-19 2006-08-22 Kabushiki Kaisha Toshiba Semiconductor device, semiconductor package member, and semiconductor device manufacturing method
JP2007123520A (ja) * 2005-10-27 2007-05-17 Matsushita Electric Ind Co Ltd 積層型半導体モジュール
US8791544B2 (en) 2009-06-30 2014-07-29 Nec Corporation Semiconductor device, mounted substrate to be used in semiconductor device, and manufacturing method of mounted substrate

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6525407B1 (en) * 2001-06-29 2003-02-25 Novellus Systems, Inc. Integrated circuit package
US20030150640A1 (en) * 2002-02-14 2003-08-14 Crippen Warren Stuart Silicon space transformer and method of manufacturing same
US20040084766A1 (en) * 2002-10-30 2004-05-06 Pei-Ying Shieh System-in-a-package device
JP2004327951A (ja) * 2003-03-06 2004-11-18 Shinko Electric Ind Co Ltd 半導体装置
US7566960B1 (en) * 2003-10-31 2009-07-28 Xilinx, Inc. Interposing structure
US7049170B2 (en) * 2003-12-17 2006-05-23 Tru-Si Technologies, Inc. Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities
US7060601B2 (en) * 2003-12-17 2006-06-13 Tru-Si Technologies, Inc. Packaging substrates for integrated circuits and soldering methods
JP4377269B2 (ja) * 2004-03-19 2009-12-02 Necエレクトロニクス株式会社 半導体装置
JP4353861B2 (ja) * 2004-06-30 2009-10-28 Necエレクトロニクス株式会社 半導体装置
EP2041789A2 (en) * 2006-06-20 2009-04-01 Nxp B.V. Power amplifier assembly
TWI326908B (en) * 2006-09-11 2010-07-01 Ind Tech Res Inst Packaging structure and fabricating method thereof
US20080192452A1 (en) * 2007-02-12 2008-08-14 Randall Michael S Passive electronic device
JP5450188B2 (ja) * 2010-03-16 2014-03-26 株式会社東芝 放射線検出装置、放射線検出装置の製造方法および画像撮影装置
US9082763B2 (en) * 2012-03-15 2015-07-14 Taiwan Semiconductor Manufacturing Company, Ltd. Joint structure for substrates and methods of forming
US9971970B1 (en) 2015-04-27 2018-05-15 Rigetti & Co, Inc. Microwave integrated quantum circuits with VIAS and methods for making the same
US11031341B2 (en) * 2017-03-29 2021-06-08 Intel Corporation Side mounted interconnect bridges
US11121301B1 (en) 2017-06-19 2021-09-14 Rigetti & Co, Inc. Microwave integrated quantum circuits with cap wafers and their methods of manufacture

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4811082A (en) * 1986-11-12 1989-03-07 International Business Machines Corporation High performance integrated circuit packaging structure
US5177594A (en) * 1991-01-09 1993-01-05 International Business Machines Corporation Semiconductor chip interposer module with engineering change wiring and distributed decoupling capacitance
JPH05211202A (ja) 1991-06-27 1993-08-20 Motorola Inc 複合フリップ・チップ半導体装置とその製造およびバーンインの方法
JPH10150141A (ja) 1996-11-15 1998-06-02 Sony Corp 半導体装置及びこの半導体装置の実装方法
JP3604248B2 (ja) * 1997-02-25 2004-12-22 沖電気工業株式会社 半導体装置の製造方法
JP3914615B2 (ja) 1997-08-19 2007-05-16 住友電気工業株式会社 半導体発光素子及びその製造方法
US6281042B1 (en) * 1998-08-31 2001-08-28 Micron Technology, Inc. Structure and method for a high performance electronic packaging assembly
US6137167A (en) * 1998-11-24 2000-10-24 Micron Technology, Inc. Multichip module with built in repeaters and method
JP2000183081A (ja) * 1998-12-16 2000-06-30 Matsushita Electronics Industry Corp 半導体装置の製造方法および製造装置
JP2000323701A (ja) 1999-05-10 2000-11-24 Citizen Watch Co Ltd 半導体装置およびその製造方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7095112B2 (en) 2002-09-19 2006-08-22 Kabushiki Kaisha Toshiba Semiconductor device, semiconductor package member, and semiconductor device manufacturing method
US6812557B2 (en) 2002-09-30 2004-11-02 Kabushiki Kaisha Toshiba Stacked type semiconductor device
JP2004282072A (ja) * 2003-03-14 2004-10-07 General Electric Co <Ge> インタポーザ、インタポーザパッケージ、及びそれらを使用したデバイス組立体
JP2007123520A (ja) * 2005-10-27 2007-05-17 Matsushita Electric Ind Co Ltd 積層型半導体モジュール
US8008766B2 (en) 2005-10-27 2011-08-30 Panasonic Corporation Stacked semiconductor module
US8159061B2 (en) 2005-10-27 2012-04-17 Panasonic Corporation Stacked semiconductor module
US8791544B2 (en) 2009-06-30 2014-07-29 Nec Corporation Semiconductor device, mounted substrate to be used in semiconductor device, and manufacturing method of mounted substrate

Also Published As

Publication number Publication date
TW538511B (en) 2003-06-21
US20020036340A1 (en) 2002-03-28
US6614106B2 (en) 2003-09-02

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