JP2001319500A - 半導体集積回路装置 - Google Patents

半導体集積回路装置

Info

Publication number
JP2001319500A
JP2001319500A JP2000136822A JP2000136822A JP2001319500A JP 2001319500 A JP2001319500 A JP 2001319500A JP 2000136822 A JP2000136822 A JP 2000136822A JP 2000136822 A JP2000136822 A JP 2000136822A JP 2001319500 A JP2001319500 A JP 2001319500A
Authority
JP
Japan
Prior art keywords
test
circuit
clock signal
signal
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000136822A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001319500A5 (enExample
Inventor
Kazutami Arimoto
和民 有本
Hiroki Shimano
裕樹 島野
Katsumi Dosaka
勝己 堂阪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2000136822A priority Critical patent/JP2001319500A/ja
Priority to US09/810,503 priority patent/US6400625B2/en
Publication of JP2001319500A publication Critical patent/JP2001319500A/ja
Publication of JP2001319500A5 publication Critical patent/JP2001319500A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2000136822A 2000-05-10 2000-05-10 半導体集積回路装置 Pending JP2001319500A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000136822A JP2001319500A (ja) 2000-05-10 2000-05-10 半導体集積回路装置
US09/810,503 US6400625B2 (en) 2000-05-10 2001-03-19 Semiconductor integrated circuit device capable of performing operational test for contained memory core at operating frequency higher than that of memory tester

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000136822A JP2001319500A (ja) 2000-05-10 2000-05-10 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JP2001319500A true JP2001319500A (ja) 2001-11-16
JP2001319500A5 JP2001319500A5 (enExample) 2007-06-07

Family

ID=18644705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000136822A Pending JP2001319500A (ja) 2000-05-10 2000-05-10 半導体集積回路装置

Country Status (2)

Country Link
US (1) US6400625B2 (enExample)
JP (1) JP2001319500A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7386650B2 (en) 2003-03-14 2008-06-10 Oki Electric Electric Industry Co., Ltd. Memory test circuit with data expander
US7676718B2 (en) 2005-11-07 2010-03-09 Fujitsu Limited Test circuit, method and apparatus for supporting circuit design, and computer product
US8276027B2 (en) 2006-05-19 2012-09-25 Fujitsu Semiconductor Limited Semiconductor memory and method for testing the same

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US6349051B1 (en) * 1998-01-29 2002-02-19 Micron Technology, Inc. High speed data bus
DE10113458C2 (de) * 2001-03-19 2003-03-20 Infineon Technologies Ag Testschaltung
DE10115880B4 (de) * 2001-03-30 2007-01-25 Infineon Technologies Ag Testschaltung zum kritischen Testen einer synchronen Speicherschaltung
US6675272B2 (en) * 2001-04-24 2004-01-06 Rambus Inc. Method and apparatus for coordinating memory operations among diversely-located memory components
DE10135582C1 (de) * 2001-07-20 2003-01-16 Infineon Technologies Ag Justierschaltung und Verfahren zum Abstimmen eines Taktsignals
JP3847150B2 (ja) * 2001-11-28 2006-11-15 沖電気工業株式会社 半導体集積回路とそのジッタ測定方法
JP2003317499A (ja) * 2002-04-26 2003-11-07 Mitsubishi Electric Corp 半導体記憶装置およびそれを用いたメモリシステム
CN1314205C (zh) * 2002-06-03 2007-05-02 松下电器产业株式会社 半导体集成电路
JP4229652B2 (ja) * 2002-07-19 2009-02-25 株式会社ルネサステクノロジ 半導体回路装置
US6917215B2 (en) * 2002-08-30 2005-07-12 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit and memory test method
US20050169072A1 (en) * 2002-10-01 2005-08-04 Advantest Corporation Pattern generator, memory controller, and test device
JP2004185134A (ja) * 2002-11-29 2004-07-02 Matsushita Electric Ind Co Ltd 記憶装置
US7487399B2 (en) * 2003-11-07 2009-02-03 Hewlett-Packard Development Company, L.P. System and method for testing a component in a computer system using frequency margining
US7301831B2 (en) 2004-09-15 2007-11-27 Rambus Inc. Memory systems with variable delays for write data signals
US20060068054A1 (en) * 2004-09-30 2006-03-30 Kevin Gearhardt Technique for high-speed TDF testing on low cost testers using on-chip or off-chip circuitry for RapidChip and ASIC devices
US7130231B2 (en) * 2004-11-19 2006-10-31 International Business Machines Corporation Method, apparatus, and computer program product for implementing enhanced DRAM interface checking
US7280054B2 (en) * 2004-12-02 2007-10-09 Nokia Corporation Integrated circuit interface that encodes information using at least one input signal sampled at two consecutive edge transitions of a clock signal
KR100657830B1 (ko) * 2005-01-24 2006-12-14 삼성전자주식회사 반도체 메모리 장치의 테스트 장치 및 방법
US7587645B2 (en) * 2005-01-24 2009-09-08 Samsung Electronics Co., Ltd. Input circuit of semiconductor memory device and test system having the same
JP2006329810A (ja) * 2005-05-26 2006-12-07 Nec Electronics Corp 半導体集積回路及びそのテスト方法
KR100655379B1 (ko) * 2005-11-25 2006-12-08 삼성전자주식회사 유효 출력 데이터 윈도우를 확장시킬 수 있는 출력회로,이를 구비한 반도체 메모리 장치, 및 유효 출력 데이터확장방법
JP4808051B2 (ja) * 2006-03-14 2011-11-02 ルネサスエレクトロニクス株式会社 半導体集積回路装置とそのテスト方法
JP4400601B2 (ja) * 2006-08-21 2010-01-20 エルピーダメモリ株式会社 レイテンシカウンタ
US8607111B2 (en) * 2006-08-30 2013-12-10 Micron Technology, Inc. Sub-instruction repeats for algorithmic pattern generators
KR100850204B1 (ko) * 2006-11-04 2008-08-04 삼성전자주식회사 고속 반도체 메모리 장치를 테스트하기 위한 고주파 커맨드 신호 및 어드레스 신호 생성 방법 및 장치
KR101535228B1 (ko) * 2009-05-13 2015-07-08 삼성전자주식회사 빌트 오프 테스트 장치
KR20120003675A (ko) * 2010-07-05 2012-01-11 삼성전자주식회사 반도체 메모리 장치에서의 테스트 모드 제어회로 및 테스트 모드 진입 방법
JP2012208975A (ja) * 2011-03-29 2012-10-25 Renesas Electronics Corp 半導体装置
CN104535945B (zh) * 2014-12-01 2017-10-31 国家电网公司 一种饱和电抗器铁心材料的磁特性检测装置
TWI562157B (en) * 2015-05-07 2016-12-11 Winbond Electronics Corp Memory unit and testing method thereof
CN106297897B (zh) * 2015-05-27 2019-07-30 华邦电子股份有限公司 存储单元及其测试方法
US10248520B2 (en) * 2015-09-25 2019-04-02 Oracle International Corporation High speed functional test vectors in low power test conditions of a digital integrated circuit
KR20170068719A (ko) * 2015-12-09 2017-06-20 에스케이하이닉스 주식회사 반도체장치 및 반도체시스템
TWI596618B (zh) * 2016-01-22 2017-08-21 華邦電子股份有限公司 動態隨機存取記憶體以及搭載動態隨機存取記憶體之系統的測試方法
KR102728321B1 (ko) * 2016-03-09 2024-11-11 에스케이하이닉스 주식회사 테스트방법 및 이를 이용한 반도체시스템
KR102671075B1 (ko) * 2017-01-13 2024-05-30 에스케이하이닉스 주식회사 반도체장치
US10607671B2 (en) * 2018-02-17 2020-03-31 Micron Technology, Inc. Timing circuit for command path in a memory device
CN111798898A (zh) * 2019-04-08 2020-10-20 长鑫存储技术有限公司 Dram芯片及其参数测试方法
CN113393887B (zh) * 2020-03-11 2022-04-12 长鑫存储技术有限公司 存储器的测试方法及相关设备

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US5127011A (en) * 1990-01-12 1992-06-30 International Business Machines Corporation Per-pin integrated circuit test system having n-bit interface
JPH06187797A (ja) 1992-12-16 1994-07-08 Nec Corp メモリ集積回路
US5524114A (en) * 1993-10-22 1996-06-04 Lsi Logic Corporation Method and apparatus for testing semiconductor devices at speed
US5933379A (en) * 1996-11-18 1999-08-03 Samsung Electronics, Co., Ltd. Method and circuit for testing a semiconductor memory device operating at high frequency
JPH1130646A (ja) 1997-07-10 1999-02-02 Nec Eng Ltd 半導体集積回路及びそれに含まれるテスト回路
US5991888A (en) * 1997-09-26 1999-11-23 Advanced Micro Devices, Inc. Test clock modes

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7386650B2 (en) 2003-03-14 2008-06-10 Oki Electric Electric Industry Co., Ltd. Memory test circuit with data expander
US7676718B2 (en) 2005-11-07 2010-03-09 Fujitsu Limited Test circuit, method and apparatus for supporting circuit design, and computer product
US8276027B2 (en) 2006-05-19 2012-09-25 Fujitsu Semiconductor Limited Semiconductor memory and method for testing the same
US8433960B2 (en) 2006-05-19 2013-04-30 Fujitsu Semiconductor Limited Semiconductor memory and method for testing the same

Also Published As

Publication number Publication date
US6400625B2 (en) 2002-06-04
US20010040829A1 (en) 2001-11-15

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