JP2001274265A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP2001274265A
JP2001274265A JP2000088772A JP2000088772A JP2001274265A JP 2001274265 A JP2001274265 A JP 2001274265A JP 2000088772 A JP2000088772 A JP 2000088772A JP 2000088772 A JP2000088772 A JP 2000088772A JP 2001274265 A JP2001274265 A JP 2001274265A
Authority
JP
Japan
Prior art keywords
potential
semiconductor device
circuit
generation circuit
bias generation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000088772A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001274265A5 (enExample
Inventor
Tatsuya Kunikiyo
辰也 國清
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2000088772A priority Critical patent/JP2001274265A/ja
Priority to US09/668,360 priority patent/US6341087B1/en
Priority to KR10-2000-0074521A priority patent/KR100411845B1/ko
Publication of JP2001274265A publication Critical patent/JP2001274265A/ja
Publication of JP2001274265A5 publication Critical patent/JP2001274265A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G11C5/146—Substrate bias generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
  • Logic Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Dc-Dc Converters (AREA)
JP2000088772A 2000-03-28 2000-03-28 半導体装置 Pending JP2001274265A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2000088772A JP2001274265A (ja) 2000-03-28 2000-03-28 半導体装置
US09/668,360 US6341087B1 (en) 2000-03-28 2000-09-25 Semiconductor device
KR10-2000-0074521A KR100411845B1 (ko) 2000-03-28 2000-12-08 반도체 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000088772A JP2001274265A (ja) 2000-03-28 2000-03-28 半導体装置

Publications (2)

Publication Number Publication Date
JP2001274265A true JP2001274265A (ja) 2001-10-05
JP2001274265A5 JP2001274265A5 (enExample) 2007-03-15

Family

ID=18604602

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000088772A Pending JP2001274265A (ja) 2000-03-28 2000-03-28 半導体装置

Country Status (3)

Country Link
US (1) US6341087B1 (enExample)
JP (1) JP2001274265A (enExample)
KR (1) KR100411845B1 (enExample)

Cited By (25)

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JP2001351995A (ja) * 2000-06-08 2001-12-21 Mitsubishi Electric Corp 不揮発性半導体記憶装置及び半導体集積回路
JP2006147756A (ja) * 2004-11-18 2006-06-08 Sony Corp 高周波トランジスタの設計方法、および、マルチフィンガーゲートを有する高周波トランジスタ
JP2006310860A (ja) * 2005-04-27 2006-11-09 Korea Advanced Inst Of Sci Technol バックバイアスを用いてｓｏｉ基板に形成されたフラッシュブロックを消去するためのフラッシュメモリ素子の製造方法、その消去方法及びその構造
KR100725103B1 (ko) 2006-05-22 2007-06-04 삼성전자주식회사 정전기 방전회로 및 이를 갖는 반도체 칩의 입력커패시턴스 감소 방법
JP2008131266A (ja) * 2006-11-20 2008-06-05 Elpida Memory Inc 半導体装置
JP2009510617A (ja) * 2005-09-28 2009-03-12 インテル コーポレイション 多コア・プロセッサの電力供給及び電力管理
US8536636B2 (en) 2007-04-26 2013-09-17 Peregrine Semiconductor Corporation Tuning capacitance to enhance FET stack voltage withstand
US8559907B2 (en) 2004-06-23 2013-10-15 Peregrine Semiconductor Corporation Integrated RF front end with stacked transistor switch
US8583111B2 (en) 2001-10-10 2013-11-12 Peregrine Semiconductor Corporation Switch circuit and method of switching radio frequency signals
US8604864B2 (en) 2008-02-28 2013-12-10 Peregrine Semiconductor Corporation Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals
US8723260B1 (en) 2009-03-12 2014-05-13 Rf Micro Devices, Inc. Semiconductor radio frequency switch with body contact
US8742502B2 (en) 2005-07-11 2014-06-03 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
US8954902B2 (en) 2005-07-11 2015-02-10 Peregrine Semiconductor Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US9406695B2 (en) 2013-11-20 2016-08-02 Peregrine Semiconductor Corporation Circuit and method for improving ESD tolerance and switching speed
US9590674B2 (en) 2012-12-14 2017-03-07 Peregrine Semiconductor Corporation Semiconductor devices with switchable ground-body connection
US9831857B2 (en) 2015-03-11 2017-11-28 Peregrine Semiconductor Corporation Power splitter with programmable output phase shift
US9948281B2 (en) 2016-09-02 2018-04-17 Peregrine Semiconductor Corporation Positive logic digitally tunable capacitor
US10236872B1 (en) 2018-03-28 2019-03-19 Psemi Corporation AC coupling modules for bias ladders
US10505530B2 (en) 2018-03-28 2019-12-10 Psemi Corporation Positive logic switch with selectable DC blocking circuit
US10622990B2 (en) 2005-07-11 2020-04-14 Psemi Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
US10790390B2 (en) 2005-07-11 2020-09-29 Psemi Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
US10804892B2 (en) 2005-07-11 2020-10-13 Psemi Corporation Circuit and method for controlling charge injection in radio frequency switches
US10886911B2 (en) 2018-03-28 2021-01-05 Psemi Corporation Stacked FET switch bias ladders
USRE48965E1 (en) 2005-07-11 2022-03-08 Psemi Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US11476849B2 (en) 2020-01-06 2022-10-18 Psemi Corporation High power positive logic switch

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KR100363555B1 (ko) * 2001-02-07 2002-12-05 삼성전자 주식회사 에스오아이 트랜지스터의 플로팅 바디효과를 제거하기위한 에스오아이 반도체 집적회로 및 그 제조방법
JP2003110028A (ja) * 2001-10-01 2003-04-11 Hitachi Ltd データ処理装置
JP2003282823A (ja) * 2002-03-26 2003-10-03 Toshiba Corp 半導体集積回路
US7112978B1 (en) 2002-04-16 2006-09-26 Transmeta Corporation Frequency specific closed loop feedback control of integrated circuits
US6784722B2 (en) * 2002-10-09 2004-08-31 Intel Corporation Wide-range local bias generator for body bias grid
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US6936898B2 (en) * 2002-12-31 2005-08-30 Transmeta Corporation Diagonal deep well region for routing body-bias voltage for MOSFETS in surface well regions
US7949864B1 (en) 2002-12-31 2011-05-24 Vjekoslav Svilan Balanced adaptive body bias control
US7236044B2 (en) * 2003-10-14 2007-06-26 The Board Of Trustees Of The Leland Stanford Junior University Apparatus and method for adjusting the substrate impedance of a MOS transistor
US7649402B1 (en) 2003-12-23 2010-01-19 Tien-Min Chen Feedback-controlled body-bias voltage source
US6903984B1 (en) * 2003-12-31 2005-06-07 Intel Corporation Floating-body DRAM using write word line for increased retention time
US7216310B2 (en) * 2004-01-07 2007-05-08 Texas Instruments Incorporated Design method and system for optimum performance in integrated circuits that use power management
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US7859062B1 (en) * 2004-02-02 2010-12-28 Koniaris Kleanthes G Systems and methods for integrated circuits comprising multiple body biasing domains
US7509504B1 (en) 2004-09-30 2009-03-24 Transmeta Corporation Systems and methods for control of integrated circuits comprising body biasing systems
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JP5137378B2 (ja) * 2006-10-20 2013-02-06 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
US8077536B2 (en) 2008-08-05 2011-12-13 Zeno Semiconductor, Inc. Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle
US8547756B2 (en) 2010-10-04 2013-10-01 Zeno Semiconductor, Inc. Semiconductor memory device having an electrically floating body transistor
US8159868B2 (en) 2008-08-22 2012-04-17 Zeno Semiconductor, Inc. Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating
US7760548B2 (en) 2006-11-29 2010-07-20 Yuniarto Widjaja Semiconductor memory having both volatile and non-volatile functionality and method of operating
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US9601493B2 (en) 2006-11-29 2017-03-21 Zeno Semiconductor, Inc Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
US8514622B2 (en) 2007-11-29 2013-08-20 Zeno Semiconductor, Inc. Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
US9230651B2 (en) 2012-04-08 2016-01-05 Zeno Semiconductor, Inc. Memory device having electrically floating body transitor
US8059459B2 (en) 2007-10-24 2011-11-15 Zeno Semiconductor, Inc. Semiconductor memory having both volatile and non-volatile functionality and method of operating
US8130547B2 (en) 2007-11-29 2012-03-06 Zeno Semiconductor, Inc. Method of maintaining the state of semiconductor memory having electrically floating body transistor
US10403361B2 (en) 2007-11-29 2019-09-03 Zeno Semiconductor, Inc. Memory cells, memory cell arrays, methods of using and methods of making
US8014200B2 (en) 2008-04-08 2011-09-06 Zeno Semiconductor, Inc. Semiconductor memory having volatile and multi-bit, non-volatile functionality and methods of operating
USRE47381E1 (en) 2008-09-03 2019-05-07 Zeno Semiconductor, Inc. Forming semiconductor cells with regions of varying conductivity
US11908899B2 (en) 2009-02-20 2024-02-20 Zeno Semiconductor, Inc. MOSFET and memory cell having improved drain current through back bias application
WO2016176248A1 (en) 2015-04-29 2016-11-03 Zeno Semiconductor, Inc. A mosfet and memory cell having improved drain current through back bias application
US9356144B1 (en) * 2009-08-11 2016-05-31 Rf Micro Devices, Inc. Remote gate protection diode for field effect transistors
EP2532005A4 (en) 2010-02-07 2016-06-22 Zeno Semiconductor Inc SEMICONDUCTOR MEMORY DEVICE WITH ELECTRICALLY FLOATED BODY TRANSISTOR WITH BOTH VOLATILE AND NON-VOLATILE FUNCTIONALITY, AND METHOD
US10340276B2 (en) 2010-03-02 2019-07-02 Zeno Semiconductor, Inc. Method of maintaining the state of semiconductor memory having electrically floating body transistor
US10461084B2 (en) 2010-03-02 2019-10-29 Zeno Semiconductor, Inc. Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
US9922981B2 (en) 2010-03-02 2018-03-20 Zeno Semiconductor, Inc. Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
US8582359B2 (en) 2010-11-16 2013-11-12 Zeno Semiconductor, Inc. Dual-port semiconductor memory and first-in first-out (FIFO) memory having electrically floating body transistor
US8957458B2 (en) 2011-03-24 2015-02-17 Zeno Semiconductor, Inc. Asymmetric semiconductor memory device having electrically floating body transistor
US8779488B2 (en) 2011-04-15 2014-07-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device
US9025358B2 (en) 2011-10-13 2015-05-05 Zeno Semiconductor Inc Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
KR102059884B1 (ko) 2012-02-16 2019-12-27 제노 세미컨덕터, 인크. 두개의 트랜지스터로 구성된 메모리셀과 그 동작 방법
WO2014071049A2 (en) 2012-10-31 2014-05-08 Suvolta, Inc. Dram-type device with low variation transistor peripheral circuits, and related methods
US9208880B2 (en) 2013-01-14 2015-12-08 Zeno Semiconductor, Inc. Content addressable memory device having electrically floating body transistor
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US9275723B2 (en) 2013-04-10 2016-03-01 Zeno Semiconductor, Inc. Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers
US9368625B2 (en) 2013-05-01 2016-06-14 Zeno Semiconductor, Inc. NAND string utilizing floating body memory cell
US9281022B2 (en) 2013-07-10 2016-03-08 Zeno Semiconductor, Inc. Systems and methods for reducing standby power in floating body memory devices
US9548119B2 (en) 2014-01-15 2017-01-17 Zeno Semiconductor, Inc Memory device comprising an electrically floating body transistor
US9496053B2 (en) 2014-08-15 2016-11-15 Zeno Semiconductor, Inc. Memory device comprising electrically floating body transistor
US10553683B2 (en) 2015-04-29 2020-02-04 Zeno Semiconductor, Inc. MOSFET and memory cell having improved drain current through back bias application
US9917507B2 (en) 2015-05-28 2018-03-13 Sandisk Technologies Llc Dynamic clock period modulation scheme for variable charge pump load currents
US11599185B2 (en) * 2015-07-22 2023-03-07 Synopsys, Inc. Internet of things (IoT) power and performance management technique and circuit methodology
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US10586790B2 (en) * 2018-03-30 2020-03-10 Arm Limited Periphery body biasing for memory applications
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US11600663B2 (en) 2019-01-11 2023-03-07 Zeno Semiconductor, Inc. Memory cell and memory array select transistor
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Cited By (51)

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JP2001351995A (ja) * 2000-06-08 2001-12-21 Mitsubishi Electric Corp 不揮発性半導体記憶装置及び半導体集積回路
US10812068B2 (en) 2001-10-10 2020-10-20 Psemi Corporation Switch circuit and method of switching radio frequency signals
US10797694B2 (en) 2001-10-10 2020-10-06 Psemi Corporation Switch circuit and method of switching radio frequency signals
US10790820B2 (en) 2001-10-10 2020-09-29 Psemi Corporation Switch circuit and method of switching radio frequency signals
US8583111B2 (en) 2001-10-10 2013-11-12 Peregrine Semiconductor Corporation Switch circuit and method of switching radio frequency signals
US10622993B2 (en) 2001-10-10 2020-04-14 Psemi Corporation Switch circuit and method of switching radio frequency signals
US9369087B2 (en) 2004-06-23 2016-06-14 Peregrine Semiconductor Corporation Integrated RF front end with stacked transistor switch
US8559907B2 (en) 2004-06-23 2013-10-15 Peregrine Semiconductor Corporation Integrated RF front end with stacked transistor switch
US8649754B2 (en) 2004-06-23 2014-02-11 Peregrine Semiconductor Corporation Integrated RF front end with stacked transistor switch
US9680416B2 (en) 2004-06-23 2017-06-13 Peregrine Semiconductor Corporation Integrated RF front end with stacked transistor switch
JP2006147756A (ja) * 2004-11-18 2006-06-08 Sony Corp 高周波トランジスタの設計方法、および、マルチフィンガーゲートを有する高周波トランジスタ
JP2006310860A (ja) * 2005-04-27 2006-11-09 Korea Advanced Inst Of Sci Technol バックバイアスを用いてｓｏｉ基板に形成されたフラッシュブロックを消去するためのフラッシュメモリ素子の製造方法、その消去方法及びその構造
US10797691B1 (en) 2005-07-11 2020-10-06 Psemi Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
US10680600B2 (en) 2005-07-11 2020-06-09 Psemi Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
US8954902B2 (en) 2005-07-11 2015-02-10 Peregrine Semiconductor Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
USRE48965E1 (en) 2005-07-11 2022-03-08 Psemi Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US9087899B2 (en) 2005-07-11 2015-07-21 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
USRE48944E1 (en) 2005-07-11 2022-02-22 Psemi Corporation Method and apparatus for use in improving linearity of MOSFETS using an accumulated charge sink
US10622990B2 (en) 2005-07-11 2020-04-14 Psemi Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
US10790390B2 (en) 2005-07-11 2020-09-29 Psemi Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
US10818796B2 (en) 2005-07-11 2020-10-27 Psemi Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US8742502B2 (en) 2005-07-11 2014-06-03 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
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