JP2000348493A5 - - Google Patents

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Publication number
JP2000348493A5
JP2000348493A5 JP1999156113A JP15611399A JP2000348493A5 JP 2000348493 A5 JP2000348493 A5 JP 2000348493A5 JP 1999156113 A JP1999156113 A JP 1999156113A JP 15611399 A JP15611399 A JP 15611399A JP 2000348493 A5 JP2000348493 A5 JP 2000348493A5
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JP
Japan
Prior art keywords
reference voltage
recording state
recording
threshold
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1999156113A
Other languages
English (en)
Japanese (ja)
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JP2000348493A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP15611399A priority Critical patent/JP2000348493A/ja
Priority claimed from JP15611399A external-priority patent/JP2000348493A/ja
Priority to US09/569,301 priority patent/US6246608B1/en
Publication of JP2000348493A publication Critical patent/JP2000348493A/ja
Publication of JP2000348493A5 publication Critical patent/JP2000348493A5/ja
Pending legal-status Critical Current

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JP15611399A 1999-06-03 1999-06-03 不揮発性メモリ回路 Pending JP2000348493A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP15611399A JP2000348493A (ja) 1999-06-03 1999-06-03 不揮発性メモリ回路
US09/569,301 US6246608B1 (en) 1999-06-03 2000-05-11 Non-volatile memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15611399A JP2000348493A (ja) 1999-06-03 1999-06-03 不揮発性メモリ回路

Publications (2)

Publication Number Publication Date
JP2000348493A JP2000348493A (ja) 2000-12-15
JP2000348493A5 true JP2000348493A5 (Direct) 2005-06-16

Family

ID=15620608

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15611399A Pending JP2000348493A (ja) 1999-06-03 1999-06-03 不揮発性メモリ回路

Country Status (2)

Country Link
US (1) US6246608B1 (Direct)
JP (1) JP2000348493A (Direct)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001273796A (ja) * 2000-03-29 2001-10-05 Nec Microsystems Ltd センスアンプ回路
JP4663094B2 (ja) * 2000-10-13 2011-03-30 株式会社半導体エネルギー研究所 半導体装置
US7087954B2 (en) * 2001-08-30 2006-08-08 Micron Technology, Inc. In service programmable logic arrays with low tunnel barrier interpoly insulators
EP1324342B1 (en) * 2001-12-28 2008-07-16 STMicroelectronics S.r.l. Programming method for a multilevel memory cell
US6829174B2 (en) * 2003-01-30 2004-12-07 Macronix International Co., Ltd. Method of narrowing threshold voltage distribution
EP1503384A3 (en) * 2003-07-21 2007-07-18 Macronix International Co., Ltd. Method of programming memory
US6778437B1 (en) * 2003-08-07 2004-08-17 Advanced Micro Devices, Inc. Memory circuit for providing word line redundancy in a memory sector
US7177200B2 (en) * 2004-02-10 2007-02-13 Msystems Ltd. Two-phase programming of a flash memory
JP4223427B2 (ja) * 2004-03-30 2009-02-12 株式会社ルネサステクノロジ 不揮発性半導体記憶装置及びそのデータ書き換え方法
JP2006286118A (ja) * 2005-04-01 2006-10-19 Matsushita Electric Ind Co Ltd 閾値電圧制御機能を有する不揮発性記憶装置
KR100706797B1 (ko) 2005-08-23 2007-04-12 삼성전자주식회사 각각의 워드 라인에 다른 레벨의 소거 전압을 인가하는낸드 플래시 메모리 장치
US7224619B2 (en) * 2005-09-09 2007-05-29 Macronix International Co., Ltd. Method and apparatus for protection from over-erasing nonvolatile memory cells
US7403427B2 (en) * 2005-11-21 2008-07-22 Elite Semiconductor Memory Technology, Inc. Method and apparatus for reducing stress in word line driver transistors during erasure
US7394714B2 (en) * 2006-09-07 2008-07-01 Taiwan Semiconductor Manufacturing Co., Ltd. Circuit implementation of a dynamic power supply for SRAM core array
JP2009252255A (ja) * 2008-04-01 2009-10-29 Renesas Technology Corp 不揮発性半導体記憶装置
US7852695B2 (en) * 2008-06-17 2010-12-14 Oracle America, Inc. Single-ended differential signal amplification and data reading
JPWO2011043012A1 (ja) * 2009-10-05 2013-02-28 パナソニック株式会社 不揮発性半導体記憶装置、信号処理システム、及び信号処理システムの制御方法、並びに不揮発性半導体記憶装置の書き換え方法
US8149607B2 (en) * 2009-12-21 2012-04-03 Sandisk 3D Llc Rewritable memory device with multi-level, write-once memory cells
KR101082756B1 (ko) * 2010-07-09 2011-11-10 주식회사 하이닉스반도체 반도체 메모리 소자의 동작 방법
JP2012069199A (ja) * 2010-09-22 2012-04-05 Toshiba Corp 半導体記憶装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07105148B2 (ja) 1988-02-24 1995-11-13 日本電気株式会社 不揮発性半導体記憶装置
JP3392604B2 (ja) 1995-11-14 2003-03-31 株式会社東芝 不揮発性半導体記憶装置
KR100223868B1 (ko) * 1996-07-12 1999-10-15 구본준 비휘발성 메모리를 프로그램하는 방법
JP3114630B2 (ja) * 1996-10-03 2000-12-04 日本電気株式会社 不揮発性半導体メモリおよび書込み読出し方法
JPH1125681A (ja) * 1997-06-27 1999-01-29 Nec Corp 不揮発性半導体記憶装置

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