JP2000293427A5 - - Google Patents

Download PDF

Info

Publication number
JP2000293427A5
JP2000293427A5 JP1999098019A JP9801999A JP2000293427A5 JP 2000293427 A5 JP2000293427 A5 JP 2000293427A5 JP 1999098019 A JP1999098019 A JP 1999098019A JP 9801999 A JP9801999 A JP 9801999A JP 2000293427 A5 JP2000293427 A5 JP 2000293427A5
Authority
JP
Japan
Prior art keywords
data
data input
receives
address
flash memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1999098019A
Other languages
English (en)
Other versions
JP4141581B2 (ja
JP2000293427A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP09801999A priority Critical patent/JP4141581B2/ja
Priority claimed from JP09801999A external-priority patent/JP4141581B2/ja
Priority to US09/395,941 priority patent/US6434658B1/en
Publication of JP2000293427A publication Critical patent/JP2000293427A/ja
Publication of JP2000293427A5 publication Critical patent/JP2000293427A5/ja
Application granted granted Critical
Publication of JP4141581B2 publication Critical patent/JP4141581B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

図１を参照して、記憶装置１は、ホストシステム１２と記憶する外部データの授受を行なうためのものであり、ホストシステムからメディアアドレスを受けてアドレス変換を行い、ホストシステムとの間で外部データを授受するためにデータ変換を行うデータ入出力部９と、データ入出力部９が変換したアドレス信号に応じてデータ授受を行うフラッシュメモリ１０とを含む。データ入出力部９はフラッシュメモリ１０が入出力するデータと外部データとの間のデータの変換を行う。
尚、説明の便宜のため、図２７にはバッファメモリ５４が記載されている。バッファメモリ５４は、ＳＣカウンタ７６の計数値９ビットをアドレス信号ＡＤＲとして受け、ライトセクタイネーブル信号ＷＳＥ♯をアウトプットイネーブル信号／ＯＥ♯として受け、ゲート回路７８の出力をライトイネーブル信号／ＷＥ♯として受けこれらに応答してフラッシュメモリからのデータ入力ＤＩを受けて保持し、またはフラッシュメモリへデータ出力ＤＯを送出する。
【図１７】 メディアセクタアドレスをフラッシュセクタアドレスとスター
トカラムアドレスとに変換を説明するための図である。
【図１８】 スタートカラムアドレスとメディアセクタアドレスの下位２ビ
ットとの関係を示す図である。
JP09801999A 1999-04-05 1999-04-05 フラッシュメモリを搭載する記憶装置 Expired - Fee Related JP4141581B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP09801999A JP4141581B2 (ja) 1999-04-05 1999-04-05 フラッシュメモリを搭載する記憶装置
US09/395,941 US6434658B1 (en) 1999-04-05 1999-09-14 Memory device operable with a small-capacity buffer memory and having a flash memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP09801999A JP4141581B2 (ja) 1999-04-05 1999-04-05 フラッシュメモリを搭載する記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008122579A Division JP4731584B2 (ja) 2008-05-08 2008-05-08 フラッシュメモリを搭載する記憶装置

Publications (3)

Publication Number Publication Date
JP2000293427A JP2000293427A (ja) 2000-10-20
JP2000293427A5 true JP2000293427A5 (ja) 2005-11-04
JP4141581B2 JP4141581B2 (ja) 2008-08-27

Family

ID=14208160

Family Applications (1)

Application Number Title Priority Date Filing Date
JP09801999A Expired - Fee Related JP4141581B2 (ja) 1999-04-05 1999-04-05 フラッシュメモリを搭載する記憶装置

Country Status (2)

Country Link
US (1) US6434658B1 (ja)
JP (1) JP4141581B2 (ja)

Families Citing this family (61)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6684289B1 (en) * 2000-11-22 2004-01-27 Sandisk Corporation Techniques for operating non-volatile memory systems with data sectors having different sizes than the sizes of the pages and/or blocks of the memory
JP4711531B2 (ja) * 2001-03-23 2011-06-29 ルネサスエレクトロニクス株式会社 半導体記憶装置
JP4082913B2 (ja) * 2002-02-07 2008-04-30 株式会社ルネサステクノロジ メモリシステム
WO2003085677A1 (fr) * 2002-04-05 2003-10-16 Renesas Technology Corp. Memoire non volatile
US7174348B1 (en) * 2002-11-26 2007-02-06 Unisys Corporation Computer program having an object module and a software development tool integration module which automatically interlink artifacts generated in different phases of a software project
US7406628B2 (en) * 2003-07-15 2008-07-29 Seagate Technology Llc Simulated error injection system in target device for testing host system
US7173852B2 (en) * 2003-10-03 2007-02-06 Sandisk Corporation Corrected data storage and handling methods
KR100528482B1 (ko) * 2003-12-31 2005-11-15 삼성전자주식회사 데이타를 섹터 단위로 랜덤하게 입출력할 수 있는 플래시메모리 시스템
US7600087B2 (en) * 2004-01-15 2009-10-06 Hitachi, Ltd. Distributed remote copy system
KR100606242B1 (ko) * 2004-01-30 2006-07-31 삼성전자주식회사 불휘발성 메모리와 호스트간에 버퍼링 동작을 수행하는멀티 포트 휘발성 메모리 장치, 이를 이용한 멀티-칩패키지 반도체 장치 및 이를 이용한 데이터 처리장치
JP2005285191A (ja) * 2004-03-29 2005-10-13 Nec Electronics Corp 不揮発性半導体記憶装置及びその駆動方法
JP4713867B2 (ja) * 2004-09-22 2011-06-29 株式会社東芝 メモリコントローラ，メモリ装置及びメモリコントローラの制御方法
US7395404B2 (en) * 2004-12-16 2008-07-01 Sandisk Corporation Cluster auto-alignment for storing addressable data packets in a non-volatile memory array
US7315916B2 (en) * 2004-12-16 2008-01-01 Sandisk Corporation Scratch pad block
US7412560B2 (en) 2004-12-16 2008-08-12 Sandisk Corporation Non-volatile memory and method with multi-stream updating
US7366826B2 (en) * 2004-12-16 2008-04-29 Sandisk Corporation Non-volatile memory and method with multi-stream update tracking
US7386655B2 (en) 2004-12-16 2008-06-10 Sandisk Corporation Non-volatile memory and method with improved indexing for scratch pad and update blocks
KR100666169B1 (ko) * 2004-12-17 2007-01-09 삼성전자주식회사 플래쉬 메모리 데이터 저장장치
KR100737913B1 (ko) * 2005-10-04 2007-07-10 삼성전자주식회사 반도체 메모리 장치의 읽기 방법
KR100660553B1 (ko) 2005-10-18 2006-12-22 삼성전자주식회사 데이터 버스트 주파수를 증가시킬 수 있는 원낸드 플래시메모리 장치
US20070100893A1 (en) * 2005-10-31 2007-05-03 Sigmatel, Inc. System and method for accessing data from a memory device
JP4661748B2 (ja) * 2006-09-22 2011-03-30 Ｔｄｋ株式会社 メモリコントローラ及びメモリコントローラを備えるフラッシュメモリシステム、並びにフラッシュメモリの制御方法
JP2008112285A (ja) * 2006-10-30 2008-05-15 Toshiba Corp 不揮発性メモリシステム
JP4498341B2 (ja) * 2006-11-20 2010-07-07 株式会社東芝 メモリシステム
KR100898653B1 (ko) * 2007-07-25 2009-05-22 주식회사 하이닉스반도체 플래시 메모리 소자 및 프로그램 방법
US9201790B2 (en) * 2007-10-09 2015-12-01 Seagate Technology Llc System and method of matching data rates
US8959307B1 (en) 2007-11-16 2015-02-17 Bitmicro Networks, Inc. Reduced latency memory read transactions in storage devices
US9135190B1 (en) 2009-09-04 2015-09-15 Bitmicro Networks, Inc. Multi-profile memory controller for computing devices
US8665601B1 (en) 2009-09-04 2014-03-04 Bitmicro Networks, Inc. Solid state drive with improved enclosure assembly
US8447908B2 (en) 2009-09-07 2013-05-21 Bitmicro Networks, Inc. Multilevel memory bus system for solid-state mass storage
US8560804B2 (en) * 2009-09-14 2013-10-15 Bitmicro Networks, Inc. Reducing erase cycles in an electronic storage device that uses at least one erase-limited memory device
US9372755B1 (en) 2011-10-05 2016-06-21 Bitmicro Networks, Inc. Adaptive power cycle sequences for data recovery
US9043669B1 (en) 2012-05-18 2015-05-26 Bitmicro Networks, Inc. Distributed ECC engine for storage media
KR20140082173A (ko) * 2012-12-24 2014-07-02 에스케이하이닉스 주식회사 어드레스 카운팅 회로 및 이를 이용한 반도체 장치
US9652376B2 (en) * 2013-01-28 2017-05-16 Radian Memory Systems, Inc. Cooperative flash memory control
US9423457B2 (en) 2013-03-14 2016-08-23 Bitmicro Networks, Inc. Self-test solution for delay locked loops
US9934045B1 (en) 2013-03-15 2018-04-03 Bitmicro Networks, Inc. Embedded system boot from a storage device
US10489318B1 (en) 2013-03-15 2019-11-26 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US9430386B2 (en) 2013-03-15 2016-08-30 Bitmicro Networks, Inc. Multi-leveled cache management in a hybrid storage system
US9720603B1 (en) 2013-03-15 2017-08-01 Bitmicro Networks, Inc. IOC to IOC distributed caching architecture
US10120694B2 (en) 2013-03-15 2018-11-06 Bitmicro Networks, Inc. Embedded system boot from a storage device
US9842024B1 (en) 2013-03-15 2017-12-12 Bitmicro Networks, Inc. Flash electronic disk with RAID controller
US9971524B1 (en) 2013-03-15 2018-05-15 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US9916213B1 (en) 2013-03-15 2018-03-13 Bitmicro Networks, Inc. Bus arbitration with routing and failover mechanism
US9875205B1 (en) 2013-03-15 2018-01-23 Bitmicro Networks, Inc. Network of memory systems
US9798688B1 (en) 2013-03-15 2017-10-24 Bitmicro Networks, Inc. Bus arbitration with routing and failover mechanism
US9734067B1 (en) 2013-03-15 2017-08-15 Bitmicro Networks, Inc. Write buffering
US9501436B1 (en) 2013-03-15 2016-11-22 Bitmicro Networks, Inc. Multi-level message passing descriptor
US9400617B2 (en) 2013-03-15 2016-07-26 Bitmicro Networks, Inc. Hardware-assisted DMA transfer with dependency table configured to permit-in parallel-data drain from cache without processor intervention when filled or drained
US9672178B1 (en) 2013-03-15 2017-06-06 Bitmicro Networks, Inc. Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system
US10025736B1 (en) 2014-04-17 2018-07-17 Bitmicro Networks, Inc. Exchange message protocol message transmission between two devices
US10042792B1 (en) 2014-04-17 2018-08-07 Bitmicro Networks, Inc. Method for transferring and receiving frames across PCI express bus for SSD device
US9811461B1 (en) 2014-04-17 2017-11-07 Bitmicro Networks, Inc. Data storage system
US10055150B1 (en) 2014-04-17 2018-08-21 Bitmicro Networks, Inc. Writing volatile scattered memory metadata to flash device
US10078604B1 (en) 2014-04-17 2018-09-18 Bitmicro Networks, Inc. Interrupt coalescing
US9952991B1 (en) 2014-04-17 2018-04-24 Bitmicro Networks, Inc. Systematic method on queuing of descriptors for multiple flash intelligent DMA engine operation
US10552050B1 (en) 2017-04-07 2020-02-04 Bitmicro Llc Multi-dimensional computer storage system
FR3065303B1 (fr) * 2017-04-12 2019-06-07 Stmicroelectronics (Rousset) Sas Procede d'ecriture dans un dispositif de memoire non volatile et dispositif de memoire non volatile correspondant
US11030148B2 (en) * 2018-04-04 2021-06-08 Lawrence Livermore National Security, Llc Massively parallel hierarchical control system and method
JP2022074450A (ja) * 2020-11-04 2022-05-18 キオクシア株式会社 メモリカード、メモリシステム、及びファイルの断片化解消方法
KR20220060372A (ko) * 2020-11-04 2022-05-11 에스케이하이닉스 주식회사 메모리 시스템 및 그것의 동작방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08137634A (ja) * 1994-11-09 1996-05-31 Mitsubishi Electric Corp フラッシュディスクカード
JPH08212019A (ja) * 1995-01-31 1996-08-20 Mitsubishi Electric Corp 半導体ディスク装置
US5765002A (en) * 1995-03-13 1998-06-09 Intel Corporation Method and apparatus for minimizing power consumption in a microprocessor controlled storage device
JPH09244961A (ja) * 1996-03-08 1997-09-19 Mitsubishi Electric Corp フラッシュａｔａ−ｐｃカード
JPH10207726A (ja) 1997-01-23 1998-08-07 Oki Electric Ind Co Ltd 半導体ディスク装置
JP3544859B2 (ja) * 1998-05-11 2004-07-21 富士通株式会社 不揮発性半導体メモリを使用した２次記憶装置

Similar Documents

Publication Publication Date Title
JP2000293427A5 (ja)
DE69627094D1 (de) Speicherplattenanordnungs-Steuervorrichtung zur Durchführung von Exklusif-ODER-Operationen
JP6761104B2 (ja) 半導体記憶システム
TWI285893B (en) Hybrid MRAM memory array architecture
TW201839763A (zh) 平行存取多個快閃記憶體的控制架構
JP2003303492A5 (ja)
JP2000039985A5 (ja)
GB2289356A (en) Serial access memory device
KR970029620A (ko) 마이크로 제어유닛을 접속하는 외부팽창 버스 인터패이스회로 및 이 외부팽창 버스 인터패이스 회로를 결합하는 디지탈 기록 및 재생장치
US7581072B2 (en) Method and device for data buffering
JP2004530243A5 (ja)
TW200535623A (en) Expansible time-division bus structure of enhanced type
JP3298536B2 (ja) 半導体記憶装置
WO1997039453A1 (fr) Systeme de camera video et circuit de memoire d'images a semi-conducteur utilise dans ce systeme
JPH0863969A (ja) 半導体記憶装置
US6553451B2 (en) Memory command converter and application system
JP4940894B2 (ja) 同期型メモリ回路
JP2002335466A5 (ja)
JPH0630846U (ja) マイクロプロセッサ装置
JPS6182588A (ja) 半導体記憶装置
KR20040019940A (ko) 액세스 회로
JPH01164562U (ja)
JPS62157934A (ja) メモリ・アドレス方式
JP2002351812A (ja) メモリアクセス回路
KR100338957B1 (ko) 논-버스트 모드 지원장치