JP2000150678A - 不揮発性半導体記憶装置およびその製造方法 - Google Patents

不揮発性半導体記憶装置およびその製造方法

Info

Publication number
JP2000150678A
JP2000150678A JP10319415A JP31941598A JP2000150678A JP 2000150678 A JP2000150678 A JP 2000150678A JP 10319415 A JP10319415 A JP 10319415A JP 31941598 A JP31941598 A JP 31941598A JP 2000150678 A JP2000150678 A JP 2000150678A
Authority
JP
Japan
Prior art keywords
gate
insulating film
gate electrode
side wall
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10319415A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000150678A5 (enExample
Inventor
Kenji Kawai
健治 川井
Hajime Kimura
肇 木村
Kazuyuki Omi
和幸 大見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10319415A priority Critical patent/JP2000150678A/ja
Priority to US09/286,421 priority patent/US6228712B1/en
Publication of JP2000150678A publication Critical patent/JP2000150678A/ja
Priority to US09/790,700 priority patent/US6452226B2/en
Publication of JP2000150678A5 publication Critical patent/JP2000150678A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
JP10319415A 1998-11-10 1998-11-10 不揮発性半導体記憶装置およびその製造方法 Pending JP2000150678A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP10319415A JP2000150678A (ja) 1998-11-10 1998-11-10 不揮発性半導体記憶装置およびその製造方法
US09/286,421 US6228712B1 (en) 1998-11-10 1999-04-06 Non-volatile semiconductor memory device and manufacturing method thereof
US09/790,700 US6452226B2 (en) 1998-11-10 2001-02-23 Non-volatile semiconductor memory device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10319415A JP2000150678A (ja) 1998-11-10 1998-11-10 不揮発性半導体記憶装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2000150678A true JP2000150678A (ja) 2000-05-30
JP2000150678A5 JP2000150678A5 (enExample) 2005-12-22

Family

ID=18109947

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10319415A Pending JP2000150678A (ja) 1998-11-10 1998-11-10 不揮発性半導体記憶装置およびその製造方法

Country Status (2)

Country Link
US (2) US6228712B1 (enExample)
JP (1) JP2000150678A (enExample)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6943082B2 (en) 2002-03-05 2005-09-13 Seiko Epson Corporation Method for manufacturing a nonvolatile memory device
JP2005537671A (ja) * 2002-09-04 2005-12-08 インフィネオン テクノロジーズ アクチエンゲゼルシャフト フラッシュメモリーセル、および、個別の側壁を酸化する方法
JP2006310600A (ja) * 2005-04-28 2006-11-09 Toshiba Corp 半導体装置およびその製造方法
KR100684452B1 (ko) 2004-12-29 2007-02-16 동부일렉트로닉스 주식회사 플래시 메모리 소자의 유전막 식각 방법
JP2007188961A (ja) * 2006-01-11 2007-07-26 Toshiba Corp 半導体記憶装置及びその製造方法
JP2009231592A (ja) * 2008-03-24 2009-10-08 Nec Electronics Corp 半導体装置の製造方法
JP2012033530A (ja) * 2010-07-28 2012-02-16 Fujitsu Semiconductor Ltd 半導体装置及びその製造方法
US9451692B2 (en) 2013-09-06 2016-09-20 Canon Kabushiki Kaisha Print element substrate, method of manufacturing the same, printhead and printing apparatus

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6238998B1 (en) * 1998-11-20 2001-05-29 International Business Machines Corporation Shallow trench isolation on a silicon substrate using nitrogen implant into the side wall
JP3345880B2 (ja) * 1999-06-29 2002-11-18 日本電気株式会社 不揮発性メモリセルと電界効果トランジスタとを備えた半導体装置およびその製造方法
TW552669B (en) * 2000-06-19 2003-09-11 Infineon Technologies Corp Process for etching polysilicon gate stacks with raised shallow trench isolation structures
US6569735B2 (en) * 2001-03-20 2003-05-27 Macronix International Co., Ltd. Manufacturing method for isolation on non-volatile memory
US6699777B2 (en) * 2001-10-04 2004-03-02 Micron Technology, Inc. Etch stop layer in poly-metal structures
US6677211B2 (en) * 2002-01-14 2004-01-13 Macronix International Co., Ltd. Method for eliminating polysilicon residue
JP2004031546A (ja) * 2002-06-25 2004-01-29 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
US20040209468A1 (en) * 2003-04-17 2004-10-21 Applied Materials Inc. Method for fabricating a gate structure of a field effect transistor
US6777299B1 (en) * 2003-07-07 2004-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Method for removal of a spacer
US7508075B2 (en) * 2003-08-01 2009-03-24 Micron Technology, Inc. Self-aligned poly-metal structures
US7091098B2 (en) * 2004-04-07 2006-08-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with spacer having batch and non-batch layers
US6984563B1 (en) * 2004-07-01 2006-01-10 Fasl Llc Floating gate semiconductor component and method of manufacture
US7425482B2 (en) * 2004-10-13 2008-09-16 Magna-Chip Semiconductor, Ltd. Non-volatile memory device and method for fabricating the same
US20060102197A1 (en) * 2004-11-16 2006-05-18 Kang-Lie Chiang Post-etch treatment to remove residues
US7679130B2 (en) 2005-05-10 2010-03-16 Infineon Technologies Ag Deep trench isolation structures and methods of formation thereof
JP2007005380A (ja) * 2005-06-21 2007-01-11 Toshiba Corp 半導体装置
US20070004141A1 (en) * 2005-07-04 2007-01-04 Hynix Semiconductor Inc. Method of manufacturing flash memory device
US7535060B2 (en) * 2006-03-08 2009-05-19 Freescale Semiconductor, Inc. Charge storage structure formation in transistor with vertical channel region
KR100981530B1 (ko) * 2008-05-26 2010-09-10 주식회사 하이닉스반도체 반도체 소자 및 이의 제조 방법
KR101085620B1 (ko) * 2009-06-25 2011-11-22 주식회사 하이닉스반도체 불휘발성 메모리 소자의 게이트 패턴 형성방법
CN102420193B (zh) * 2010-09-25 2013-07-17 中芯国际集成电路制造(上海)有限公司 存储器件的制造方法
KR20120089513A (ko) 2010-12-13 2012-08-13 삼성전자주식회사 비휘발성 기억 소자 및 그 제조 방법
US8389356B2 (en) * 2011-03-10 2013-03-05 Wafertech, Llc Flash cell with floating gate transistors formed using spacer technology
KR20120120729A (ko) * 2011-04-25 2012-11-02 에스케이하이닉스 주식회사 반도체장치의 금속패턴 제조 방법
US20140306286A1 (en) * 2013-04-10 2014-10-16 International Business Machines Corporation Tapered fin field effect transistor
CN104752360B (zh) * 2013-12-30 2018-11-16 中芯国际集成电路制造(上海)有限公司 存储器件及其形成方法
CN111430357B (zh) * 2020-04-10 2023-07-04 长江存储科技有限责任公司 三维存储器的形成方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0817235B2 (ja) * 1990-08-29 1996-02-21 株式会社東芝 オフセットゲート構造トランジスタおよびその製造方法
US5342801A (en) * 1993-03-08 1994-08-30 National Semiconductor Corporation Controllable isotropic plasma etching technique for the suppression of stringers in memory cells
JP3675500B2 (ja) * 1994-09-02 2005-07-27 株式会社東芝 不揮発性半導体記憶装置
JPH08148584A (ja) 1994-11-22 1996-06-07 Mitsubishi Electric Corp 半導体装置とその製造方法
JPH10107163A (ja) 1996-09-27 1998-04-24 Hitachi Ltd 半導体集積回路装置及びその製造方法
US5973353A (en) * 1997-12-18 1999-10-26 Advanced Micro Devices, Inc. Methods and arrangements for forming a tapered floating gate in non-volatile memory semiconductor devices

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6943082B2 (en) 2002-03-05 2005-09-13 Seiko Epson Corporation Method for manufacturing a nonvolatile memory device
JP2005537671A (ja) * 2002-09-04 2005-12-08 インフィネオン テクノロジーズ アクチエンゲゼルシャフト フラッシュメモリーセル、および、個別の側壁を酸化する方法
KR100684452B1 (ko) 2004-12-29 2007-02-16 동부일렉트로닉스 주식회사 플래시 메모리 소자의 유전막 식각 방법
JP2006310600A (ja) * 2005-04-28 2006-11-09 Toshiba Corp 半導体装置およびその製造方法
JP2007188961A (ja) * 2006-01-11 2007-07-26 Toshiba Corp 半導体記憶装置及びその製造方法
JP2009231592A (ja) * 2008-03-24 2009-10-08 Nec Electronics Corp 半導体装置の製造方法
JP2012033530A (ja) * 2010-07-28 2012-02-16 Fujitsu Semiconductor Ltd 半導体装置及びその製造方法
US8288226B2 (en) 2010-07-28 2012-10-16 Fujitsu Semiconductor Limited Semiconductor device and method of manufacturing semiconductor device
US8772882B2 (en) 2010-07-28 2014-07-08 Fujitsu Semiconductor Limited Semiconductor device and method of manufacturing semiconductor device
US9451692B2 (en) 2013-09-06 2016-09-20 Canon Kabushiki Kaisha Print element substrate, method of manufacturing the same, printhead and printing apparatus

Also Published As

Publication number Publication date
US6228712B1 (en) 2001-05-08
US6452226B2 (en) 2002-09-17
US20010019150A1 (en) 2001-09-06

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