JP2000138568A - クロック信号切り換え装置 - Google Patents

クロック信号切り換え装置

Info

Publication number
JP2000138568A
JP2000138568A JP11161930A JP16193099A JP2000138568A JP 2000138568 A JP2000138568 A JP 2000138568A JP 11161930 A JP11161930 A JP 11161930A JP 16193099 A JP16193099 A JP 16193099A JP 2000138568 A JP2000138568 A JP 2000138568A
Authority
JP
Japan
Prior art keywords
signal
clock signal
input clock
output
handshake
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11161930A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000138568A5 (enExample
Inventor
John P Miller
ジョン・ピー・ミラー
Michael S Vacanti
マイケル・エス・バカンティ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JP2000138568A publication Critical patent/JP2000138568A/ja
Publication of JP2000138568A5 publication Critical patent/JP2000138568A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08—Clock generators with changeable or programmable clock frequency

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Manipulation Of Pulses (AREA)
JP11161930A 1998-06-30 1999-06-09 クロック信号切り換え装置 Pending JP2000138568A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/107,118 US6275546B1 (en) 1998-06-30 1998-06-30 Glitchless clock switch circuit
US107,118 1998-06-30

Publications (2)

Publication Number Publication Date
JP2000138568A true JP2000138568A (ja) 2000-05-16
JP2000138568A5 JP2000138568A5 (enExample) 2005-03-10

Family

ID=22314947

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11161930A Pending JP2000138568A (ja) 1998-06-30 1999-06-09 クロック信号切り換え装置

Country Status (3)

Country Link
US (1) US6275546B1 (enExample)
EP (1) EP0969350A3 (enExample)
JP (1) JP2000138568A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008103863A (ja) * 2006-10-18 2008-05-01 Nec Corp クロック非同期切替装置およびノイズキャンセル回路ならびにノイズキャンセル方法およびプログラム
WO2008114446A1 (ja) * 2007-03-20 2008-09-25 Fujitsu Microelectronics Limited クロック信号選択回路

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6792500B1 (en) * 1998-07-08 2004-09-14 Broadcom Corporation Apparatus and method for managing memory defects
US6323715B1 (en) * 1999-12-30 2001-11-27 Koninklijke Philips Electronics N.V. (Kpeuv) Method and apparatus for selecting a clock signal without producing a glitch
US6535048B1 (en) * 2000-02-08 2003-03-18 Infineon Technologies North America Corp. Secure asynchronous clock multiplexer
JP3587162B2 (ja) 2000-10-31 2004-11-10 セイコーエプソン株式会社 データ転送制御装置及び電子機器
US7039146B2 (en) * 2001-01-16 2006-05-02 Advanced Micro Devices, Inc. Method and interface for glitch-free clock switching
US6885714B1 (en) * 2001-05-24 2005-04-26 Cypress Semiconductor Corp. Independently roving range control
EP1263139A3 (en) * 2001-05-30 2006-07-05 STMicroelectronics Limited Glitch-free multiplexer
US6774681B2 (en) 2001-05-30 2004-08-10 Stmicroelectronics Limited Switchable clock source
US6982573B2 (en) 2001-05-30 2006-01-03 Stmicroelectronics Limited Switchable clock source
US6600345B1 (en) * 2001-11-15 2003-07-29 Analog Devices, Inc. Glitch free clock select switch
KR100437833B1 (ko) * 2001-12-28 2004-06-30 주식회사 하이닉스반도체 클럭신호 스위치 회로
US7003683B2 (en) * 2002-01-31 2006-02-21 Stmicroelectronics. Inc. Glitchless clock selection circuit
JP3542351B2 (ja) * 2002-11-18 2004-07-14 沖電気工業株式会社 クロック切り替え回路
US6873183B1 (en) 2003-05-12 2005-03-29 Xilinx, Inc. Method and circuit for glitchless clock control
US6975145B1 (en) 2003-06-02 2005-12-13 Xilinx, Inc. Glitchless dynamic multiplexer with synchronous and asynchronous controls
KR20050099714A (ko) * 2004-04-12 2005-10-17 삼성전자주식회사 고집적 저전력 글리치리스 클럭 선택회로 및 이를구비하는 디지털 프로세싱 시스템
US7129765B2 (en) 2004-04-30 2006-10-31 Xilinx, Inc. Differential clock tree in an integrated circuit
US8073042B1 (en) 2005-04-13 2011-12-06 Cypress Semiconductor Corporation Recursive range controller
EP1731985A1 (en) * 2005-06-06 2006-12-13 STMicroelectronics S.r.l. A circuit for clock switching in clocked electronic devices and method therefor
DE102006026914B4 (de) * 2006-06-09 2008-02-28 Atmel Germany Gmbh Verfahren zum Umschalten eines Systemtakts und Taktsynchronisierungsvorrichtung
US20080012605A1 (en) * 2006-07-12 2008-01-17 Eastman Kodak Company Glitch-free clock switcher
US7471120B2 (en) * 2007-05-15 2008-12-30 Broadcom Corporation Clock switch for generation of multi-frequency clock signal
US7944241B1 (en) * 2010-01-29 2011-05-17 Stmicroelectronics Pvt. Ltd. Circuit for glitchless switching between asynchronous clocks
US9207704B2 (en) * 2012-10-26 2015-12-08 Silicon Laboratories, Inc. Glitchless clock switching that handles stopped clocks
US8896347B2 (en) * 2013-03-29 2014-11-25 Hamilton Sundstrand Corporation Synchronous input signal capture system
JP5880603B2 (ja) * 2014-03-19 2016-03-09 日本電気株式会社 クロック発生装置、サーバシステムおよびクロック制御方法
US20160037123A1 (en) * 2014-07-31 2016-02-04 At&T Intellectual Property I, Lp System and method for input sensing for internet protocol encoders
CN105490675A (zh) * 2014-09-16 2016-04-13 深圳市中兴微电子技术有限公司 时钟动态切换方法及装置
CN105406984B (zh) * 2015-10-22 2019-05-31 上海斐讯数据通信技术有限公司 一种实现主备倒换背板时钟的系统及方法
CN111262558B (zh) * 2020-02-25 2023-05-26 云知声智能科技股份有限公司 一种快速无毛刺时钟切换电路实现方法及系统
CN115441855B (zh) * 2022-08-18 2025-04-18 成都华微电子科技股份有限公司 支持可测性设计的无毛刺多时钟切换电路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4853653A (en) * 1988-04-25 1989-08-01 Rockwell International Corporation Multiple input clock selector
US5289050A (en) * 1991-03-29 1994-02-22 Victor Company Of Japan, Ltd. Clock signal selection circuit
US5726593A (en) * 1992-10-27 1998-03-10 Nokia Telecommunications Oy Method and circuit for switching between a pair of asynchronous clock signals
EP0616280A1 (en) * 1993-03-04 1994-09-21 Advanced Micro Devices, Inc. Clock switcher circuit
US5638083A (en) * 1993-07-07 1997-06-10 Chips And Technologies, Inc. System for allowing synchronous sleep mode operation within a computer
US5572718A (en) * 1994-06-14 1996-11-05 Intel Corporation Mechanism for dynamically determining and distributing computer system clocks
US5903746A (en) * 1996-11-04 1999-05-11 Texas Instruments Incorporated Apparatus and method for automatically sequencing clocks in a data processing system when entering or leaving a low power state
US5790609A (en) * 1996-11-04 1998-08-04 Texas Instruments Incorporated Apparatus for cleanly switching between various clock sources in a data processing system
US6094727A (en) * 1998-06-23 2000-07-25 Micron Technology, Inc. Method and apparatus for controlling the data rate of a clocking circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008103863A (ja) * 2006-10-18 2008-05-01 Nec Corp クロック非同期切替装置およびノイズキャンセル回路ならびにノイズキャンセル方法およびプログラム
WO2008114446A1 (ja) * 2007-03-20 2008-09-25 Fujitsu Microelectronics Limited クロック信号選択回路
US8013637B2 (en) 2007-03-20 2011-09-06 Fujitsu Semiconductor Limited Clock signal selection circuit
JP4790060B2 (ja) * 2007-03-20 2011-10-12 富士通セミコンダクター株式会社 クロック信号選択回路

Also Published As

Publication number Publication date
EP0969350A3 (en) 2001-01-31
US6275546B1 (en) 2001-08-14
EP0969350A2 (en) 2000-01-05

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