IT9048184A0 - Schiera di memoria a semiconduttori - Google Patents

Schiera di memoria a semiconduttori

Info

Publication number
IT9048184A0
IT9048184A0 IT9048184A IT4818490A IT9048184A0 IT 9048184 A0 IT9048184 A0 IT 9048184A0 IT 9048184 A IT9048184 A IT 9048184A IT 4818490 A IT4818490 A IT 4818490A IT 9048184 A0 IT9048184 A0 IT 9048184A0
Authority
IT
Italy
Prior art keywords
semiconductor memory
memory arrangement
arrangement
semiconductor
memory
Prior art date
Application number
IT9048184A
Other languages
English (en)
Other versions
IT1241519B (it
IT9048184A1 (it
Inventor
Su-In Cho
Dong-Il Shu
Dong-Sun Min
Young-Rae Kim
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of IT9048184A0 publication Critical patent/IT9048184A0/it
Publication of IT9048184A1 publication Critical patent/IT9048184A1/it
Application granted granted Critical
Publication of IT1241519B publication Critical patent/IT1241519B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/14Word line organisation; Word line lay-out
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
IT48184A 1989-12-29 1990-07-31 Schiera di memoria a semiconduttori IT1241519B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890020104A KR930001738B1 (ko) 1989-12-29 1989-12-29 반도체 메모리장치의 워드라인 드라이버 배치방법

Publications (3)

Publication Number Publication Date
IT9048184A0 true IT9048184A0 (it) 1990-07-31
IT9048184A1 IT9048184A1 (it) 1992-01-31
IT1241519B IT1241519B (it) 1994-01-17

Family

ID=19294145

Family Applications (1)

Application Number Title Priority Date Filing Date
IT48184A IT1241519B (it) 1989-12-29 1990-07-31 Schiera di memoria a semiconduttori

Country Status (7)

Country Link
JP (1) JPH03203892A (it)
KR (1) KR930001738B1 (it)
CN (1) CN1052965A (it)
DE (1) DE4005990A1 (it)
FR (1) FR2656727A1 (it)
GB (1) GB2239540A (it)
IT (1) IT1241519B (it)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102270490A (zh) * 2011-03-29 2011-12-07 西安华芯半导体有限公司 一种大容量dram芯片存储阵列结构
WO2016018328A1 (en) 2014-07-31 2016-02-04 Hewlett-Packard Development Company, L.P. Crossbar arrays with shared drivers
CN112464502B (zh) * 2020-12-28 2022-02-01 芯天下技术股份有限公司 优化加快存储器仿真验证方法、装置、存储介质和终端

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059677B2 (ja) * 1981-08-19 1985-12-26 富士通株式会社 半導体記憶装置
JPS59124092A (ja) * 1982-12-29 1984-07-18 Fujitsu Ltd メモリ装置
JPS60167193A (ja) * 1984-02-09 1985-08-30 Fujitsu Ltd 半導体記憶装置
US4700328A (en) * 1985-07-11 1987-10-13 Intel Corporation High speed and high efficiency layout for dram circuits
JPH01119987A (ja) * 1987-11-04 1989-05-12 Hitachi Ltd 半導体記憶装置
JP2547615B2 (ja) * 1988-06-16 1996-10-23 三菱電機株式会社 読出専用半導体記憶装置および半導体記憶装置

Also Published As

Publication number Publication date
GB2239540A (en) 1991-07-03
DE4005990A1 (de) 1991-07-11
KR910013263A (ko) 1991-08-08
GB9004056D0 (en) 1990-04-18
IT1241519B (it) 1994-01-17
KR930001738B1 (ko) 1993-03-12
FR2656727A1 (fr) 1991-07-05
CN1052965A (zh) 1991-07-10
IT9048184A1 (it) 1992-01-31
JPH03203892A (ja) 1991-09-05

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Legal Events

Date Code Title Description
0001 Granted