DE69029714T2 - Halbleiterspeicher - Google Patents

Halbleiterspeicher

Info

Publication number
DE69029714T2
DE69029714T2 DE69029714T DE69029714T DE69029714T2 DE 69029714 T2 DE69029714 T2 DE 69029714T2 DE 69029714 T DE69029714 T DE 69029714T DE 69029714 T DE69029714 T DE 69029714T DE 69029714 T2 DE69029714 T2 DE 69029714T2
Authority
DE
Germany
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69029714T
Other languages
English (en)
Other versions
DE69029714D1 (de
Inventor
Masanori Noda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of DE69029714D1 publication Critical patent/DE69029714D1/de
Application granted granted Critical
Publication of DE69029714T2 publication Critical patent/DE69029714T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0491Virtual ground arrays
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/126Virtual ground arrays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE69029714T 1989-11-27 1990-11-27 Halbleiterspeicher Expired - Fee Related DE69029714T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1306821A JPH03166762A (ja) 1989-11-27 1989-11-27 半導体メモリ

Publications (2)

Publication Number Publication Date
DE69029714D1 DE69029714D1 (de) 1997-02-27
DE69029714T2 true DE69029714T2 (de) 1997-07-31

Family

ID=17961663

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69029714T Expired - Fee Related DE69029714T2 (de) 1989-11-27 1990-11-27 Halbleiterspeicher

Country Status (5)

Country Link
US (1) US5195054A (de)
EP (1) EP0430191B1 (de)
JP (1) JPH03166762A (de)
KR (1) KR910010715A (de)
DE (1) DE69029714T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19758704B4 (de) * 1996-11-27 2004-07-22 LG Semicon Co., Ltd., Cheongju Herstellverfahren für Halbleiterspeichervorrichtung
KR100214524B1 (ko) * 1996-11-27 1999-08-02 구본준 반도체 메모리 소자의 제조방법
KR100258345B1 (ko) * 1996-11-28 2000-06-01 윤종용 파워라인의 배치구조를 개선한 반도체 메모리 장치
KR19980053431A (ko) * 1996-12-26 1998-09-25 김주용 반도체 소자의 트랜지스터
US6593606B1 (en) * 2000-05-16 2003-07-15 Advanced Micro Devices, Inc. Staggered bitline strapping of a non-volatile memory cell
KR100470971B1 (ko) * 2002-08-01 2005-03-10 삼성전자주식회사 리드 전용 메모리 셀, 이 셀의 프로그램 방법, 이 셀의레이아웃 방법, 및 이 셀을 구비한 리드 전용 메모리 장치
US8513728B2 (en) 2011-11-17 2013-08-20 Silicon Storage Technology, Inc. Array of split gate non-volatile floating gate memory cells having improved strapping of the coupling gates
KR102056893B1 (ko) * 2012-08-24 2019-12-17 에스케이하이닉스 주식회사 반도체 장치

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5819144B2 (ja) * 1977-12-02 1983-04-16 株式会社東芝 読み出し専用記憶装置
US4384349A (en) * 1979-10-01 1983-05-17 Texas Instruments Incorporated High density electrically erasable floating gate dual-injection programmable memory device
US4281397A (en) * 1979-10-29 1981-07-28 Texas Instruments Incorporated Virtual ground MOS EPROM or ROM matrix
US4493057A (en) * 1980-01-07 1985-01-08 Texas Instruments Incorporated Method of making high density semiconductor device such as floating gate electrically programmable ROM or the like
JPS60206164A (ja) * 1984-03-30 1985-10-17 Toshiba Corp 半導体メモリ装置

Also Published As

Publication number Publication date
EP0430191A3 (en) 1992-04-08
EP0430191B1 (de) 1997-01-15
JPH03166762A (ja) 1991-07-18
US5195054A (en) 1993-03-16
KR910010715A (ko) 1991-06-29
EP0430191A2 (de) 1991-06-05
DE69029714D1 (de) 1997-02-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee