IT8622150A1 - Dispositivo a circuito integrato presentante circuiti periferici inclinati - Google Patents

Dispositivo a circuito integrato presentante circuiti periferici inclinati

Info

Publication number
IT8622150A1
IT8622150A1 IT1986A22150A IT2215086A IT8622150A1 IT 8622150 A1 IT8622150 A1 IT 8622150A1 IT 1986A22150 A IT1986A22150 A IT 1986A22150A IT 2215086 A IT2215086 A IT 2215086A IT 8622150 A1 IT8622150 A1 IT 8622150A1
Authority
IT
Italy
Prior art keywords
integrated circuit
circuit device
peripheral circuits
sloped peripheral
sloped
Prior art date
Application number
IT1986A22150A
Other languages
English (en)
Other versions
IT1197923B (it
IT8622150A0 (it
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of IT8622150A0 publication Critical patent/IT8622150A0/it
Publication of IT8622150A1 publication Critical patent/IT8622150A1/it
Application granted granted Critical
Publication of IT1197923B publication Critical patent/IT1197923B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11898—Input and output buffer/driver structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
IT22150/86A 1985-11-20 1986-10-27 Dispositivo a circuito integrato presentante circuiti periferifi inclinati IT1197923B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/799,825 US4789889A (en) 1985-11-20 1985-11-20 Integrated circuit device having slanted peripheral circuits

Publications (3)

Publication Number Publication Date
IT8622150A0 IT8622150A0 (it) 1986-10-27
IT8622150A1 true IT8622150A1 (it) 1988-04-27
IT1197923B IT1197923B (it) 1988-12-21

Family

ID=25176862

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22150/86A IT1197923B (it) 1985-11-20 1986-10-27 Dispositivo a circuito integrato presentante circuiti periferifi inclinati

Country Status (8)

Country Link
US (1) US4789889A (it)
JP (1) JPH0648715B2 (it)
KR (1) KR950010046B1 (it)
CN (1) CN1007477B (it)
DE (1) DE3639053C2 (it)
GB (1) GB2183399B (it)
IT (1) IT1197923B (it)
SE (1) SE504241C2 (it)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2653099B2 (ja) * 1988-05-17 1997-09-10 セイコーエプソン株式会社 アクティブマトリクスパネル，投写型表示装置及びビューファインダー
AT395494B (de) * 1988-06-14 1993-01-25 Automations Und Informationssy Integrierte schaltungsanordnung
JP2560805B2 (ja) * 1988-10-06 1996-12-04 三菱電機株式会社 半導体装置
US5162265A (en) * 1990-10-29 1992-11-10 Delco Electronics Corporation Method of making an electrical interconnection having angular lead design
US5072279A (en) * 1990-10-29 1991-12-10 Delco Electronics Corporation Electrical interconnection having angular lead design
JP3315834B2 (ja) * 1995-05-31 2002-08-19 富士通株式会社 薄膜トランジスタマトリクス装置及びその製造方法
US5859448A (en) * 1996-06-27 1999-01-12 Sun Microsystems, Inc. Alternative silicon chip geometries for integrated circuits
US5951304A (en) * 1997-05-21 1999-09-14 General Electric Company Fanout interconnection pad arrays
US8040465B2 (en) 2008-09-19 2011-10-18 Apple Inc. External light illumination of display screens

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3808475A (en) * 1972-07-10 1974-04-30 Amdahl Corp Lsi chip construction and method
US4125798A (en) * 1977-04-11 1978-11-14 Miller C Fredrick Method and means for locating process points on miniaturized circuits
US4278897A (en) * 1978-12-28 1981-07-14 Fujitsu Limited Large scale semiconductor integrated circuit device
US4413271A (en) * 1981-03-30 1983-11-01 Sprague Electric Company Integrated circuit including test portion and method for making
JPS5835963A (ja) * 1981-08-28 1983-03-02 Fujitsu Ltd 集積回路装置
JPS5921035A (ja) * 1982-07-26 1984-02-02 Nec Corp 半導体装置
JPS5943553A (ja) * 1982-09-06 1984-03-10 Hitachi Ltd 半導体素子の電極構造

Also Published As

Publication number Publication date
KR950010046B1 (ko) 1995-09-06
GB8627557D0 (en) 1986-12-17
SE504241C2 (sv) 1996-12-16
CN86107224A (zh) 1987-05-27
SE8604869D0 (sv) 1986-11-13
KR870005455A (ko) 1987-06-09
CN1007477B (zh) 1990-04-04
JPS62130549A (ja) 1987-06-12
DE3639053C2 (de) 1995-06-08
IT1197923B (it) 1988-12-21
JPH0648715B2 (ja) 1994-06-22
GB2183399A (en) 1987-06-03
SE8604869L (sv) 1987-05-21
IT8622150A0 (it) 1986-10-27
GB2183399B (en) 1989-10-11
DE3639053A1 (de) 1987-05-21
US4789889A (en) 1988-12-06

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19971029