IT8125693A0 - Metodo di fabbricazione di un dispositivo semiconduttore. - Google Patents
Metodo di fabbricazione di un dispositivo semiconduttore.Info
- Publication number
- IT8125693A0 IT8125693A0 IT8125693A IT2569381A IT8125693A0 IT 8125693 A0 IT8125693 A0 IT 8125693A0 IT 8125693 A IT8125693 A IT 8125693A IT 2569381 A IT2569381 A IT 2569381A IT 8125693 A0 IT8125693 A0 IT 8125693A0
- Authority
- IT
- Italy
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/981—Utilizing varying dielectric thickness
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NLAANVRAGE8006996,A NL187328C (nl) | 1980-12-23 | 1980-12-23 | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8125693A0 true IT8125693A0 (it) | 1981-12-18 |
IT1195242B IT1195242B (it) | 1988-10-12 |
Family
ID=19836365
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT25693/81A IT1195242B (it) | 1980-12-23 | 1981-12-18 | Metodo di fabbricazione di un dispositivo semiconduttore |
Country Status (12)
Country | Link |
---|---|
US (1) | US4420872A (it) |
JP (1) | JPS57133678A (it) |
AU (1) | AU545265B2 (it) |
CA (1) | CA1176761A (it) |
CH (1) | CH657229A5 (it) |
DE (1) | DE3150222C2 (it) |
FR (1) | FR2496983B1 (it) |
GB (1) | GB2090062B (it) |
IE (1) | IE52980B1 (it) |
IT (1) | IT1195242B (it) |
NL (1) | NL187328C (it) |
SE (2) | SE8107651L (it) |
Families Citing this family (45)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4517729A (en) * | 1981-07-27 | 1985-05-21 | American Microsystems, Incorporated | Method for fabricating MOS device with self-aligned contacts |
GB2117175A (en) * | 1982-03-17 | 1983-10-05 | Philips Electronic Associated | Semiconductor device and method of manufacture |
US4535531A (en) * | 1982-03-22 | 1985-08-20 | International Business Machines Corporation | Method and resulting structure for selective multiple base width transistor structures |
US4507847A (en) * | 1982-06-22 | 1985-04-02 | Ncr Corporation | Method of making CMOS by twin-tub process integrated with a vertical bipolar transistor |
NL8202686A (nl) * | 1982-07-05 | 1984-02-01 | Philips Nv | Werkwijze ter vervaardiging van een veldeffektinrichting met geisoleerde stuurelektrode, en inrichting vervaardigd volgens de werkwijze. |
JPS5955054A (ja) * | 1982-09-24 | 1984-03-29 | Hitachi Ltd | 半導体装置の製造方法 |
JPS5972759A (ja) * | 1982-10-20 | 1984-04-24 | Toshiba Corp | 半導体装置の製造方法 |
US4462151A (en) * | 1982-12-03 | 1984-07-31 | International Business Machines Corporation | Method of making high density complementary transistors |
US4503601A (en) * | 1983-04-18 | 1985-03-12 | Ncr Corporation | Oxide trench structure for polysilicon gates and interconnects |
US4481705A (en) * | 1983-06-14 | 1984-11-13 | Advanced Micro Devices, Inc. | Process for doping field isolation regions in CMOS integrated circuits |
NL188923C (nl) * | 1983-07-05 | 1992-11-02 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
DE3402653A1 (de) * | 1984-01-26 | 1985-08-01 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur herstellung speziell dotierter bereiche in halbleitermaterial |
US4727044A (en) | 1984-05-18 | 1988-02-23 | Semiconductor Energy Laboratory Co., Ltd. | Method of making a thin film transistor with laser recrystallized source and drain |
US4567640A (en) * | 1984-05-22 | 1986-02-04 | Data General Corporation | Method of fabricating high density CMOS devices |
KR860700314A (ko) * | 1984-09-28 | 1986-08-01 | 빈센트 죠셉로너 | 반도체 소자 및 그 제조방법 |
USH569H (en) | 1984-09-28 | 1989-01-03 | Motorola Inc. | Charge storage depletion region discharge protection |
NL8501992A (nl) * | 1985-07-11 | 1987-02-02 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting. |
US4713329A (en) * | 1985-07-22 | 1987-12-15 | Data General Corporation | Well mask for CMOS process |
FR2591800B1 (fr) * | 1985-12-18 | 1988-09-09 | Bois Daniel | Procede de fabrication d'un caisson et eventuellement de zones d'isolation electriques d'un circuit integre, notamment de type mos |
US4774197A (en) * | 1986-06-17 | 1988-09-27 | Advanced Micro Devices, Inc. | Method of improving silicon dioxide |
US4801555A (en) * | 1987-01-14 | 1989-01-31 | Motorola, Inc. | Double-implant process for forming graded source/drain regions |
JPS6477956A (en) * | 1987-09-19 | 1989-03-23 | Nec Corp | Manufacture of complementary mos transistor |
US4786609A (en) * | 1987-10-05 | 1988-11-22 | North American Philips Corporation, Signetics Division | Method of fabricating field-effect transistor utilizing improved gate sidewall spacers |
US4888988A (en) * | 1987-12-23 | 1989-12-26 | Siemens-Bendix Automotive Electronics L.P. | Silicon based mass airflow sensor and its fabrication method |
US4870745A (en) * | 1987-12-23 | 1989-10-03 | Siemens-Bendix Automotive Electronics L.P. | Methods of making silicon-based sensors |
US4925806A (en) * | 1988-03-17 | 1990-05-15 | Northern Telecom Limited | Method for making a doped well in a semiconductor substrate |
US4968641A (en) * | 1989-06-22 | 1990-11-06 | Alexander Kalnitsky | Method for formation of an isolating oxide layer |
US5559044A (en) * | 1992-09-21 | 1996-09-24 | Siliconix Incorporated | BiCDMOS process technology |
US5532177A (en) * | 1993-07-07 | 1996-07-02 | Micron Display Technology | Method for forming electron emitters |
US5316965A (en) * | 1993-07-29 | 1994-05-31 | Digital Equipment Corporation | Method of decreasing the field oxide etch rate in isolation technology |
US5596218A (en) * | 1993-10-18 | 1997-01-21 | Digital Equipment Corporation | Hot carrier-hard gate oxides by nitrogen implantation before gate oxidation |
US5308787A (en) * | 1993-10-22 | 1994-05-03 | United Microelectronics Corporation | Uniform field oxidation for locos isolation |
US5364804A (en) * | 1993-11-03 | 1994-11-15 | Taiwan Semiconductor Manufacturing Company | Nitride cap sidewall oxide protection from BOE etch |
KR0138234B1 (ko) * | 1994-02-24 | 1998-04-28 | 김광호 | 고전압 모오스 트랜지스터의 구조 |
KR0136935B1 (ko) * | 1994-04-21 | 1998-04-24 | 문정환 | 메모리 소자의 제조방법 |
US5532175A (en) * | 1995-04-17 | 1996-07-02 | Motorola, Inc. | Method of adjusting a threshold voltage for a semiconductor device fabricated on a semiconductor on insulator substrate |
US6080629A (en) * | 1997-04-21 | 2000-06-27 | Advanced Micro Devices, Inc. | Ion implantation into a gate electrode layer using an implant profile displacement layer |
US5885877A (en) * | 1997-04-21 | 1999-03-23 | Advanced Micro Devices, Inc. | Composite gate electrode incorporating dopant diffusion-retarding barrier layer adjacent to underlying gate dielectric |
US5907777A (en) * | 1997-07-31 | 1999-05-25 | International Business Machines Corporation | Method for forming field effect transistors having different threshold voltages and devices formed thereby |
US6121124A (en) * | 1998-06-18 | 2000-09-19 | Lucent Technologies Inc. | Process for fabricating integrated circuits with dual gate devices therein |
US6380055B2 (en) | 1998-10-22 | 2002-04-30 | Advanced Micro Devices, Inc. | Dopant diffusion-retarding barrier region formed within polysilicon gate layer |
US6724053B1 (en) | 2000-02-23 | 2004-04-20 | International Business Machines Corporation | PMOSFET device with localized nitrogen sidewall implantation |
US6521469B1 (en) | 2000-09-25 | 2003-02-18 | International Business Machines Corporation | Line monitoring of negative bias temperature instabilities by hole injection methods |
EP1459377A2 (en) * | 2001-07-03 | 2004-09-22 | Koninklijke Philips Electronics N.V. | Method of manufacturing a semiconductor device comprising mos-transistors having gate oxides of different thicknesses |
JP2015118974A (ja) * | 2013-12-17 | 2015-06-25 | シナプティクス・ディスプレイ・デバイス合同会社 | 半導体装置の製造方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL161305C (nl) * | 1971-11-20 | 1980-01-15 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderin- richting. |
US3999213A (en) * | 1972-04-14 | 1976-12-21 | U.S. Philips Corporation | Semiconductor device and method of manufacturing the device |
US3966501A (en) * | 1973-03-23 | 1976-06-29 | Mitsubishi Denki Kabushiki Kaisha | Process of producing semiconductor devices |
DE2438256A1 (de) * | 1974-08-08 | 1976-02-19 | Siemens Ag | Verfahren zum herstellen einer monolithischen halbleiterverbundanordnung |
JPS5197385A (en) * | 1975-02-21 | 1976-08-26 | Handotaisochino seizohoho | |
JPS51126077A (en) * | 1975-04-25 | 1976-11-02 | Hitachi Ltd | Manufacturing method of semi-conductor equpment |
NL7506594A (nl) * | 1975-06-04 | 1976-12-07 | Philips Nv | Werkwijze voor het vervaardigen van een halfge- leiderinrichting en halfgeleiderinrichting ver- vaardigd met behulp van de werkwijze. |
JPS5293278A (en) * | 1976-01-30 | 1977-08-05 | Matsushita Electronics Corp | Manufacture for mos type semiconductor intergrated circuit |
US4183040A (en) * | 1976-02-09 | 1980-01-08 | International Business Machines Corporation | MOS RAM with implant forming peripheral depletion MOSFET channels and capacitor bottom electrodes |
NL7604986A (nl) * | 1976-05-11 | 1977-11-15 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleider- inrichting, en inrichting vervaardigd door toe- passing van de werkwijze. |
JPS5327375A (en) * | 1976-08-26 | 1978-03-14 | Fujitsu Ltd | Production of semiconductor device |
US4221045A (en) * | 1978-06-06 | 1980-09-09 | Rockwell International Corporation | Self-aligned contacts in an ion implanted VLSI circuit |
JPS5529116A (en) * | 1978-08-23 | 1980-03-01 | Hitachi Ltd | Manufacture of complementary misic |
NL7902878A (nl) * | 1979-04-12 | 1980-10-14 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleider- inrichting. |
US4266985A (en) * | 1979-05-18 | 1981-05-12 | Fujitsu Limited | Process for producing a semiconductor device including an ion implantation step in combination with direct thermal nitridation of the silicon substrate |
-
1980
- 1980-12-23 NL NLAANVRAGE8006996,A patent/NL187328C/xx active Search and Examination
-
1981
- 1981-12-17 CA CA000392596A patent/CA1176761A/en not_active Expired
- 1981-12-18 GB GB8138179A patent/GB2090062B/en not_active Expired
- 1981-12-18 DE DE3150222A patent/DE3150222C2/de not_active Expired
- 1981-12-18 IT IT25693/81A patent/IT1195242B/it active
- 1981-12-18 FR FR8123714A patent/FR2496983B1/fr not_active Expired
- 1981-12-21 SE SE8107651D patent/SE8107651L/xx not_active Application Discontinuation
- 1981-12-21 CH CH8169/81A patent/CH657229A5/de not_active IP Right Cessation
- 1981-12-21 SE SE8107651A patent/SE458243B/sv not_active IP Right Cessation
- 1981-12-21 IE IE3007/81A patent/IE52980B1/en unknown
- 1981-12-22 US US06/333,353 patent/US4420872A/en not_active Expired - Lifetime
- 1981-12-22 AU AU78733/81A patent/AU545265B2/en not_active Ceased
- 1981-12-23 JP JP56209008A patent/JPS57133678A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
DE3150222C2 (de) | 1986-02-06 |
NL187328C (nl) | 1991-08-16 |
FR2496983A1 (fr) | 1982-06-25 |
FR2496983B1 (fr) | 1987-10-09 |
GB2090062A (en) | 1982-06-30 |
JPS57133678A (en) | 1982-08-18 |
CA1176761A (en) | 1984-10-23 |
AU545265B2 (en) | 1985-07-04 |
SE8107651L (sv) | 1982-06-24 |
AU7873381A (en) | 1982-07-01 |
SE458243B (sv) | 1989-03-06 |
IE52980B1 (en) | 1988-04-27 |
CH657229A5 (de) | 1986-08-15 |
US4420872A (en) | 1983-12-20 |
JPS6151435B2 (it) | 1986-11-08 |
IE813007L (en) | 1982-06-23 |
DE3150222A1 (de) | 1982-08-19 |
NL8006996A (nl) | 1982-07-16 |
GB2090062B (en) | 1985-02-13 |
IT1195242B (it) | 1988-10-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
IT8125693A0 (it) | Metodo di fabbricazione di un dispositivo semiconduttore. | |
ES505199A0 (es) | Un dispositivo semiconductor perfeccionado | |
GB2081159B (en) | Method of manufacturing a semiconductor device | |
IT8121369A0 (it) | Metodo di fabbricazione di un dispositivo semiconduttore. | |
KR850006258A (ko) | 반도체장치 제조방법 | |
DE3167203D1 (en) | Method of manufacturing a semiconductor device | |
NL186352C (nl) | Werkwijze ter vervaardiging van een halfgeleiderinrichting. | |
IT8026985A0 (it) | Dispositivo semiconduttore. | |
IT8419317A0 (it) | Procedimento per la produzione di un dispositivo a semiconduttori. | |
DE3175085D1 (en) | Method of manufacturing a semiconductor device | |
IT8322981A0 (it) | Procedimento per la fabbricazione di un dispositivo a semiconduttori. | |
KR840009181A (ko) | 반도체 장치의 제조방법 | |
DE3175081D1 (en) | Method of manufacturing a semiconductor device of the mis type | |
IT7922832A0 (it) | Laser a semiconduttore eprocedimento per la fabbricazione di un laser a semiconduttore. | |
KR860000710A (ko) | 반도체장치 제조방법 | |
NL188125C (nl) | Halfgeleiderfotodiode. | |
IT8324200A0 (it) | Metodo di fabbricazione di un dispositivo di separazione. | |
GB2081160B (en) | Method of manufacturing a semiconductor device | |
KR850005729A (ko) | 반도체 장치의 제조방법 | |
GB2081161B (en) | Method of manufacturing a semiconductor device | |
IT8421721A0 (it) | Metodo di fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore fabbricato con tale metodo. | |
IT8221430A0 (it) | Procedimento per la fabbricazione di un dispositivo a semiconduttori. | |
KR850002673A (ko) | 반도체장치 제조방법 | |
IT8324070A0 (it) | Metodo di fabbricazione di un dispositivo semiconduttore. | |
ES520265A0 (es) | Un metodo de fabricacion de un catodo emisor boruzado. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19960111 |