IT1247438B - Dispositivo a semiconduttore avente well (pozzo) retrogrado e well (pozzo) diffuso e procedimento per la sua fabbricazione - Google Patents

Dispositivo a semiconduttore avente well (pozzo) retrogrado e well (pozzo) diffuso e procedimento per la sua fabbricazione

Info

Publication number
IT1247438B
IT1247438B ITMI911175A ITMI911175A IT1247438B IT 1247438 B IT1247438 B IT 1247438B IT MI911175 A ITMI911175 A IT MI911175A IT MI911175 A ITMI911175 A IT MI911175A IT 1247438 B IT1247438 B IT 1247438B
Authority
IT
Italy
Prior art keywords
well
diffusion type
inversion
retrograde
diffused
Prior art date
Application number
ITMI911175A
Other languages
English (en)
Inventor
Yoshinori Okumura
Tomonori Okudaira
Hideaki Arima
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of ITMI911175A0 publication Critical patent/ITMI911175A0/it
Publication of ITMI911175A1 publication Critical patent/ITMI911175A1/it
Application granted granted Critical
Publication of IT1247438B publication Critical patent/IT1247438B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N69/00—Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823892—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76221—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO with a plurality of successive local oxidation steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823493—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0928—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising both N- and P- wells in the substrate, e.g. twin-tub
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)

Abstract

Una DRAM è formata su un substrato di silicio (1) avente un well a retrocessione o inversione (4, 5) ed un well (2, 3) del tipo a diffusione. Il well a retrocessione ha un profilo di concentrazione delle impurità che è impostato in passi mediante una pluralità di impianti ionici. Il well del tipo a diffusione ha un profilo di concentrazione delle impurità che varia in modo monotono mediante diffusione termica. Una matrice di celle di memoria è formata nella regione del well ad inversione. Un circuito periferico è formato nella regione del well del tipo a diffusione. Il well ad inversione migliora l'integrazione di dispositivi inclusi nella matrice di celle di memoria. Il well del tipo a diffusione migliora la caratteristica di isolamento tra i dispostivi.
ITMI911175A 1990-05-02 1991-04-30 Dispositivo a semiconduttore avente well (pozzo) retrogrado e well (pozzo) diffuso e procedimento per la sua fabbricazione IT1247438B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2116276A JPH0824171B2 (ja) 1990-05-02 1990-05-02 半導体記憶装置およびその製造方法

Publications (3)

Publication Number Publication Date
ITMI911175A0 ITMI911175A0 (it) 1991-04-30
ITMI911175A1 ITMI911175A1 (it) 1992-10-30
IT1247438B true IT1247438B (it) 1994-12-14

Family

ID=14683068

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI911175A IT1247438B (it) 1990-05-02 1991-04-30 Dispositivo a semiconduttore avente well (pozzo) retrogrado e well (pozzo) diffuso e procedimento per la sua fabbricazione

Country Status (5)

Country Link
US (1) US5428239A (it)
JP (1) JPH0824171B2 (it)
KR (1) KR940005891B1 (it)
DE (1) DE4114000C2 (it)
IT (1) IT1247438B (it)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3462886B2 (ja) * 1993-03-11 2003-11-05 株式会社東芝 半導体装置
US6310384B1 (en) * 1993-07-02 2001-10-30 Hitachi, Ltd. Low stress semiconductor devices with thermal oxide isolation
JPH08125034A (ja) 1993-12-03 1996-05-17 Mitsubishi Electric Corp 半導体記憶装置
JP2790167B2 (ja) * 1995-01-09 1998-08-27 日本電気株式会社 半導体装置及びその製造方法
JPH0936325A (ja) * 1995-07-25 1997-02-07 Hitachi Ltd 半導体集積回路装置
JP3777000B2 (ja) 1996-12-20 2006-05-24 富士通株式会社 半導体装置とその製造方法
KR100260559B1 (ko) 1997-12-29 2000-07-01 윤종용 비휘발성 메모리 장치의 웰 구조 및 그 제조 방법
US6440819B1 (en) 1998-03-03 2002-08-27 Advanced Micro Devices, Inc. Method for differential trenching in conjunction with differential fieldox growth
JP3733252B2 (ja) 1998-11-02 2006-01-11 セイコーエプソン株式会社 半導体記憶装置及びその製造方法
JP3536693B2 (ja) * 1998-11-24 2004-06-14 セイコーエプソン株式会社 半導体記憶装置及びその製造方法
US6268250B1 (en) * 1999-05-14 2001-07-31 Micron Technology, Inc. Efficient fabrication process for dual well type structures
US6445014B1 (en) 1999-06-16 2002-09-03 Micron Technology Inc. Retrograde well structure for a CMOS imager
US6310366B1 (en) 1999-06-16 2001-10-30 Micron Technology, Inc. Retrograde well structure for a CMOS imager
JP2001351989A (ja) * 2000-06-05 2001-12-21 Nec Corp 半導体装置の製造方法
TW490814B (en) * 2001-04-04 2002-06-11 Macronix Int Co Ltd Manufacturing method of memory device with floating gate
US7411250B2 (en) * 2001-04-05 2008-08-12 Peregrine Semiconductor Corporation Radiation-hardened silicon-on-insulator CMOS device, and method of making the same
US6531739B2 (en) * 2001-04-05 2003-03-11 Peregrine Semiconductor Corporation Radiation-hardened silicon-on-insulator CMOS device, and method of making the same
US7545001B2 (en) * 2003-11-25 2009-06-09 Taiwan Semiconductor Manufacturing Company Semiconductor device having high drive current and method of manufacture therefor
US20080116528A1 (en) * 2006-11-22 2008-05-22 Tsuneichiro Sano Semiconductor device and method of manufacturing the same
DE102011051650B4 (de) * 2011-07-07 2020-04-30 Atlas Copco Energas Gmbh Turbomaschine

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4411058A (en) * 1981-08-31 1983-10-25 Hughes Aircraft Company Process for fabricating CMOS devices with self-aligned channel stops
JPS60200568A (ja) * 1984-03-26 1985-10-11 Nec Corp 半導体記憶装置
JP2724459B2 (ja) * 1987-06-05 1998-03-09 セイコーインスツルメンツ株式会社 半導体集積回路装置の製造方法
JPS6410656A (en) * 1987-07-03 1989-01-13 Hitachi Ltd Complementary type semiconductor device

Also Published As

Publication number Publication date
DE4114000A1 (de) 1991-11-07
ITMI911175A1 (it) 1992-10-30
KR910020820A (ko) 1991-12-20
KR940005891B1 (ko) 1994-06-24
JPH0412565A (ja) 1992-01-17
JPH0824171B2 (ja) 1996-03-06
US5428239A (en) 1995-06-27
DE4114000C2 (de) 1994-07-21
ITMI911175A0 (it) 1991-04-30

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Legal Events

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0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970429