IN147333B - - Google Patents

Info

Publication number
IN147333B
IN147333B IN343/CAL/77A IN343CA1977A IN147333B IN 147333 B IN147333 B IN 147333B IN 343CA1977 A IN343CA1977 A IN 343CA1977A IN 147333 B IN147333 B IN 147333B
Authority
IN
India
Application number
IN343/CAL/77A
Other languages
English (en)
Inventor
Ch L Devlin
Ch W Eichelberger
Original Assignee
Gen Electric
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Electric filed Critical Gen Electric
Publication of IN147333B publication Critical patent/IN147333B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
IN343/CAL/77A 1976-04-22 1977-03-08 IN147333B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/679,408 US4212057A (en) 1976-04-22 1976-04-22 Shared memory multi-microprocessor computer system

Publications (1)

Publication Number Publication Date
IN147333B true IN147333B (it) 1980-02-02

Family

ID=24726794

Family Applications (1)

Application Number Title Priority Date Filing Date
IN343/CAL/77A IN147333B (it) 1976-04-22 1977-03-08

Country Status (11)

Country Link
US (1) US4212057A (it)
JP (1) JPS5853379B2 (it)
BR (1) BR7702548A (it)
CA (1) CA1095175A (it)
CH (1) CH620306A5 (it)
DE (2) DE2717503C2 (it)
ES (1) ES457986A1 (it)
FR (1) FR2349178A1 (it)
GB (1) GB1572426A (it)
IN (1) IN147333B (it)
IT (1) IT1075707B (it)

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Also Published As

Publication number Publication date
DE2760322C2 (it) 1988-09-22
BR7702548A (pt) 1978-02-28
GB1572426A (en) 1980-07-30
US4212057A (en) 1980-07-08
DE2717503A1 (de) 1977-11-03
ES457986A1 (es) 1978-07-01
FR2349178B1 (it) 1982-08-13
CA1095175A (en) 1981-02-03
CH620306A5 (it) 1980-11-14
FR2349178A1 (fr) 1977-11-18
JPS52138846A (en) 1977-11-19
DE2717503C2 (de) 1986-06-05
JPS5853379B2 (ja) 1983-11-29
IT1075707B (it) 1985-04-22

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