DE3485635D1 - Mehrprozessorsteuerung fuer vektorrechner. - Google Patents

Mehrprozessorsteuerung fuer vektorrechner.

Info

Publication number
DE3485635D1
DE3485635D1 DE8484302632T DE3485635T DE3485635D1 DE 3485635 D1 DE3485635 D1 DE 3485635D1 DE 8484302632 T DE8484302632 T DE 8484302632T DE 3485635 T DE3485635 T DE 3485635T DE 3485635 D1 DE3485635 D1 DE 3485635D1
Authority
DE
Germany
Prior art keywords
memory
control
processors
path
registers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8484302632T
Other languages
English (en)
Inventor
Steve S Chen
Alan J Schiffleger
Eugene R Somdahl
Lee Higbie
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cray Research LLC
Original Assignee
Cray Research LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/488,082 external-priority patent/US4636942A/en
Application filed by Cray Research LLC filed Critical Cray Research LLC
Application granted granted Critical
Publication of DE3485635D1 publication Critical patent/DE3485635D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8092—Array of vector units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
DE8484302632T 1983-04-25 1984-04-18 Mehrprozessorsteuerung fuer vektorrechner. Expired - Fee Related DE3485635D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US48808383A 1983-04-25 1983-04-25
US06/488,082 US4636942A (en) 1983-04-25 1983-04-25 Computer vector multiprocessing control

Publications (1)

Publication Number Publication Date
DE3485635D1 true DE3485635D1 (de) 1992-05-14

Family

ID=27049214

Family Applications (2)

Application Number Title Priority Date Filing Date
DE8484302632T Expired - Fee Related DE3485635D1 (de) 1983-04-25 1984-04-18 Mehrprozessorsteuerung fuer vektorrechner.
DE3486451T Expired - Fee Related DE3486451T2 (de) 1983-04-25 1984-04-18 Mehrprozessorsteuerung für Vektorrechner

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE3486451T Expired - Fee Related DE3486451T2 (de) 1983-04-25 1984-04-18 Mehrprozessorsteuerung für Vektorrechner

Country Status (5)

Country Link
EP (2) EP0123509B1 (de)
JP (3) JP2511397B2 (de)
AT (2) ATE74675T1 (de)
CA (1) CA1218754A (de)
DE (2) DE3485635D1 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62152071A (ja) * 1985-12-25 1987-07-07 Nec Corp デ−タ処理装置
US4760518A (en) * 1986-02-28 1988-07-26 Scientific Computer Systems Corporation Bi-directional databus system for supporting superposition of vector and scalar operations in a computer
US6379998B1 (en) 1986-03-12 2002-04-30 Hitachi, Ltd. Semiconductor device and method for fabricating the same
US5297260A (en) * 1986-03-12 1994-03-22 Hitachi, Ltd. Processor having a plurality of CPUS with one CPU being normally connected to common bus
DE3786583T2 (de) * 1986-03-12 1993-12-02 Hitachi Ltd Prozessor.
JPH0628051B2 (ja) * 1986-04-25 1994-04-13 株式会社日立製作所 記憶制御方式
JPS6353678A (ja) * 1986-08-22 1988-03-07 Hitachi Ltd ベクトル処理装置
JP2828972B2 (ja) * 1986-10-17 1998-11-25 株式会社日立製作所 並列プロセツサ
JPH06103494B2 (ja) * 1986-11-18 1994-12-14 株式会社日立製作所 ベクトル処理装置の制御方式
JPH01194055A (ja) * 1988-01-29 1989-08-04 Hitachi Ltd 並列計算機及びそのデータ転送方法
JPS6432379A (en) * 1987-07-29 1989-02-02 Hitachi Ltd Computer
US4980817A (en) * 1987-08-31 1990-12-25 Digital Equipment Vector register system for executing plural read/write commands concurrently and independently routing data to plural read/write ports
US5276902A (en) * 1988-11-07 1994-01-04 Fujitsu Limited Memory access system for vector data processed or to be processed by a vector processor
JPH0769896B2 (ja) * 1988-11-07 1995-07-31 富士通株式会社 ベクトル処理システム
US5142638A (en) * 1989-02-07 1992-08-25 Cray Research, Inc. Apparatus for sharing memory in a multiprocessor system
US5202970A (en) * 1989-02-07 1993-04-13 Cray Research, Inc. Method for sharing memory in a multiprocessor system
CA2036688C (en) * 1990-02-28 1995-01-03 Lee W. Tower Multiple cluster signal processor
GB9008366D0 (en) * 1990-04-12 1990-06-13 British Aerospace Data interaction architecture(dia)for real time embedded multi processor systems
US5247637A (en) * 1990-06-01 1993-09-21 Cray Research, Inc. Method and apparatus for sharing memory in a multiprocessor system
US5206952A (en) * 1990-09-12 1993-04-27 Cray Research, Inc. Fault tolerant networking architecture
GB2442609B (en) 2006-10-05 2009-02-11 Arc Int Inter-processor communication method
JP5495822B2 (ja) 2010-01-29 2014-05-21 キヤノン株式会社 情報処理装置、その制御方法及びプログラム
JP6086230B2 (ja) 2013-04-01 2017-03-01 日本電気株式会社 中央演算装置、情報処理装置、および仮想コア内レジスタ値取得方法
CN110654326B (zh) * 2018-06-29 2023-08-22 现代摩比斯株式会社 多主机系统、电力控制器及其工作方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3812473A (en) * 1972-11-24 1974-05-21 Ibm Storage system with conflict-free multiple simultaneous access
US4212057A (en) * 1976-04-22 1980-07-08 General Electric Company Shared memory multi-microprocessor computer system
US4128880A (en) * 1976-06-30 1978-12-05 Cray Research, Inc. Computer vector register processing
US4244018A (en) * 1978-05-15 1981-01-06 Gte Automatic Electric Laboratories Incorporated Interlock control of asynchronous data transmission between a host processor and a plurality of microprocessors through a common buffer
JPS5688561A (en) * 1979-12-21 1981-07-18 Fujitsu Ltd Vector arithmetic processor
JPS5727363A (en) * 1980-07-24 1982-02-13 Fujitsu Ltd Vector data processor
KR860001434B1 (ko) * 1980-11-21 1986-09-24 후지쑤 가부시끼가이샤 데이타 처리시 스템
JPS57153359A (en) * 1981-03-18 1982-09-21 Ibm Data processing system with common memory
US4541046A (en) * 1981-03-25 1985-09-10 Hitachi, Ltd. Data processing system including scalar data processor and vector data processor
DE3112693A1 (de) * 1981-03-31 1982-10-14 Stollmann & Co, 2000 Hamburg Modular aufgebautes dezentrales datenverarbeitungssystem
US4471458A (en) * 1981-06-18 1984-09-11 Allied Corporation Computer interface
JPS582959A (ja) * 1981-06-30 1983-01-08 Nec Corp アクセス制御装置
JPS58114274A (ja) * 1981-12-28 1983-07-07 Hitachi Ltd デ−タ処理装置
JPS6054694B2 (ja) * 1982-01-27 1985-12-02 株式会社日立製作所 記憶制御装置

Also Published As

Publication number Publication date
EP0123509B1 (de) 1992-04-08
JP2577865B2 (ja) 1997-02-05
JPS6037064A (ja) 1985-02-26
EP0389001A2 (de) 1990-09-26
CA1218754A (en) 1987-03-03
ATE74675T1 (de) 1992-04-15
EP0123509A2 (de) 1984-10-31
EP0389001B1 (de) 1997-06-04
ATE154151T1 (de) 1997-06-15
JPH06231094A (ja) 1994-08-19
JP2501419B2 (ja) 1996-05-29
DE3486451T2 (de) 1997-09-25
EP0389001A3 (de) 1991-12-04
JPH06231088A (ja) 1994-08-19
EP0123509A3 (en) 1988-04-27
JP2511397B2 (ja) 1996-06-26
DE3486451D1 (de) 1997-07-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee