JPS54124938A - Memory access control system - Google Patents

Memory access control system

Info

Publication number
JPS54124938A
JPS54124938A JP3353278A JP3353278A JPS54124938A JP S54124938 A JPS54124938 A JP S54124938A JP 3353278 A JP3353278 A JP 3353278A JP 3353278 A JP3353278 A JP 3353278A JP S54124938 A JPS54124938 A JP S54124938A
Authority
JP
Japan
Prior art keywords
access
priority
request
memory
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3353278A
Other languages
Japanese (ja)
Inventor
Hiroshi Nakamura
Shigeru Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3353278A priority Critical patent/JPS54124938A/en
Publication of JPS54124938A publication Critical patent/JPS54124938A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Abstract

PURPOSE:To shorten the memory-access processing time of a data processing system, in which the memory is used in common by several request-making units, by reducing the operation to priority-select memory access requests as much as possible. CONSTITUTION:Several access ports 1-1 to 1-4 are provided which set request information at the time when units CPU1 to CHP2 resuest memroy access corresponding to request-making units CPU1 and CPU2 and channel processors CHP1 and CHP2, and memory access setup circuit 6 is also provided which performs memory- access setup operation on the basis of input request information. Further, this system is provided with priority-selective bus lines connected to priority decision circuit 2 which selects prots 1-1 to 1-4 according to the fixed criterion when a request is made between ports 1-1 to 1-4 and circuit 2, and bypass lines 8-1 to 8-4; according to the condition of the access request, priority-selective bus line and bus lines 8-1 to 8-4 are controlled by bypass control part 9, thereby reducing the operation for priority selection.
JP3353278A 1978-03-23 1978-03-23 Memory access control system Pending JPS54124938A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3353278A JPS54124938A (en) 1978-03-23 1978-03-23 Memory access control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3353278A JPS54124938A (en) 1978-03-23 1978-03-23 Memory access control system

Publications (1)

Publication Number Publication Date
JPS54124938A true JPS54124938A (en) 1979-09-28

Family

ID=12389149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3353278A Pending JPS54124938A (en) 1978-03-23 1978-03-23 Memory access control system

Country Status (1)

Country Link
JP (1) JPS54124938A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103474A (en) * 1983-11-10 1985-06-07 Oki Electric Ind Co Ltd Disk control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103474A (en) * 1983-11-10 1985-06-07 Oki Electric Ind Co Ltd Disk control system
JPH0128970B2 (en) * 1983-11-10 1989-06-07 Oki Electric Ind Co Ltd

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