FR2678400B1 - Processeur de protocole destine a l'execution d'un ensemble d'instructions en un nombre reduit d'operation. - Google Patents

Processeur de protocole destine a l'execution d'un ensemble d'instructions en un nombre reduit d'operation.

Info

Publication number
FR2678400B1
FR2678400B1 FR9107985A FR9107985A FR2678400B1 FR 2678400 B1 FR2678400 B1 FR 2678400B1 FR 9107985 A FR9107985 A FR 9107985A FR 9107985 A FR9107985 A FR 9107985A FR 2678400 B1 FR2678400 B1 FR 2678400B1
Authority
FR
France
Prior art keywords
executing
instructions
operations
reduced number
protocol processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9107985A
Other languages
English (en)
Other versions
FR2678400A1 (fr
Inventor
Chauvel Gerard
Aussedat Francis
Calippe Pierre
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments France SAS
Original Assignee
Texas Instruments France SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments France SAS filed Critical Texas Instruments France SAS
Priority to FR9107985A priority Critical patent/FR2678400B1/fr
Priority to US07/902,191 priority patent/US5740458A/en
Publication of FR2678400A1 publication Critical patent/FR2678400A1/fr
Application granted granted Critical
Publication of FR2678400B1 publication Critical patent/FR2678400B1/fr
Priority to US08/890,894 priority patent/US7028145B1/en
Priority to US08/989,387 priority patent/US6085308A/en
Priority to US09/606,057 priority patent/US7197623B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
FR9107985A 1991-06-27 1991-06-27 Processeur de protocole destine a l'execution d'un ensemble d'instructions en un nombre reduit d'operation. Expired - Fee Related FR2678400B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR9107985A FR2678400B1 (fr) 1991-06-27 1991-06-27 Processeur de protocole destine a l'execution d'un ensemble d'instructions en un nombre reduit d'operation.
US07/902,191 US5740458A (en) 1991-06-27 1992-06-22 Protocol processor intended for the execution of a collection of instructions in a reduced number of operations
US08/890,894 US7028145B1 (en) 1991-06-27 1997-07-10 Protocol processor intended for the execution of a collection of instructions in a reduced number of operations
US08/989,387 US6085308A (en) 1991-06-27 1997-12-12 Protocol processor for the execution of a collection of instructions in a reduced number of operations
US09/606,057 US7197623B1 (en) 1991-06-27 2000-06-28 Multiple processor cellular radio

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9107985A FR2678400B1 (fr) 1991-06-27 1991-06-27 Processeur de protocole destine a l'execution d'un ensemble d'instructions en un nombre reduit d'operation.

Publications (2)

Publication Number Publication Date
FR2678400A1 FR2678400A1 (fr) 1992-12-31
FR2678400B1 true FR2678400B1 (fr) 1995-08-04

Family

ID=9414394

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9107985A Expired - Fee Related FR2678400B1 (fr) 1991-06-27 1991-06-27 Processeur de protocole destine a l'execution d'un ensemble d'instructions en un nombre reduit d'operation.

Country Status (2)

Country Link
US (3) US5740458A (fr)
FR (1) FR2678400B1 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2678400B1 (fr) * 1991-06-27 1995-08-04 Texas Instruments France Processeur de protocole destine a l'execution d'un ensemble d'instructions en un nombre reduit d'operation.
US7197623B1 (en) 1991-06-27 2007-03-27 Texas Instruments Incorporated Multiple processor cellular radio
FR2683964B1 (fr) * 1991-11-14 1997-04-30 Texas Instruments France Modulateur notamment pour systemes de telephones numeriques cellulaires.
US5652903A (en) * 1994-11-01 1997-07-29 Motorola, Inc. DSP co-processor for use on an integrated circuit that performs multiple communication tasks
JPH08293815A (ja) * 1994-11-01 1996-11-05 Motorola Inc 集積回路上で複数の通信タスクを行なうコプロセッサ
US5867726A (en) * 1995-05-02 1999-02-02 Hitachi, Ltd. Microcomputer
JP3505266B2 (ja) * 1995-06-15 2004-03-08 三洋電機株式会社 プログラム実行装置
US6807155B1 (en) * 1999-05-07 2004-10-19 Infineon Technologies Ag Method of profiling disparate communications and signal processing standards and services
EP1177700A1 (fr) * 1999-05-07 2002-02-06 Morphics Technology, Inc. Procede d'etablissement de profils de communications disparates, de normes de traitement de signaux et de services
US8090928B2 (en) * 2002-06-28 2012-01-03 Intellectual Ventures I Llc Methods and apparatus for processing scalar and vector instructions
US20070143579A1 (en) * 2005-12-19 2007-06-21 King Billion Electronics Co. Ltd. Integrated data processor
US7748409B2 (en) * 2007-01-31 2010-07-06 Masco Corporation Of Indiana Overmold interface for fluid carrying system
CN114546495B (zh) * 2021-09-03 2022-12-20 北京睿芯众核科技有限公司 适用于risc-v架构处理器的地址属性检查的方法及系统

Family Cites Families (28)

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Publication number Priority date Publication date Assignee Title
US4212057A (en) * 1976-04-22 1980-07-08 General Electric Company Shared memory multi-microprocessor computer system
US4101960A (en) * 1977-03-29 1978-07-18 Burroughs Corporation Scientific processor
US4338661A (en) * 1979-05-21 1982-07-06 Motorola, Inc. Conditional branch unit for microprogrammed data processor
US4450525A (en) * 1981-12-07 1984-05-22 Ibm Corporation Control unit for a functional processor
US4591977A (en) * 1983-03-23 1986-05-27 The United States Of America As Represented By The Secretary Of The Air Force Plurality of processors where access to the common memory requires only a single clock interval
JPS60214069A (ja) * 1984-04-02 1985-10-26 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 処理システム
JPS6224366A (ja) * 1985-07-03 1987-02-02 Hitachi Ltd ベクトル処理装置
US4945479A (en) * 1985-07-31 1990-07-31 Unisys Corporation Tightly coupled scientific processing system
US5021945A (en) * 1985-10-31 1991-06-04 Mcc Development, Ltd. Parallel processor system for processing natural concurrencies and method therefor
US4783778A (en) * 1986-09-16 1988-11-08 Gte Communication Systems Corporation Synchronous packet manager
JPS63253468A (ja) * 1987-04-10 1988-10-20 Hitachi Ltd ベクトル処理装置
US6085336A (en) * 1987-06-02 2000-07-04 Texas Instruments Incorporated Data processing devices, systems and methods with mode driven stops
EP0554917B1 (fr) * 1987-06-05 1998-05-06 Mitsubishi Denki Kabushiki Kaisha Système de traitement de signaux numériques comprenant un processeur accédant deux mémoires d'instruction sous contrÔle d'un ordinateur hÔte
US5291581A (en) * 1987-07-01 1994-03-01 Digital Equipment Corporation Apparatus and method for synchronization of access to main memory signal groups in a multiprocessor data processing system
EP0334627A3 (fr) * 1988-03-23 1991-06-12 Du Pont Pixel Systems Limited Architecture de multiprocesseur
US5187796A (en) * 1988-03-29 1993-02-16 Computer Motion, Inc. Three-dimensional vector co-processor having I, J, and K register files and I, J, and K execution units
US5210834A (en) * 1988-06-01 1993-05-11 Digital Equipment Corporation High speed transfer of instructions from a master to a slave processor
JPH02103656A (ja) * 1988-10-12 1990-04-16 Fujitsu Ltd 主記憶参照の遂次化制御方式
US5237686A (en) * 1989-05-10 1993-08-17 Mitsubishi Denki Kabushiki Kaisha Multiprocessor type time varying image encoding system and image processor with memory bus control table for arbitration priority
JP2519798B2 (ja) * 1989-05-30 1996-07-31 富士通株式会社 多重プロセッサシステムにおけるシリアライズ機能の検証方式
US5179530A (en) * 1989-11-03 1993-01-12 Zoran Corporation Architecture for integrated concurrent vector signal processor
US5197130A (en) * 1989-12-29 1993-03-23 Supercomputer Systems Limited Partnership Cluster architecture for a highly parallel scalar/vector multiprocessor system
JP2825906B2 (ja) * 1990-02-01 1998-11-18 株式会社日立製作所 計算機システム
US5289588A (en) * 1990-04-24 1994-02-22 Advanced Micro Devices, Inc. Interlock acquisition for critical code section execution in a shared memory common-bus individually cached multiprocessor system
US5155843A (en) * 1990-06-29 1992-10-13 Digital Equipment Corporation Error transition mode for multi-processor system
US6108755A (en) * 1990-09-18 2000-08-22 Fujitsu Limited Asynchronous access system to a shared storage
FR2678400B1 (fr) * 1991-06-27 1995-08-04 Texas Instruments France Processeur de protocole destine a l'execution d'un ensemble d'instructions en un nombre reduit d'operation.
US6000026A (en) * 1992-06-22 1999-12-07 Texas Instrument Incorporated Multiple processor apparatus having a protocol processor intended for the execution of a collection of instructions in a reduced number of operations

Also Published As

Publication number Publication date
FR2678400A1 (fr) 1992-12-31
US7028145B1 (en) 2006-04-11
US5740458A (en) 1998-04-14
US6085308A (en) 2000-07-04

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20100226