HK1064253A1 - Technique for reducing the number of layers in a multilayer circuit board - Google Patents

Technique for reducing the number of layers in a multilayer circuit board

Info

Publication number
HK1064253A1
HK1064253A1 HK04106731.7A HK04106731A HK1064253A1 HK 1064253 A1 HK1064253 A1 HK 1064253A1 HK 04106731 A HK04106731 A HK 04106731A HK 1064253 A1 HK1064253 A1 HK 1064253A1
Authority
HK
Hong Kong
Prior art keywords
layers
technique
reducing
circuit board
multilayer circuit
Prior art date
Application number
HK04106731.7A
Other languages
English (en)
Inventor
Aneta D Wyrzykowska
Luici G Difilippo
Herman Kwong
Original Assignee
Nortel Networks Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nortel Networks Ltd filed Critical Nortel Networks Ltd
Publication of HK1064253A1 publication Critical patent/HK1064253A1/xx

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09218Conductive traces
    • H05K2201/09227Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09627Special connections between adjacent vias, not for grounding vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
HK04106731.7A 2002-03-20 2004-09-07 Technique for reducing the number of layers in a multilayer circuit board HK1064253A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/101,211 US7256354B2 (en) 2000-06-19 2002-03-20 Technique for reducing the number of layers in a multilayer circuit board

Publications (1)

Publication Number Publication Date
HK1064253A1 true HK1064253A1 (en) 2005-01-21

Family

ID=27788344

Family Applications (1)

Application Number Title Priority Date Filing Date
HK04106731.7A HK1064253A1 (en) 2002-03-20 2004-09-07 Technique for reducing the number of layers in a multilayer circuit board

Country Status (7)

Country Link
US (1) US7256354B2 (ko)
EP (1) EP1347674A3 (ko)
KR (1) KR100983401B1 (ko)
CN (1) CN100407877C (ko)
CA (1) CA2422677C (ko)
HK (1) HK1064253A1 (ko)
TW (1) TWI222342B (ko)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6909052B1 (en) * 2002-08-23 2005-06-21 Emc Corporation Techniques for making a circuit board with improved impedance characteristics
US7016198B2 (en) * 2003-04-08 2006-03-21 Lexmark International, Inc. Printed circuit board having outer power planes
US7738259B2 (en) * 2004-01-22 2010-06-15 Alcatel Lucent Shared via decoupling for area arrays components
JP4552524B2 (ja) * 2004-06-10 2010-09-29 パナソニック株式会社 複合型電子部品
TW200637454A (en) * 2005-04-13 2006-10-16 Asustek Comp Inc Printed circuit board
US7368667B2 (en) * 2005-08-10 2008-05-06 Alcatel Using rows/columns of micro-vias to create PCB routing channels in BGA interconnect grid (micro-via channels)
US7365435B2 (en) 2005-08-10 2008-04-29 Alcatel Alternating micro-vias and throughboard vias to create PCB routing channels in BGA interconnect grid
CN100463585C (zh) * 2005-08-12 2009-02-18 鸿富锦精密工业(深圳)有限公司 具有改良过孔的印刷电路板
KR100735825B1 (ko) * 2006-03-03 2007-07-06 한국과학기술원 다층 패키지 구조물 및 그의 제조방법
TWI286049B (en) * 2006-04-04 2007-08-21 Advanced Semiconductor Eng Circuit substrate
US20080025007A1 (en) * 2006-07-27 2008-01-31 Liquid Computing Corporation Partially plated through-holes and achieving high connectivity in multilayer circuit boards using the same
US8223522B2 (en) * 2006-09-25 2012-07-17 Flextronics Ap, Llc Bi-directional regulator for regulating power
TWI321351B (en) * 2006-10-20 2010-03-01 Advanced Semiconductor Eng Semiconductor substrate for transmitting differential pair
JP5259240B2 (ja) * 2008-04-21 2013-08-07 日本メクトロン株式会社 多層フレキシブルプリント配線板およびその製造方法
US8928449B2 (en) * 2008-05-28 2015-01-06 Flextronics Ap, Llc AC/DC planar transformer
US9092437B2 (en) 2008-12-31 2015-07-28 Microsoft Technology Licensing, Llc Experience streams for rich interactive narratives
US20110119587A1 (en) * 2008-12-31 2011-05-19 Microsoft Corporation Data model and player platform for rich interactive narratives
CN102056400B (zh) * 2009-10-27 2013-12-11 鸿富锦精密工业(深圳)有限公司 印刷电路板
US8586873B2 (en) * 2010-02-23 2013-11-19 Flextronics Ap, Llc Test point design for a high speed bus
TWI391043B (zh) * 2010-08-31 2013-03-21 Accton Technology Corp 電路板
CN103455186A (zh) * 2012-05-31 2013-12-18 群康科技(深圳)有限公司 触控面板、其制造方法及应用其的显示设备
CN103747625B (zh) * 2014-01-15 2017-09-29 上海斐讯数据通信技术有限公司 一种hdi板的gnd孔布图方法及系统
US9372205B2 (en) * 2014-01-15 2016-06-21 Taiwan Semiconductor Manufacturing Co., Ltd. Universal probe card PCB design
JP6493788B2 (ja) * 2015-02-24 2019-04-03 日立金属株式会社 アンテナ装置
WO2017048232A1 (en) * 2015-09-15 2017-03-23 Hewlett Packard Enterprise Development Lp Printed circuit board including through-hole vias
CN106028622B (zh) * 2016-06-21 2018-09-07 广东欧珀移动通信有限公司 一种可提高传输线阻抗连续性的印刷电路板及其生产方法
CN110602867B (zh) * 2019-08-09 2020-11-10 苏州浪潮智能科技有限公司 提高服务器供电连接稳定的pcb设计方法和系统、pcb板
CN111524467B (zh) * 2020-06-11 2022-06-21 厦门通富微电子有限公司 一种显示装置及其制备方法
CN113923898B (zh) * 2021-09-27 2024-02-06 深圳博海电子设计有限公司 一种双通道内存条的制作方法及应用

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2739726B2 (ja) * 1990-09-27 1998-04-15 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 多層プリント回路板
JP2983368B2 (ja) 1991-01-30 1999-11-29 株式会社東芝 配線パターン設計方法および配線パターン設計用cadシステム
JP2938733B2 (ja) 1993-11-12 1999-08-25 株式会社ピーエフユー Cadシステムにおける部品配置方法
US5544018A (en) * 1994-04-13 1996-08-06 Microelectronics And Computer Technology Corporation Electrical interconnect device with customizeable surface layer and interwoven signal lines
JPH08274471A (ja) * 1995-03-31 1996-10-18 Sumitomo Metal Ind Ltd 多層回路基板
DE19518150A1 (de) * 1995-05-17 1996-11-21 Ciba Geigy Ag Mikrobiologisches Verfahren zur Herstellung von (S,S)-N,N'-Ethylendiamindibernsteinsäure
US5784262A (en) * 1995-11-06 1998-07-21 Symbios, Inc. Arrangement of pads and through-holes for semiconductor packages
JP3898787B2 (ja) 1996-10-29 2007-03-28 松下電器産業株式会社 実装設計装置
JPH10303562A (ja) * 1997-04-30 1998-11-13 Toshiba Corp プリント配線板
US5847936A (en) * 1997-06-20 1998-12-08 Sun Microsystems, Inc. Optimized routing scheme for an integrated circuit/printed circuit board
JPH11297885A (ja) 1998-04-14 1999-10-29 Shinko Electric Ind Co Ltd 多層回路基板
US6720501B1 (en) * 1998-04-14 2004-04-13 Formfactor, Inc. PC board having clustered blind vias
FR2782230B1 (fr) 1998-08-06 2000-09-08 Bull Electronics Angers Carte de circuits imprimes
US6175088B1 (en) * 1998-10-05 2001-01-16 Avaya Technology Corp. Multi-layer printed-wiring boards with inner power and ground layers
US6232564B1 (en) * 1998-10-09 2001-05-15 International Business Machines Corporation Printed wiring board wireability enhancement
US6310398B1 (en) * 1998-12-03 2001-10-30 Walter M. Katz Routable high-density interfaces for integrated circuit devices
US6181004B1 (en) * 1999-01-22 2001-01-30 Jerry D. Koontz Digital signal processing assembly and test method
JP2000215754A (ja) 1999-01-26 2000-08-04 Nec Shizuoka Ltd 電子機器の操作ボタン構造
US6198635B1 (en) * 1999-05-18 2001-03-06 Vsli Technology, Inc. Interconnect layout pattern for integrated circuit packages and the like
JP3196894B2 (ja) 1999-07-08 2001-08-06 インターナショナル・ビジネス・マシーンズ・コーポレ−ション プリント配線基板設計装置及び設計方法
JP3562568B2 (ja) * 1999-07-16 2004-09-08 日本電気株式会社 多層配線基板
US6689634B1 (en) 1999-09-22 2004-02-10 Texas Instruments Incorporated Modeling technique for selectively depopulating electrical contacts from a foot print of a grid array (BGA or LGA) package to increase device reliability
US6256769B1 (en) * 1999-09-30 2001-07-03 Unisys Corporation Printed circuit board routing techniques
US6538213B1 (en) * 2000-02-18 2003-03-25 International Business Machines Corporation High density design for organic chip carriers
JP3407025B2 (ja) 2000-06-08 2003-05-19 Necエレクトロニクス株式会社 半導体装置及びその製造方法
US6388890B1 (en) * 2000-06-19 2002-05-14 Nortel Networks Limited Technique for reducing the number of layers in a multilayer circuit board
US6407462B1 (en) * 2000-12-30 2002-06-18 Lsi Logic Corporation Irregular grid bond pad layout arrangement for a flip chip package
US6452262B1 (en) * 2001-02-12 2002-09-17 Lsi Logic Corporation Layout of Vdd and Vss balls in a four layer PBGA
US6479319B1 (en) * 2001-04-20 2002-11-12 Lsi Logic Corporation Contact escape pattern
US6762366B1 (en) * 2001-04-27 2004-07-13 Lsi Logic Corporation Ball assignment for ball grid array package
US20030043560A1 (en) * 2001-06-15 2003-03-06 Clarkson Robert Roy Printed circuit board having a microelectronic semiconductor device mount area for trace routing therethrough
US6521846B1 (en) * 2002-01-07 2003-02-18 Sun Microsystems, Inc. Method for assigning power and ground pins in array packages to enhance next level routing

Also Published As

Publication number Publication date
US20040040744A1 (en) 2004-03-04
CN1496213A (zh) 2004-05-12
EP1347674A3 (en) 2004-08-04
KR100983401B1 (ko) 2010-09-20
TW200306774A (en) 2003-11-16
TWI222342B (en) 2004-10-11
CA2422677A1 (en) 2003-09-20
US7256354B2 (en) 2007-08-14
EP1347674A2 (en) 2003-09-24
CN100407877C (zh) 2008-07-30
KR20030076404A (ko) 2003-09-26
CA2422677C (en) 2008-06-03

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20160320