HK1000950A1 - Configurable integrated circuit - Google Patents

Configurable integrated circuit Download PDF

Info

Publication number
HK1000950A1
HK1000950A1 HK97102499A HK97102499A HK1000950A1 HK 1000950 A1 HK1000950 A1 HK 1000950A1 HK 97102499 A HK97102499 A HK 97102499A HK 97102499 A HK97102499 A HK 97102499A HK 1000950 A1 HK1000950 A1 HK 1000950A1
Authority
HK
Hong Kong
Prior art keywords
integrated circuit
input
signal generator
configuration signal
connection
Prior art date
Application number
HK97102499A
Other languages
German (de)
English (en)
French (fr)
Chinese (zh)
Other versions
HK1000950B (en
Inventor
A. Johnson Bret
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=8219229&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=HK1000950(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of HK1000950B publication Critical patent/HK1000950B/xx
Publication of HK1000950A1 publication Critical patent/HK1000950A1/xx

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1731—Optimisation thereof
    • H03K19/1732—Optimisation thereof by limitation or reduction of the pin/gate ratio
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Wire Bonding (AREA)
HK97102499A 1995-05-05 1997-12-18 Configurable integrated circuit HK1000950A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP19950106850 EP0743756B1 (de) 1995-05-05 1995-05-05 Konfigurierbare integrierte Schaltung

Publications (2)

Publication Number Publication Date
HK1000950B HK1000950B (en) 1998-05-08
HK1000950A1 true HK1000950A1 (en) 1998-05-08

Family

ID=8219229

Family Applications (1)

Application Number Title Priority Date Filing Date
HK97102499A HK1000950A1 (en) 1995-05-05 1997-12-18 Configurable integrated circuit

Country Status (8)

Country Link
US (1) US5726601A (enExample)
EP (1) EP0743756B1 (enExample)
JP (1) JPH08307241A (enExample)
KR (1) KR100310380B1 (enExample)
AT (1) ATE156950T1 (enExample)
DE (1) DE59500516D1 (enExample)
HK (1) HK1000950A1 (enExample)
TW (1) TW297936B (enExample)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4556806A (en) * 1982-05-10 1985-12-03 Texas Instruments Incorporated Gate alterable output buffer
JPH01289138A (ja) * 1988-05-16 1989-11-21 Toshiba Corp マスタースライス型半導体集積回路
US5051622A (en) * 1989-11-08 1991-09-24 Chips And Technologies, Inc. Power-on strap inputs
JPH07109843B2 (ja) * 1989-12-28 1995-11-22 三洋電機株式会社 半導体集積回路
JP2563679B2 (ja) * 1991-01-24 1996-12-11 シャープ株式会社 双方向入出力信号分離回路
JPH05136200A (ja) * 1991-11-14 1993-06-01 Mitsubishi Electric Corp 半導体集積装置
DE69327612T2 (de) * 1992-05-08 2000-08-31 National Semiconductor Corp., Richardson Schaltung und Verfahren zur Generierung eines stabilen Taktsignals mit Frequenzvervielfachung
DE69312939T2 (de) * 1993-10-29 1998-01-02 Sgs Thomson Microelectronics Integrierte Schaltung mit bidirektionnellem Anschlussstift
JP2684976B2 (ja) * 1993-11-24 1997-12-03 日本電気株式会社 半導体装置

Also Published As

Publication number Publication date
TW297936B (enExample) 1997-02-11
KR100310380B1 (ko) 2001-12-17
KR960043526A (ko) 1996-12-23
DE59500516D1 (de) 1997-09-18
JPH08307241A (ja) 1996-11-22
EP0743756B1 (de) 1997-08-13
EP0743756A1 (de) 1996-11-20
ATE156950T1 (de) 1997-08-15
US5726601A (en) 1998-03-10

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)