KR100310380B1 - 집적회로 - Google Patents

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Publication number
KR100310380B1
KR100310380B1 KR1019960014363A KR19960014363A KR100310380B1 KR 100310380 B1 KR100310380 B1 KR 100310380B1 KR 1019960014363 A KR1019960014363 A KR 1019960014363A KR 19960014363 A KR19960014363 A KR 19960014363A KR 100310380 B1 KR100310380 B1 KR 100310380B1
Authority
KR
South Korea
Prior art keywords
signal generator
input
buffer circuit
configuration signal
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1019960014363A
Other languages
English (en)
Korean (ko)
Other versions
KR960043526A (ko
Inventor
브렛 에이. 존슨
Original Assignee
칼 하인쯔 호르닝어
지멘스 악티엔게젤샤프트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=8219229&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=KR100310380(B1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by 칼 하인쯔 호르닝어, 지멘스 악티엔게젤샤프트 filed Critical 칼 하인쯔 호르닝어
Publication of KR960043526A publication Critical patent/KR960043526A/ko
Application granted granted Critical
Publication of KR100310380B1 publication Critical patent/KR100310380B1/ko
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1731—Optimisation thereof
    • H03K19/1732—Optimisation thereof by limitation or reduction of the pin/gate ratio
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Wire Bonding (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
KR1019960014363A 1995-05-05 1996-05-03 집적회로 Expired - Lifetime KR100310380B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP19950106850 EP0743756B1 (de) 1995-05-05 1995-05-05 Konfigurierbare integrierte Schaltung
EP95106850.1 1995-05-05

Publications (2)

Publication Number Publication Date
KR960043526A KR960043526A (ko) 1996-12-23
KR100310380B1 true KR100310380B1 (ko) 2001-12-17

Family

ID=8219229

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960014363A Expired - Lifetime KR100310380B1 (ko) 1995-05-05 1996-05-03 집적회로

Country Status (7)

Country Link
US (1) US5726601A (enExample)
EP (1) EP0743756B1 (enExample)
JP (1) JPH08307241A (enExample)
KR (1) KR100310380B1 (enExample)
AT (1) ATE156950T1 (enExample)
DE (1) DE59500516D1 (enExample)
TW (1) TW297936B (enExample)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5051622A (en) * 1989-11-08 1991-09-24 Chips And Technologies, Inc. Power-on strap inputs

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4556806A (en) * 1982-05-10 1985-12-03 Texas Instruments Incorporated Gate alterable output buffer
JPH01289138A (ja) * 1988-05-16 1989-11-21 Toshiba Corp マスタースライス型半導体集積回路
JPH07109843B2 (ja) * 1989-12-28 1995-11-22 三洋電機株式会社 半導体集積回路
JP2563679B2 (ja) * 1991-01-24 1996-12-11 シャープ株式会社 双方向入出力信号分離回路
JPH05136200A (ja) * 1991-11-14 1993-06-01 Mitsubishi Electric Corp 半導体集積装置
EP0570158B1 (en) * 1992-05-08 2000-01-19 National Semiconductor Corporation Frequency multiplication circuit and method for generating a stable clock signal
EP0651513B1 (en) * 1993-10-29 1997-08-06 STMicroelectronics S.r.l. Integrated circuit with bidirectional pin
JP2684976B2 (ja) * 1993-11-24 1997-12-03 日本電気株式会社 半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5051622A (en) * 1989-11-08 1991-09-24 Chips And Technologies, Inc. Power-on strap inputs

Also Published As

Publication number Publication date
US5726601A (en) 1998-03-10
DE59500516D1 (de) 1997-09-18
JPH08307241A (ja) 1996-11-22
TW297936B (enExample) 1997-02-11
KR960043526A (ko) 1996-12-23
EP0743756B1 (de) 1997-08-13
ATE156950T1 (de) 1997-08-15
EP0743756A1 (de) 1996-11-20
HK1000950A1 (en) 1998-05-08

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