GB1498531A - Semiconductor integrated injection logic cell - Google Patents

Semiconductor integrated injection logic cell

Info

Publication number
GB1498531A
GB1498531A GB17198/75A GB1719875A GB1498531A GB 1498531 A GB1498531 A GB 1498531A GB 17198/75 A GB17198/75 A GB 17198/75A GB 1719875 A GB1719875 A GB 1719875A GB 1498531 A GB1498531 A GB 1498531A
Authority
GB
United Kingdom
Prior art keywords
region
epitaxial layer
logic cell
integrated injection
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB17198/75A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of GB1498531A publication Critical patent/GB1498531A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133—Emitter regions of BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0113—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors the conductive layers comprising highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0116—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including integrated injection logic [I2L]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/63—Combinations of vertical and lateral BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/096—Lateral transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/124—Polycrystalline emitter

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
GB17198/75A 1974-04-26 1975-04-25 Semiconductor integrated injection logic cell Expired GB1498531A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US464480A US3904450A (en) 1974-04-26 1974-04-26 Method of fabricating injection logic integrated circuits using oxide isolation

Publications (1)

Publication Number Publication Date
GB1498531A true GB1498531A (en) 1978-01-18

Family

ID=23844105

Family Applications (1)

Application Number Title Priority Date Filing Date
GB17198/75A Expired GB1498531A (en) 1974-04-26 1975-04-25 Semiconductor integrated injection logic cell

Country Status (10)

Country Link
US (1) US3904450A (enExample)
JP (1) JPS50152682A (enExample)
BE (1) BE828348A (enExample)
CA (1) CA1005170A (enExample)
DE (1) DE2518010A1 (enExample)
FR (1) FR2269200B1 (enExample)
GB (1) GB1498531A (enExample)
IT (1) IT1032757B (enExample)
NL (1) NL7504859A (enExample)
SE (1) SE405909B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2183907A (en) * 1985-11-27 1987-06-10 Raytheon Co Reducing radiation effects on integrated circuits
US4936928A (en) * 1985-11-27 1990-06-26 Raytheon Company Semiconductor device

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3993513A (en) * 1974-10-29 1976-11-23 Fairchild Camera And Instrument Corporation Combined method for fabricating oxide-isolated vertical bipolar transistors and complementary oxide-isolated lateral bipolar transistors and the resulting structures
US3962717A (en) * 1974-10-29 1976-06-08 Fairchild Camera And Instrument Corporation Oxide isolated integrated injection logic with selective guard ring
FR2297495A1 (fr) * 1975-01-10 1976-08-06 Radiotechnique Compelec Structure de transistors complementaires et son procede de fabrication
US4044454A (en) * 1975-04-16 1977-08-30 Ibm Corporation Method for forming integrated circuit regions defined by recessed dielectric isolation
FR2337431A1 (fr) * 1975-12-29 1977-07-29 Radiotechnique Compelec Perfectionnement a la structure des circuits integres a transistors bipolaires et procede d'obtention
FR2337432A1 (fr) * 1975-12-29 1977-07-29 Radiotechnique Compelec Perfectionnement a la structure des circuits integres a transistors bipolaires complementaires et procede d'obtention
US4013489A (en) * 1976-02-10 1977-03-22 Intel Corporation Process for forming a low resistance interconnect in MOS N-channel silicon gate integrated circuit
US4137109A (en) * 1976-04-12 1979-01-30 Texas Instruments Incorporated Selective diffusion and etching method for isolation of integrated logic circuit
US4102714A (en) * 1976-04-23 1978-07-25 International Business Machines Corporation Process for fabricating a low breakdown voltage device for polysilicon gate technology
JPS5317081A (en) * 1976-07-30 1978-02-16 Sharp Corp Production of i2l device
JPS6035818B2 (ja) * 1976-09-22 1985-08-16 日本電気株式会社 半導体装置の製造方法
JPS53108776A (en) * 1977-03-04 1978-09-21 Nec Corp Semiconductor device
US4111720A (en) * 1977-03-31 1978-09-05 International Business Machines Corporation Method for forming a non-epitaxial bipolar integrated circuit
NL7703941A (nl) * 1977-04-12 1978-10-16 Philips Nv Werkwijze ter vervaardiging van een halfgelei- derinrichting en inrichting, vervaardigd door toepassing van de werkwijze.
DE2728845A1 (de) * 1977-06-27 1979-01-18 Siemens Ag Verfahren zum herstellen eines hochfrequenztransistors
JPS5467778A (en) * 1977-11-10 1979-05-31 Toshiba Corp Production of semiconductor device
US4190466A (en) * 1977-12-22 1980-02-26 International Business Machines Corporation Method for making a bipolar transistor structure utilizing self-passivating diffusion sources
NL190710C (nl) 1978-02-10 1994-07-01 Nec Corp Geintegreerde halfgeleiderketen.
US4196440A (en) * 1978-05-25 1980-04-01 International Business Machines Corporation Lateral PNP or NPN with a high gain
US4264382A (en) * 1978-05-25 1981-04-28 International Business Machines Corporation Method for making a lateral PNP or NPN with a high gain utilizing reactive ion etching of buried high conductivity regions
US4157269A (en) * 1978-06-06 1979-06-05 International Business Machines Corporation Utilizing polysilicon diffusion sources and special masking techniques
JPS5586151A (en) * 1978-12-23 1980-06-28 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor integrated circuit
JPS6043024B2 (ja) * 1978-12-30 1985-09-26 富士通株式会社 半導体装置の製造方法
JPS55134962A (en) * 1979-04-09 1980-10-21 Toshiba Corp Semiconductor device
JPS6043656B2 (ja) * 1979-06-06 1985-09-30 株式会社東芝 半導体装置の製造方法
US4338622A (en) * 1979-06-29 1982-07-06 International Business Machines Corporation Self-aligned semiconductor circuits and process therefor
US4333227A (en) * 1979-11-29 1982-06-08 International Business Machines Corporation Process for fabricating a self-aligned micrometer bipolar transistor device
US4303933A (en) * 1979-11-29 1981-12-01 International Business Machines Corporation Self-aligned micrometer bipolar transistor device and process
JPS5696852A (en) * 1979-12-29 1981-08-05 Fujitsu Ltd Semiconductor device
US4319932A (en) * 1980-03-24 1982-03-16 International Business Machines Corporation Method of making high performance bipolar transistor with polysilicon base contacts
JPS5734365A (en) * 1980-08-08 1982-02-24 Ibm Symmetrical bipolar transistor
US4624046A (en) * 1982-01-04 1986-11-25 Fairchild Camera & Instrument Corp. Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM
CA1188418A (en) * 1982-01-04 1985-06-04 Jay A. Shideler Oxide isolation process for standard ram/prom and lateral pnp cell ram
US4961102A (en) * 1982-01-04 1990-10-02 Shideler Jay A Junction programmable vertical transistor with high performance transistor
JPS59186367A (ja) * 1983-04-06 1984-10-23 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
US4713355A (en) * 1984-04-16 1987-12-15 Trw Inc. Bipolar transistor construction
US5166094A (en) * 1984-09-14 1992-11-24 Fairchild Camera & Instrument Corp. Method of fabricating a base-coupled transistor logic
US4903107A (en) * 1986-12-29 1990-02-20 General Electric Company Buried oxide field isolation structure with composite dielectric
US6869854B2 (en) * 2002-07-18 2005-03-22 International Business Machines Corporation Diffused extrinsic base and method for fabrication

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US3534234A (en) * 1966-12-15 1970-10-13 Texas Instruments Inc Modified planar process for making semiconductor devices having ultrafine mesa type geometry
NL6706735A (enExample) * 1967-05-13 1968-11-14
US3460007A (en) * 1967-07-03 1969-08-05 Rca Corp Semiconductor junction device
US3519901A (en) * 1968-01-29 1970-07-07 Texas Instruments Inc Bi-layer insulation structure including polycrystalline semiconductor material for integrated circuit isolation

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2183907A (en) * 1985-11-27 1987-06-10 Raytheon Co Reducing radiation effects on integrated circuits
GB2183907B (en) * 1985-11-27 1989-10-04 Raytheon Co Semiconductor device
US4936928A (en) * 1985-11-27 1990-06-26 Raytheon Company Semiconductor device

Also Published As

Publication number Publication date
IT1032757B (it) 1979-06-20
SE405909B (sv) 1979-01-08
FR2269200A1 (enExample) 1975-11-21
JPS50152682A (enExample) 1975-12-08
NL7504859A (nl) 1975-10-28
SE7504328L (sv) 1975-10-27
DE2518010A1 (de) 1975-11-13
BE828348A (fr) 1975-08-18
FR2269200B1 (enExample) 1977-04-15
CA1005170A (en) 1977-02-08
US3904450A (en) 1975-09-09

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee