NL7703941A - Werkwijze ter vervaardiging van een halfgelei- derinrichting en inrichting, vervaardigd door toepassing van de werkwijze. - Google Patents
Werkwijze ter vervaardiging van een halfgelei- derinrichting en inrichting, vervaardigd door toepassing van de werkwijze.Info
- Publication number
- NL7703941A NL7703941A NL7703941A NL7703941A NL7703941A NL 7703941 A NL7703941 A NL 7703941A NL 7703941 A NL7703941 A NL 7703941A NL 7703941 A NL7703941 A NL 7703941A NL 7703941 A NL7703941 A NL 7703941A
- Authority
- NL
- Netherlands
- Prior art keywords
- semi
- manufactured
- manufacture
- application
- controlled device
- Prior art date
Links
- 238000000034 method Methods 0.000 title 2
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
- H01L21/8228—Complementary devices, e.g. complementary transistors
- H01L21/82285—Complementary vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76221—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO with a plurality of successive local oxidation steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
- H01L27/0821—Combination of lateral and vertical transistors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
- H01L27/0823—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
- H01L27/0826—Combination of vertical complementary transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
- H01L29/7325—Vertical transistors having an emitter-base junction leaving at a main surface and a base-collector junction leaving at a peripheral surface of the body, e.g. mesa planar transistor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/111—Narrow masking
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/122—Polycrystalline
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Bipolar Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Drying Of Semiconductors (AREA)
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL7703941A NL7703941A (nl) | 1977-04-12 | 1977-04-12 | Werkwijze ter vervaardiging van een halfgelei- derinrichting en inrichting, vervaardigd door toepassing van de werkwijze. |
DE19782813673 DE2813673A1 (de) | 1977-04-12 | 1978-03-30 | Verfahren zur herstellung einer halbleiteranordnung |
CA300,632A CA1093700A (en) | 1977-04-12 | 1978-04-06 | Method of manufacturing a semiconductor device and device manufactured by using the method |
GB13750/78A GB1587398A (en) | 1977-04-12 | 1978-04-07 | Semiconductor device manufacture |
US05/894,241 US4148054A (en) | 1977-04-12 | 1978-04-07 | Method of manufacturing a semiconductor device and device manufactured by using the method |
JP4182478A JPS53128286A (en) | 1977-04-12 | 1978-04-11 | Method of producing semiconductor |
FR7810772A FR2387516A1 (fr) | 1977-04-12 | 1978-04-12 | Procede pour fabriquer un dispositif semi-conducteur comportant de tres petits transistors complementaires, et dispositif fabrique de la sorte |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL7703941A NL7703941A (nl) | 1977-04-12 | 1977-04-12 | Werkwijze ter vervaardiging van een halfgelei- derinrichting en inrichting, vervaardigd door toepassing van de werkwijze. |
Publications (1)
Publication Number | Publication Date |
---|---|
NL7703941A true NL7703941A (nl) | 1978-10-16 |
Family
ID=19828332
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL7703941A NL7703941A (nl) | 1977-04-12 | 1977-04-12 | Werkwijze ter vervaardiging van een halfgelei- derinrichting en inrichting, vervaardigd door toepassing van de werkwijze. |
Country Status (7)
Country | Link |
---|---|
US (1) | US4148054A (nl) |
JP (1) | JPS53128286A (nl) |
CA (1) | CA1093700A (nl) |
DE (1) | DE2813673A1 (nl) |
FR (1) | FR2387516A1 (nl) |
GB (1) | GB1587398A (nl) |
NL (1) | NL7703941A (nl) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4190466A (en) * | 1977-12-22 | 1980-02-26 | International Business Machines Corporation | Method for making a bipolar transistor structure utilizing self-passivating diffusion sources |
US4239559A (en) * | 1978-04-21 | 1980-12-16 | Hitachi, Ltd. | Method for fabricating a semiconductor device by controlled diffusion between adjacent layers |
CA1129118A (en) * | 1978-07-19 | 1982-08-03 | Tetsushi Sakai | Semiconductor devices and method of manufacturing the same |
FR2454698A1 (fr) * | 1979-04-20 | 1980-11-14 | Radiotechnique Compelec | Procede de realisation de circuits integres a l'aide d'un masque multicouche et dispositifs obtenus par ce procede |
JPS5826829B2 (ja) * | 1979-08-30 | 1983-06-06 | 富士通株式会社 | ダイナミックメモリセルの製造方法 |
US4329186A (en) * | 1979-12-20 | 1982-05-11 | Ibm Corporation | Simultaneously forming fully implanted DMOS together with enhancement and depletion mode MOSFET devices |
JPS56146246A (en) * | 1980-04-14 | 1981-11-13 | Toshiba Corp | Manufacture of semiconductor integrated circuit |
US4339767A (en) * | 1980-05-05 | 1982-07-13 | International Business Machines Corporation | High performance PNP and NPN transistor structure |
US4512075A (en) * | 1980-08-04 | 1985-04-23 | Fairchild Camera & Instrument Corporation | Method of making an integrated injection logic cell having self-aligned collector and base reduced resistance utilizing selective diffusion from polycrystalline regions |
JPS5758356A (en) * | 1980-09-26 | 1982-04-08 | Toshiba Corp | Manufacture of semiconductor device |
US4569698A (en) * | 1982-02-25 | 1986-02-11 | Raytheon Company | Method of forming isolated device regions by selective successive etching of composite masking layers and semiconductor material prior to ion implantation |
US4430792A (en) * | 1982-07-08 | 1984-02-14 | General Electric Company | Minimal mask process for manufacturing insulated-gate semiconductor devices with integral shorts |
US4466176A (en) * | 1982-08-09 | 1984-08-21 | General Electric Company | Process for manufacturing insulated-gate semiconductor devices with integral shorts |
US4417385A (en) * | 1982-08-09 | 1983-11-29 | General Electric Company | Processes for manufacturing insulated-gate semiconductor devices with integral shorts |
US4545114A (en) * | 1982-09-30 | 1985-10-08 | Fujitsu Limited | Method of producing semiconductor device |
JPS5989457A (ja) * | 1982-11-15 | 1984-05-23 | Hitachi Ltd | 半導体装置の製造方法 |
JPS6362272A (ja) * | 1986-09-02 | 1988-03-18 | Seiko Instr & Electronics Ltd | 半導体装置の製造方法 |
US4933295A (en) * | 1987-05-08 | 1990-06-12 | Raytheon Company | Method of forming a bipolar transistor having closely spaced device regions |
US5064773A (en) * | 1988-12-27 | 1991-11-12 | Raytheon Company | Method of forming bipolar transistor having closely spaced device regions |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3753807A (en) * | 1972-02-24 | 1973-08-21 | Bell Canada Northern Electric | Manufacture of bipolar semiconductor devices |
CA1001771A (en) * | 1973-01-15 | 1976-12-14 | Fairchild Camera And Instrument Corporation | Method of mos transistor manufacture and resulting structure |
US3904450A (en) * | 1974-04-26 | 1975-09-09 | Bell Telephone Labor Inc | Method of fabricating injection logic integrated circuits using oxide isolation |
US3962717A (en) * | 1974-10-29 | 1976-06-08 | Fairchild Camera And Instrument Corporation | Oxide isolated integrated injection logic with selective guard ring |
JPS5215262A (en) * | 1975-07-28 | 1977-02-04 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its manufacturing method |
GB1545208A (en) * | 1975-09-27 | 1979-05-02 | Plessey Co Ltd | Electrical solid state devices |
US4066473A (en) * | 1976-07-15 | 1978-01-03 | Fairchild Camera And Instrument Corporation | Method of fabricating high-gain transistors |
-
1977
- 1977-04-12 NL NL7703941A patent/NL7703941A/nl not_active Application Discontinuation
-
1978
- 1978-03-30 DE DE19782813673 patent/DE2813673A1/de not_active Ceased
- 1978-04-06 CA CA300,632A patent/CA1093700A/en not_active Expired
- 1978-04-07 GB GB13750/78A patent/GB1587398A/en not_active Expired
- 1978-04-07 US US05/894,241 patent/US4148054A/en not_active Expired - Lifetime
- 1978-04-11 JP JP4182478A patent/JPS53128286A/ja active Granted
- 1978-04-12 FR FR7810772A patent/FR2387516A1/fr active Pending
Also Published As
Publication number | Publication date |
---|---|
CA1093700A (en) | 1981-01-13 |
US4148054A (en) | 1979-04-03 |
FR2387516A1 (fr) | 1978-11-10 |
DE2813673A1 (de) | 1978-10-19 |
GB1587398A (en) | 1981-04-01 |
JPS53128286A (en) | 1978-11-09 |
JPS5617829B2 (nl) | 1981-04-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
BC | A request for examination has been filed | ||
BV | The patent application has lapsed |