FR2834126B1 - Procede pour former une grille flottante auto-alignee dans une cellule de memoire flash - Google Patents

Procede pour former une grille flottante auto-alignee dans une cellule de memoire flash

Info

Publication number
FR2834126B1
FR2834126B1 FR0214293A FR0214293A FR2834126B1 FR 2834126 B1 FR2834126 B1 FR 2834126B1 FR 0214293 A FR0214293 A FR 0214293A FR 0214293 A FR0214293 A FR 0214293A FR 2834126 B1 FR2834126 B1 FR 2834126B1
Authority
FR
France
Prior art keywords
self
forming
memory cell
flash memory
floating grid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0214293A
Other languages
English (en)
Other versions
FR2834126A1 (fr
Inventor
Cheol Mo Jeong
Pyeng Geun Sohn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of FR2834126A1 publication Critical patent/FR2834126A1/fr
Application granted granted Critical
Publication of FR2834126B1 publication Critical patent/FR2834126B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
FR0214293A 2001-12-22 2002-11-15 Procede pour former une grille flottante auto-alignee dans une cellule de memoire flash Expired - Fee Related FR2834126B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR10-2001-0083490A KR100406179B1 (ko) 2001-12-22 2001-12-22 플래쉬 메모리 셀의 자기 정렬 플로팅 게이트 형성 방법

Publications (2)

Publication Number Publication Date
FR2834126A1 FR2834126A1 (fr) 2003-06-27
FR2834126B1 true FR2834126B1 (fr) 2006-03-10

Family

ID=36121989

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0214293A Expired - Fee Related FR2834126B1 (fr) 2001-12-22 2002-11-15 Procede pour former une grille flottante auto-alignee dans une cellule de memoire flash

Country Status (6)

Country Link
US (1) US6656793B2 (fr)
JP (1) JP4209181B2 (fr)
KR (1) KR100406179B1 (fr)
DE (1) DE10258787B4 (fr)
FR (1) FR2834126B1 (fr)
TW (1) TWI231567B (fr)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100426483B1 (ko) * 2001-12-22 2004-04-14 주식회사 하이닉스반도체 플래쉬 메모리 셀의 제조 방법
KR100426484B1 (ko) * 2001-12-22 2004-04-14 주식회사 하이닉스반도체 플래쉬 메모리 셀 및 그의 제조방법
KR100427537B1 (ko) * 2002-06-04 2004-04-28 주식회사 하이닉스반도체 반도체 소자의 소자 분리막 형성 방법 및 이를 이용한플래시 메모리 셀 제조 방법
TWI233665B (en) * 2004-02-12 2005-06-01 Powerchip Semiconductor Corp Method of fabricating a flash memory
CN1309053C (zh) * 2004-03-26 2007-04-04 力晶半导体股份有限公司 闪速存储器的制造方法
US7371658B2 (en) * 2004-06-17 2008-05-13 Texas Instruments Incorporated Trench isolation structure and a method of manufacture therefor
KR100590220B1 (ko) * 2004-08-04 2006-06-19 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조방법
US7279385B2 (en) * 2004-12-20 2007-10-09 Macronix International Co., Ltd. Flash memory device and manufacturing method thereof
KR100636031B1 (ko) * 2005-06-30 2006-10-18 삼성전자주식회사 불휘발성 메모리 장치의 제조 방법.
KR100799029B1 (ko) * 2005-07-26 2008-01-28 주식회사 하이닉스반도체 자기 정렬 플로팅 게이트를 갖는 플래쉬 메모리 소자의제조방법
KR100666916B1 (ko) * 2005-12-15 2007-01-10 삼성전자주식회사 도전성 구조물 형성 방법
KR100763228B1 (ko) * 2006-03-20 2007-10-04 삼성전자주식회사 비휘발성 반도체 메모리 소자의 제조 방법
US7427549B2 (en) * 2006-03-31 2008-09-23 Freescale Semiconductor, Inc. Method of separating a structure in a semiconductor device
KR100854861B1 (ko) 2006-12-27 2008-08-28 주식회사 하이닉스반도체 비휘발성 메모리 소자 및 그 제조 방법
KR100884984B1 (ko) * 2007-07-12 2009-02-23 주식회사 동부하이텍 플래시 메모리 소자의 제조 방법
US20150179749A1 (en) * 2013-12-19 2015-06-25 Silicon Storage Technology, Inc Non-volatile Memory Cell With Self Aligned Floating And Erase Gates, And Method Of Making Same
US9627246B2 (en) * 2015-06-10 2017-04-18 Microchip Technology Incorporated Method of forming shallow trench isolation (STI) structures
US9825046B2 (en) * 2016-01-05 2017-11-21 Taiwan Semiconductor Manufacturing Co., Ltd. Flash memory device having high coupling ratio
US10658409B2 (en) * 2017-11-17 2020-05-19 Taiwan Semiconductor Manufacturing Company Ltd. U. Semiconductor structure and method of manufacturing the same
CN110896047A (zh) * 2018-09-12 2020-03-20 长鑫存储技术有限公司 浅沟槽隔离结构和半导体器件的制备方法
US11417734B2 (en) 2019-10-31 2022-08-16 United Microelectronics Corp. Method for fabricating flash memory

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4385975A (en) * 1981-12-30 1983-05-31 International Business Machines Corp. Method of forming wide, deep dielectric filled isolation trenches in the surface of a silicon semiconductor substrate
US6281103B1 (en) * 1993-07-27 2001-08-28 Micron Technology, Inc. Method for fabricating gate semiconductor
JPH10335497A (ja) * 1997-06-04 1998-12-18 Sony Corp 半導体不揮発性記憶装置およびその製造方法
KR100275908B1 (ko) * 1998-03-02 2000-12-15 윤종용 집적 회로에 트렌치 아이솔레이션을 형성하는방법
US6153494A (en) * 1999-05-12 2000-11-28 Taiwan Semiconductor Manufacturing Company Method to increase the coupling ratio of word line to floating gate by lateral coupling in stacked-gate flash
JP4131896B2 (ja) * 2000-03-31 2008-08-13 株式会社東芝 不揮発性半導体記憶装置の製造方法
US6323516B1 (en) * 1999-09-03 2001-11-27 Advanced Micro Devices, Inc. Flash memory device and fabrication method having a high coupling ratio
KR100331556B1 (ko) * 1999-10-05 2002-04-06 윤종용 자기 정렬된 트랜치를 갖는 플레시 메모리 및 그 제조방법
JP2001250871A (ja) * 2000-03-08 2001-09-14 Sharp Corp 不揮発性半導体記憶装置及びその製造方法
TW521430B (en) * 2001-11-28 2003-02-21 Vanguard Int Semiconduct Corp Manufacturing method and structure of flash memory having protruded floating gate

Also Published As

Publication number Publication date
JP2003197789A (ja) 2003-07-11
KR100406179B1 (ko) 2003-11-17
TW200408054A (en) 2004-05-16
DE10258787A1 (de) 2003-07-03
DE10258787B4 (de) 2007-10-04
US6656793B2 (en) 2003-12-02
JP4209181B2 (ja) 2009-01-14
TWI231567B (en) 2005-04-21
KR20030053311A (ko) 2003-06-28
FR2834126A1 (fr) 2003-06-27
US20030119259A1 (en) 2003-06-26

Similar Documents

Publication Publication Date Title
FR2834126B1 (fr) Procede pour former une grille flottante auto-alignee dans une cellule de memoire flash
FR2819341B1 (fr) Procede d'integration d'une cellule dram
DE60129025D1 (de) Speicherbereichszuordnung in einem dateisystem zum beschreiben beliebiger bereiche
DE1269472T1 (de) Einsparung des vorladungsschrittes bei einem synchronen flash-speicher
IS6514A (is) Aðferð til að búa til fósturkorn úr fósturstofnfrumum prímata
DE60329357D1 (de) Herstellungsverfahren für eine selbstausgerichtete Kreuzpunkt-Speichermatrix
DE602004010303D1 (de) Mehrere schnittstellen in einem speichergehäuse
ITRM20010525A1 (it) Memoria eeprom flash cancellabile per righe.
DE60301119D1 (de) Nichtflüchtige SRAM Speicherzelle
SG104917A1 (en) A method to fabricate a floating gate with a sloping sidewall for a flash memory
DE60317930D1 (de) Verbessertes system zum programmieren einer nichtflüchtigen speicherzelle
FR2791810B1 (fr) Procede de fabrication d'une heterostructure planaire
NO20032188L (no) En selvinnstillende ikke-volatil minnecelle
DE602004016515D1 (de) Am einsatzort programmierbares gate-array für einen flash- bzw. dynamischen direktzugriffsspeicher
FR2858717B1 (fr) Procede de fabrication d'une cellule auto-alignee du type silicium-oxyde-nitrure-oxyde-silicium et cette cellule
SG90773A1 (en) A method to form non-volatile memory cells
ITMI20022192A1 (it) Struttura per modificare un blocco di celle di memoria in un dispositivo di memoria flash con riduzione delle operazioni di cancellazione e di programmazione.
FR2828758B1 (fr) Procede d'ecriture dans une memoire ram comportant un systeme d'effacement de colonnes
TW200419783A (en) Flash memory with selective gate within a substrate and method of fabricating the same
DE602004008697D1 (de) Abnutzungsausgleich in einem nicht flüchtigen Flash-Speicher ohne die Notwendigkeit freier Blöcke
FR2796736B1 (fr) Procede pour effectuer une multiplication avec accumulation dans un corps de galois
FR2828615B1 (fr) Procede pour augmenter le debit dans un systeme de communication
FR2818403B1 (fr) Procede de gestion de memoire
FR2924859B1 (fr) Procede de fabrication d'une cellule memoire eeprom
FR2800200B1 (fr) Procede de fabrication de points memoire eeprom

Legal Events

Date Code Title Description
PLFP Fee payment

Year of fee payment: 15

PLFP Fee payment

Year of fee payment: 16

PLFP Fee payment

Year of fee payment: 17

ST Notification of lapse

Effective date: 20200910