FR2830142B1 - Circuit integre et dispositif recepteur - Google Patents

Circuit integre et dispositif recepteur

Info

Publication number
FR2830142B1
FR2830142B1 FR0211983A FR0211983A FR2830142B1 FR 2830142 B1 FR2830142 B1 FR 2830142B1 FR 0211983 A FR0211983 A FR 0211983A FR 0211983 A FR0211983 A FR 0211983A FR 2830142 B1 FR2830142 B1 FR 2830142B1
Authority
FR
France
Prior art keywords
integrated circuit
receiver device
receiver
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0211983A
Other languages
English (en)
Other versions
FR2830142A1 (fr
Inventor
Mitsuhiro Noboru
Hiroshi Isoda
Shinji Amano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of FR2830142A1 publication Critical patent/FR2830142A1/fr
Application granted granted Critical
Publication of FR2830142B1 publication Critical patent/FR2830142B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
FR0211983A 2001-09-27 2002-09-27 Circuit integre et dispositif recepteur Expired - Fee Related FR2830142B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001298201A JP3795364B2 (ja) 2001-09-27 2001-09-27 集積回路および受信装置

Publications (2)

Publication Number Publication Date
FR2830142A1 FR2830142A1 (fr) 2003-03-28
FR2830142B1 true FR2830142B1 (fr) 2005-11-18

Family

ID=19119141

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0211983A Expired - Fee Related FR2830142B1 (fr) 2001-09-27 2002-09-27 Circuit integre et dispositif recepteur

Country Status (3)

Country Link
US (1) US7155188B2 (fr)
JP (1) JP3795364B2 (fr)
FR (1) FR2830142B1 (fr)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3832643B2 (ja) * 2002-01-10 2006-10-11 シャープ株式会社 高周波受信装置
JP4649818B2 (ja) * 2003-02-21 2011-03-16 富士通株式会社 電圧制御発振器及びｐｌｌ回路
US6954091B2 (en) 2003-11-25 2005-10-11 Lsi Logic Corporation Programmable phase-locked loop
JP3964426B2 (ja) * 2004-11-17 2007-08-22 シャープ株式会社 発振器、集積回路、通信装置
US7375562B2 (en) * 2005-03-25 2008-05-20 Faraday Technology Corp. Phase locked system for generating distributed clocks
JP4435723B2 (ja) * 2005-08-08 2010-03-24 株式会社ルネサステクノロジ 位相同期回路およびそれを用いた半導体集積回路装置
JP4299283B2 (ja) 2005-09-16 2009-07-22 富士通株式会社 クロック信号の生成及び分配装置
US8284884B2 (en) * 2006-06-23 2012-10-09 Mediatek Inc. Method of frequency search for DCO and decoder using the same
US7746179B1 (en) * 2006-09-13 2010-06-29 Rf Micro Devices, Inc. Method and apparatus for selecting a frequency generating element
US7573303B1 (en) * 2007-06-08 2009-08-11 Integrated Device Technology, Inc Digitally controlled system on-chip (SOC) clock generator
KR100910531B1 (ko) * 2007-09-11 2009-07-31 삼성전기주식회사 다중 대역 전압 제어 발진기를 갖는 주파수 합성기
JP2009171212A (ja) * 2008-01-16 2009-07-30 Toyota Industries Corp Ｐｌｌ回路
JP2010109850A (ja) 2008-10-31 2010-05-13 Sony Corp チューナ装置
US8058934B2 (en) * 2009-06-03 2011-11-15 Qualcomm Incorporated Apparatus and method for frequency generation
US8698565B2 (en) * 2010-06-02 2014-04-15 Skyworks Solutions, Inc. Dynamic voltage-controlled oscillator calibration and selection
JP5694696B2 (ja) * 2010-07-15 2015-04-01 ラピスセミコンダクタ株式会社 周波数シンセサイザ装置及び変調周波数変位調整方法
JP2012199761A (ja) * 2011-03-22 2012-10-18 Nec Corp 位相同期回路およびその制御方法
US8508308B2 (en) * 2011-09-01 2013-08-13 Lsi Corporation Automatic frequency calibration of a multi-LCVCO phase locked loop with adaptive thresholds and programmable center control voltage
JP5811863B2 (ja) * 2012-01-26 2015-11-11 富士通株式会社 クロック分配器、及び、電子装置
JP5853870B2 (ja) * 2012-06-08 2016-02-09 富士通株式会社 クロック分配器及び電子装置
FR2992073B1 (fr) * 2012-06-19 2014-07-11 Commissariat Energie Atomique Dispositif d'alimentation d'un circuit electronique
EP2775626A1 (fr) * 2013-03-07 2014-09-10 NXP Semiconductors B.V. Procédé et système de synthèse de fréquence
JP7165967B2 (ja) * 2018-10-04 2022-11-07 ザインエレクトロニクス株式会社 Ｐｌｌ回路

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3272758D1 (en) * 1981-11-09 1986-09-25 Matsushita Electric Ind Co Ltd A synchronous video detector circuit using phase-locked loop
US5036216A (en) * 1990-03-08 1991-07-30 Integrated Circuit Systems, Inc. Video dot clock generator
KR940005459A (ko) * 1992-06-22 1994-03-21 모리시타 요이찌 Pll회로
JPH08149000A (ja) 1994-11-18 1996-06-07 Fujitsu General Ltd Ｐｌｌ回路
US5686864A (en) 1995-09-05 1997-11-11 Motorola, Inc. Method and apparatus for controlling a voltage controlled oscillator tuning range in a frequency synthesizer
JP2923910B2 (ja) * 1996-08-14 1999-07-26 日本電気株式会社 超低利得電圧制御発振器
JP3250796B2 (ja) * 1998-05-26 2002-01-28 松下電器産業株式会社 受信機
GB2357645B (en) * 1999-12-22 2003-11-19 Nokia Mobile Phones Ltd Voltage controlled oscillator assembly
US6731712B1 (en) * 2000-02-04 2004-05-04 Conexant Systems, Inc. Fully integrated broadband tuner
JP2002016493A (ja) * 2000-06-30 2002-01-18 Hitachi Ltd 半導体集積回路および光伝送用送信回路
US20030021854A1 (en) * 2001-04-23 2003-01-30 Burrell Robert Edward Method of induction of apoptosis and inhibition of matrix metalloproteinases using antimicrobial metals

Also Published As

Publication number Publication date
US20030060177A1 (en) 2003-03-27
JP2003110425A (ja) 2003-04-11
JP3795364B2 (ja) 2006-07-12
US7155188B2 (en) 2006-12-26
FR2830142A1 (fr) 2003-03-28

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20140530