FR2779008B1 - Procede de fabrication d'un dispositif a semiconducteur - Google Patents

Procede de fabrication d'un dispositif a semiconducteur

Info

Publication number
FR2779008B1
FR2779008B1 FR9906327A FR9906327A FR2779008B1 FR 2779008 B1 FR2779008 B1 FR 2779008B1 FR 9906327 A FR9906327 A FR 9906327A FR 9906327 A FR9906327 A FR 9906327A FR 2779008 B1 FR2779008 B1 FR 2779008B1
Authority
FR
France
Prior art keywords
producing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9906327A
Other languages
English (en)
Other versions
FR2779008A1 (fr
Inventor
Won Suk Yang
Ki Nam Kim
Chang Hyum Cho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of FR2779008A1 publication Critical patent/FR2779008A1/fr
Application granted granted Critical
Publication of FR2779008B1 publication Critical patent/FR2779008B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H01L21/823425MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823864Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6656Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05Making the transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/09Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
FR9906327A 1998-05-20 1999-05-19 Procede de fabrication d'un dispositif a semiconducteur Expired - Fee Related FR2779008B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019980018167A KR100269510B1 (ko) 1998-05-20 1998-05-20 반도체 장치의 제조 방법

Publications (2)

Publication Number Publication Date
FR2779008A1 FR2779008A1 (fr) 1999-11-26
FR2779008B1 true FR2779008B1 (fr) 2005-08-26

Family

ID=19537526

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9906327A Expired - Fee Related FR2779008B1 (fr) 1998-05-20 1999-05-19 Procede de fabrication d'un dispositif a semiconducteur

Country Status (8)

Country Link
US (1) US7888198B1 (fr)
JP (1) JP4119037B2 (fr)
KR (1) KR100269510B1 (fr)
CN (1) CN1131561C (fr)
DE (1) DE19922291B4 (fr)
FR (1) FR2779008B1 (fr)
GB (1) GB2337634B (fr)
TW (1) TW448472B (fr)

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US7012008B1 (en) * 2000-03-17 2006-03-14 Advanced Micro Devices, Inc. Dual spacer process for non-volatile memory devices
US6727534B1 (en) * 2001-12-20 2004-04-27 Advanced Micro Devices, Inc. Electrically programmed MOS transistor source/drain series resistance
CN1327490C (zh) * 2003-10-27 2007-07-18 上海宏力半导体制造有限公司 用于制造自行对准接触窗结构的方法
US20050212015A1 (en) * 2004-03-25 2005-09-29 Taiwan Semiconductor Manufacturing Co., Ltd. Metal gate semiconductor device and manufacturing method
KR101115092B1 (ko) * 2004-07-29 2012-02-28 인텔렉츄얼 벤처스 투 엘엘씨 전하운송효율을 향상시키기 위한 이미지 센서 및 제조 방법
US7445015B2 (en) 2004-09-30 2008-11-04 Lam Research Corporation Cluster tool process chamber having integrated high pressure and vacuum chambers
CN101465325B (zh) * 2007-12-20 2010-07-07 华邦电子股份有限公司 半导体结构的形成方法
JP5578952B2 (ja) * 2009-08-19 2014-08-27 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
CN106558491A (zh) * 2015-09-25 2017-04-05 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制造方法、电子装置
US11018259B2 (en) * 2015-12-17 2021-05-25 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device comprising gate structure and doped gate spacer
CN107134495B (zh) * 2017-06-16 2018-05-15 睿力集成电路有限公司 一种半导体晶体管结构及其制备方法

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JPS63252461A (ja) 1987-04-09 1988-10-19 Nec Corp Cmos型半導体装置の製造方法
AT388618B (de) * 1987-05-05 1989-08-10 Binder Bernd Dr Verfahren zur quantitativen bestimmung von funktion und antigener konzentration einer in einer biologischen fluessigkeit enthaltenen substanz
JPH01143357A (ja) 1987-11-30 1989-06-05 Hitachi Ltd 半導体装置およびその製法
JPH03257962A (ja) 1990-03-08 1991-11-18 Fujitsu Ltd 半導体装置の製造方法
KR950000141B1 (ko) 1990-04-03 1995-01-10 미쓰비시 뎅끼 가부시끼가이샤 반도체 장치 및 그 제조방법
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Also Published As

Publication number Publication date
US7888198B1 (en) 2011-02-15
DE19922291B4 (de) 2005-08-04
GB2337634A9 (en) 2001-03-08
FR2779008A1 (fr) 1999-11-26
JPH11345951A (ja) 1999-12-14
GB2337634A (en) 1999-11-24
TW448472B (en) 2001-08-01
CN1236187A (zh) 1999-11-24
GB9909490D0 (en) 1999-06-23
KR19990085619A (ko) 1999-12-15
DE19922291A1 (de) 1999-12-02
JP4119037B2 (ja) 2008-07-16
CN1131561C (zh) 2003-12-17
KR100269510B1 (ko) 2000-10-16
GB2337634B (en) 2001-04-18

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Effective date: 20100129