FR2402919A1 - Dispositif de commande d'inscription/lecture pour une memoire a semiconducteurs bipolaire - Google Patents
Dispositif de commande d'inscription/lecture pour une memoire a semiconducteurs bipolaireInfo
- Publication number
- FR2402919A1 FR2402919A1 FR7825157A FR7825157A FR2402919A1 FR 2402919 A1 FR2402919 A1 FR 2402919A1 FR 7825157 A FR7825157 A FR 7825157A FR 7825157 A FR7825157 A FR 7825157A FR 2402919 A1 FR2402919 A1 FR 2402919A1
- Authority
- FR
- France
- Prior art keywords
- stage
- control device
- semiconductor memory
- read control
- entry
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/416—Read-write [R-W] circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Abstract
L'invention concerne un dispositif de commande d'inscription/lecture pour une mémoire à semiconducteurs bipolaire. Dans ce dispositif, qui comporte un étage d'entrée V, un étage intermédiaire Z et un étage terminal E, l'étage intermédiaire Z est constitué par un montage de transistors 25, 26, 27 raccordant les sorties 22, 23, 24 de l'étage V à deux conducteurs de signaux 28, 29 de l'étage E, et à chaque conducteur de bits 30, 31 de la matrice de mémoire est associé au maximum un transistor de commutation 32, 33 commandant les conducteurs de signaux 28, 29 et raccordant les conducteurs de bits 30, 31 aux entrées d'un amplificateur de lecture 34. Application notamment aux modules de mémoire bipolaires de surface réduite et à temps d'accès rapide.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2740565A DE2740565B1 (de) | 1977-09-08 | 1977-09-08 | Schreib-Lese-Ansteueranordnung fuer einen Bipolarhalbleiterspeicher |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2402919A1 true FR2402919A1 (fr) | 1979-04-06 |
FR2402919B1 FR2402919B1 (fr) | 1985-03-01 |
Family
ID=6018465
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7825157A Granted FR2402919A1 (fr) | 1977-09-08 | 1978-08-31 | Dispositif de commande d'inscription/lecture pour une memoire a semiconducteurs bipolaire |
Country Status (5)
Country | Link |
---|---|
US (1) | US4204276A (fr) |
JP (1) | JPS5450243A (fr) |
DE (1) | DE2740565B1 (fr) |
FR (1) | FR2402919A1 (fr) |
GB (1) | GB2004154B (fr) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5833634B2 (ja) * | 1979-02-28 | 1983-07-21 | 富士通株式会社 | メモリセルアレイの駆動方式 |
JPS5630754A (en) * | 1979-08-23 | 1981-03-27 | Fujitsu Ltd | Semiconductor memory device |
DE3227121A1 (de) * | 1982-07-20 | 1984-01-26 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung zum lesen bipolarer speicherzellen |
JPS6080195A (ja) * | 1983-10-07 | 1985-05-08 | Fujitsu Ltd | 半導体記憶装置 |
JPS6168796A (ja) * | 1985-09-04 | 1986-04-09 | Hitachi Ltd | 半導体記憶装置 |
JPH06123271A (ja) * | 1992-05-11 | 1994-05-06 | Daiyamondo Denki Kk | 内燃機関用点火制御装置 |
US8463723B2 (en) * | 2009-03-01 | 2013-06-11 | International Business Machines Corporation | Electronic synapse |
US7978510B2 (en) * | 2009-03-01 | 2011-07-12 | International Businesss Machines Corporation | Stochastic synapse memory element with spike-timing dependent plasticity (STDP) |
-
1977
- 1977-09-08 DE DE2740565A patent/DE2740565B1/de active Granted
-
1978
- 1978-08-31 FR FR7825157A patent/FR2402919A1/fr active Granted
- 1978-08-31 US US05/938,408 patent/US4204276A/en not_active Expired - Lifetime
- 1978-09-06 GB GB7835748A patent/GB2004154B/en not_active Expired
- 1978-09-08 JP JP11054878A patent/JPS5450243A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
DE2740565B1 (de) | 1978-10-19 |
US4204276A (en) | 1980-05-20 |
DE2740565C2 (fr) | 1979-06-21 |
JPS6129066B2 (fr) | 1986-07-04 |
GB2004154A (en) | 1979-03-21 |
JPS5450243A (en) | 1979-04-20 |
GB2004154B (en) | 1982-03-24 |
FR2402919B1 (fr) | 1985-03-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |