FR2394144A1 - Memoire a semiconducteurs - Google Patents
Memoire a semiconducteursInfo
- Publication number
- FR2394144A1 FR2394144A1 FR787817141A FR7817141A FR2394144A1 FR 2394144 A1 FR2394144 A1 FR 2394144A1 FR 787817141 A FR787817141 A FR 787817141A FR 7817141 A FR7817141 A FR 7817141A FR 2394144 A1 FR2394144 A1 FR 2394144A1
- Authority
- FR
- France
- Prior art keywords
- semiconductor memory
- region
- memory cells
- regions
- memories
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 230000015654 memory Effects 0.000 abstract 4
- 238000003491 array Methods 0.000 abstract 1
- 230000036039 immunity Effects 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 230000000873 masking effect Effects 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Abstract
L'invention concerne les mémoires à semiconducteurs. Au cours de la fabrication d'une mémoire à semiconducteurs, on procède à une opération de masquage supplémentaire qui définit des régions 201, 202 correspondant aux réseaux de cellules de mémoire, et une région 220 qui correspond aux circuits périphériques (circuits d'écriture, de lecture, etc). Les régions 201, 202 sont dopées plus fortement que la région 220, ce qui augmente l'immunité au bruit des cellules de mémoire. Application aux mémoires vives.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6908577A JPS544086A (en) | 1977-06-10 | 1977-06-10 | Memory circuit unit |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2394144A1 true FR2394144A1 (fr) | 1979-01-05 |
FR2394144B1 FR2394144B1 (fr) | 1983-02-04 |
Family
ID=13392390
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR787817141A Granted FR2394144A1 (fr) | 1977-06-10 | 1978-06-08 | Memoire a semiconducteurs |
Country Status (6)
Country | Link |
---|---|
US (1) | US4156939A (fr) |
JP (1) | JPS544086A (fr) |
DE (1) | DE2823854C3 (fr) |
FR (1) | FR2394144A1 (fr) |
GB (1) | GB1602948A (fr) |
NL (1) | NL7806294A (fr) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0019886A1 (fr) * | 1979-05-30 | 1980-12-10 | Siemens Aktiengesellschaft | Mémoire semiconductrice |
FR2458902A1 (fr) * | 1979-06-13 | 1981-01-02 | Siemens Ag | Procede pour fabriquer des circuits mos integres avec et sans transistors de memoire mnos selon la technologie des grilles en silicium |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4239993A (en) * | 1978-09-22 | 1980-12-16 | Texas Instruments Incorporated | High performance dynamic sense amplifier with active loads |
JPS5847862B2 (ja) * | 1979-08-30 | 1983-10-25 | 富士通株式会社 | 半導体記憶装置及びその製造方法 |
JPS5678266U (fr) * | 1979-11-09 | 1981-06-25 | ||
JPS5745267A (en) * | 1980-09-01 | 1982-03-15 | Nec Corp | Semiconductor device |
US4402126A (en) * | 1981-05-18 | 1983-09-06 | Texas Instruments Incorporated | Method for fabrication of a non-volatile JRAM cell |
EP0068894B1 (fr) * | 1981-06-29 | 1989-12-13 | Fujitsu Limited | Dispositif de mémoire dynamique à accès aléatoire |
US4608668A (en) * | 1981-09-03 | 1986-08-26 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor device |
US4641165A (en) * | 1982-04-28 | 1987-02-03 | Tokyo Shibaura Denki Kabushiki Kaisha | Dynamic memory device with an RC circuit for inhibiting the effects of alpha particle radiation |
JPH0632538Y2 (ja) * | 1985-05-29 | 1994-08-24 | 三井東圧化学株式会社 | 地下埋設管用不透水膜 |
JPS62229870A (ja) * | 1986-01-22 | 1987-10-08 | Mitsubishi Electric Corp | 半導体集積回路 |
JPH0821691B2 (ja) * | 1990-11-26 | 1996-03-04 | 三菱電機株式会社 | 半導体メモリセル |
JP2687829B2 (ja) * | 1992-12-21 | 1997-12-08 | 松下電器産業株式会社 | メモリ及びメモリ作成方式 |
JP2956645B2 (ja) * | 1997-04-07 | 1999-10-04 | 日本電気株式会社 | 半導体装置 |
US5895253A (en) * | 1997-08-22 | 1999-04-20 | Micron Technology, Inc. | Trench isolation for CMOS devices |
JP2001110908A (ja) * | 1999-10-06 | 2001-04-20 | Nec Corp | 半導体装置及びその製造方法 |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3618051A (en) * | 1969-05-09 | 1971-11-02 | Sperry Rand Corp | Nonvolatile read-write memory with addressing |
US3747072A (en) * | 1972-07-19 | 1973-07-17 | Sperry Rand Corp | Integrated static mnos memory circuit |
US3810124A (en) * | 1972-06-30 | 1974-05-07 | Ibm | Memory accessing system |
US3868274A (en) * | 1974-01-02 | 1975-02-25 | Gen Instrument Corp | Method for fabricating MOS devices with a multiplicity of thresholds on a semiconductor substrate |
US3876991A (en) * | 1973-07-11 | 1975-04-08 | Bell Telephone Labor Inc | Dual threshold, three transistor dynamic memory cell |
US3938108A (en) * | 1975-02-03 | 1976-02-10 | Intel Corporation | Erasable programmable read-only memory |
US3971001A (en) * | 1974-06-10 | 1976-07-20 | Sperry Rand Corporation | Reprogrammable read only variable threshold transistor memory with isolated addressing buffer |
US4003035A (en) * | 1975-07-03 | 1977-01-11 | Motorola, Inc. | Complementary field effect transistor sense amplifier for one transistor per bit ram cell |
US4094012A (en) * | 1976-10-01 | 1978-06-06 | Intel Corporation | Electrically programmable MOS read-only memory with isolated decoders |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3512099A (en) * | 1967-09-28 | 1970-05-12 | Tokyo Shibaura Electric Co | Semiconductor amplifier wherein several metal oxide semiconductor field effect transistors are coupled on a substrate |
US4112575A (en) * | 1976-12-20 | 1978-09-12 | Texas Instruments Incorporated | Fabrication methods for the high capacity ram cell |
-
1977
- 1977-06-10 JP JP6908577A patent/JPS544086A/ja active Pending
-
1978
- 1978-05-23 US US05/908,836 patent/US4156939A/en not_active Expired - Lifetime
- 1978-05-30 GB GB24345/78A patent/GB1602948A/en not_active Expired
- 1978-05-31 DE DE2823854A patent/DE2823854C3/de not_active Expired
- 1978-06-08 FR FR787817141A patent/FR2394144A1/fr active Granted
- 1978-06-09 NL NL7806294A patent/NL7806294A/xx not_active Application Discontinuation
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3618051A (en) * | 1969-05-09 | 1971-11-02 | Sperry Rand Corp | Nonvolatile read-write memory with addressing |
US3810124A (en) * | 1972-06-30 | 1974-05-07 | Ibm | Memory accessing system |
US3747072A (en) * | 1972-07-19 | 1973-07-17 | Sperry Rand Corp | Integrated static mnos memory circuit |
US3876991A (en) * | 1973-07-11 | 1975-04-08 | Bell Telephone Labor Inc | Dual threshold, three transistor dynamic memory cell |
US3868274A (en) * | 1974-01-02 | 1975-02-25 | Gen Instrument Corp | Method for fabricating MOS devices with a multiplicity of thresholds on a semiconductor substrate |
US3868274B1 (fr) * | 1974-01-02 | 1988-07-26 | ||
US3971001A (en) * | 1974-06-10 | 1976-07-20 | Sperry Rand Corporation | Reprogrammable read only variable threshold transistor memory with isolated addressing buffer |
US3938108A (en) * | 1975-02-03 | 1976-02-10 | Intel Corporation | Erasable programmable read-only memory |
US4003035A (en) * | 1975-07-03 | 1977-01-11 | Motorola, Inc. | Complementary field effect transistor sense amplifier for one transistor per bit ram cell |
US4094012A (en) * | 1976-10-01 | 1978-06-06 | Intel Corporation | Electrically programmable MOS read-only memory with isolated decoders |
Non-Patent Citations (1)
Title |
---|
EXBK/76 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0019886A1 (fr) * | 1979-05-30 | 1980-12-10 | Siemens Aktiengesellschaft | Mémoire semiconductrice |
FR2458902A1 (fr) * | 1979-06-13 | 1981-01-02 | Siemens Ag | Procede pour fabriquer des circuits mos integres avec et sans transistors de memoire mnos selon la technologie des grilles en silicium |
Also Published As
Publication number | Publication date |
---|---|
DE2823854A1 (de) | 1978-12-21 |
NL7806294A (nl) | 1978-12-12 |
DE2823854B2 (fr) | 1980-04-17 |
DE2823854C3 (de) | 1986-10-23 |
US4156939A (en) | 1979-05-29 |
GB1602948A (en) | 1981-11-18 |
FR2394144B1 (fr) | 1983-02-04 |
JPS544086A (en) | 1979-01-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |