FR2399097A1 - Element de memoire - Google Patents

Element de memoire

Info

Publication number
FR2399097A1
FR2399097A1 FR7820291A FR7820291A FR2399097A1 FR 2399097 A1 FR2399097 A1 FR 2399097A1 FR 7820291 A FR7820291 A FR 7820291A FR 7820291 A FR7820291 A FR 7820291A FR 2399097 A1 FR2399097 A1 FR 2399097A1
Authority
FR
France
Prior art keywords
memory element
electrode
conductor
substrate
isolated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7820291A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of FR2399097A1 publication Critical patent/FR2399097A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/35—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices

Abstract

L'invention concerne un élément de mémoire. Dans cet élément de mémoire, qui comporte une région de source 2 raccordée à un conducteur de bits BL, une région de drain 3 et une porte 4 d'un transistor à effet de champ T raccordé à un conducteur de mots WL, ainsi qu'une électrode de mémorisation 8 au-dessus d'un substrat semi-conducteur 1, il est prévu une électrode 11, 11a isolée et à potentiel libre, au-dessous de laquelle le substrat 1 est dopé de façon supplémentaire, et une électrode de débordement commandable 13. Application notamment aux mémoires numériques statiques à semi-conducteurs.
FR7820291A 1977-07-29 1978-07-07 Element de memoire Withdrawn FR2399097A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19772734354 DE2734354A1 (de) 1977-07-29 1977-07-29 Speicherelement

Publications (1)

Publication Number Publication Date
FR2399097A1 true FR2399097A1 (fr) 1979-02-23

Family

ID=6015208

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7820291A Withdrawn FR2399097A1 (fr) 1977-07-29 1978-07-07 Element de memoire

Country Status (9)

Country Link
US (1) US4224635A (fr)
JP (1) JPS5426671A (fr)
BE (1) BE869373A (fr)
CA (1) CA1124858A (fr)
DE (1) DE2734354A1 (fr)
FR (1) FR2399097A1 (fr)
GB (1) GB2001801B (fr)
IT (1) IT1097163B (fr)
NL (1) NL7808029A (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5593252A (en) * 1979-01-05 1980-07-15 Mitsubishi Electric Corp Substrate potential generating apparatus
DE3235835A1 (de) * 1982-09-28 1984-03-29 Siemens AG, 1000 Berlin und 8000 München Halbleiter-speicherzelle
US5244825A (en) * 1983-02-23 1993-09-14 Texas Instruments Incorporated DRAM process with improved poly-to-poly capacitor
JPS59171279U (ja) * 1983-04-30 1984-11-15 三和テッキ株式会社 速度感応型慣性制振装置
US4922312A (en) * 1986-04-30 1990-05-01 Texas Instruments Incorporated DRAM process with improved polysilicon-to-polysilicon capacitor and the capacitor
US5003361A (en) * 1987-08-31 1991-03-26 At&T Bell Laboratories Active dynamic memory cell
JP2825135B2 (ja) * 1990-03-06 1998-11-18 富士通株式会社 半導体記憶装置及びその情報書込読出消去方法
US7064034B2 (en) * 2002-07-02 2006-06-20 Sandisk Corporation Technique for fabricating logic elements using multiple gate layers
US7700984B2 (en) * 2005-05-20 2010-04-20 Semiconductor Energy Laboratory Co., Ltd Semiconductor device including memory cell

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
EXBK/72 *
EXBK/76 *

Also Published As

Publication number Publication date
DE2734354A1 (de) 1979-02-08
GB2001801B (en) 1982-02-03
NL7808029A (nl) 1979-01-31
IT1097163B (it) 1985-08-26
IT7825762A0 (it) 1978-07-17
JPS5426671A (en) 1979-02-28
US4224635A (en) 1980-09-23
GB2001801A (en) 1979-02-07
BE869373A (fr) 1978-11-16
CA1124858A (fr) 1982-06-01

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Legal Events

Date Code Title Description
ST Notification of lapse