JPS544086A - Memory circuit unit - Google Patents

Memory circuit unit

Info

Publication number
JPS544086A
JPS544086A JP6908577A JP6908577A JPS544086A JP S544086 A JPS544086 A JP S544086A JP 6908577 A JP6908577 A JP 6908577A JP 6908577 A JP6908577 A JP 6908577A JP S544086 A JPS544086 A JP S544086A
Authority
JP
Japan
Prior art keywords
circuit unit
memory circuit
malfunctioned
avoiding
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6908577A
Other languages
English (en)
Inventor
Yoshihiro Takemae
Takeo Tatematsu
Katsuhiko Kabashima
Tomio Nakano
Kiyoshi Miyasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6908577A priority Critical patent/JPS544086A/ja
Priority to US05/908,836 priority patent/US4156939A/en
Priority to GB24345/78A priority patent/GB1602948A/en
Priority to DE2823854A priority patent/DE2823854C3/de
Priority to FR787817141A priority patent/FR2394144A1/fr
Priority to NL7806294A priority patent/NL7806294A/xx
Publication of JPS544086A publication Critical patent/JPS544086A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
JP6908577A 1977-06-10 1977-06-10 Memory circuit unit Pending JPS544086A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP6908577A JPS544086A (en) 1977-06-10 1977-06-10 Memory circuit unit
US05/908,836 US4156939A (en) 1977-06-10 1978-05-23 Integrated semiconductor memory device
GB24345/78A GB1602948A (en) 1977-06-10 1978-05-30 Integrated semiconductor memory device
DE2823854A DE2823854C3 (de) 1977-06-10 1978-05-31 Integrierte Halbleiterspeichervorrichtung
FR787817141A FR2394144A1 (fr) 1977-06-10 1978-06-08 Memoire a semiconducteurs
NL7806294A NL7806294A (nl) 1977-06-10 1978-06-09 Geintegreerde halfgeleider -geheugeninrichting.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6908577A JPS544086A (en) 1977-06-10 1977-06-10 Memory circuit unit

Publications (1)

Publication Number Publication Date
JPS544086A true JPS544086A (en) 1979-01-12

Family

ID=13392390

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6908577A Pending JPS544086A (en) 1977-06-10 1977-06-10 Memory circuit unit

Country Status (6)

Country Link
US (1) US4156939A (ja)
JP (1) JPS544086A (ja)
DE (1) DE2823854C3 (ja)
FR (1) FR2394144A1 (ja)
GB (1) GB1602948A (ja)
NL (1) NL7806294A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61194870U (ja) * 1985-05-29 1986-12-04

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4239993A (en) * 1978-09-22 1980-12-16 Texas Instruments Incorporated High performance dynamic sense amplifier with active loads
DE2921993A1 (de) * 1979-05-30 1980-12-04 Siemens Ag Halbleiterspeicher
DE2923995C2 (de) * 1979-06-13 1985-11-07 Siemens AG, 1000 Berlin und 8000 München Verfahren zum Herstellen von integrierten MOS-Schaltungen mit MOS-Transistoren und MNOS-Speichertransistoren in Silizium-Gate-Technologie
JPS5847862B2 (ja) * 1979-08-30 1983-10-25 富士通株式会社 半導体記憶装置及びその製造方法
JPS5678266U (ja) * 1979-11-09 1981-06-25
JPS5745267A (en) * 1980-09-01 1982-03-15 Nec Corp Semiconductor device
US4402126A (en) * 1981-05-18 1983-09-06 Texas Instruments Incorporated Method for fabrication of a non-volatile JRAM cell
IE55376B1 (en) * 1981-06-29 1990-08-29 Fujitsu Ltd Dynamic random access memory device
US4608668A (en) * 1981-09-03 1986-08-26 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor device
US4641165A (en) * 1982-04-28 1987-02-03 Tokyo Shibaura Denki Kabushiki Kaisha Dynamic memory device with an RC circuit for inhibiting the effects of alpha particle radiation
JPS62229870A (ja) * 1986-01-22 1987-10-08 Mitsubishi Electric Corp 半導体集積回路
JPH0821691B2 (ja) * 1990-11-26 1996-03-04 三菱電機株式会社 半導体メモリセル
JP2687829B2 (ja) * 1992-12-21 1997-12-08 松下電器産業株式会社 メモリ及びメモリ作成方式
JP2956645B2 (ja) * 1997-04-07 1999-10-04 日本電気株式会社 半導体装置
US5895253A (en) * 1997-08-22 1999-04-20 Micron Technology, Inc. Trench isolation for CMOS devices
JP2001110908A (ja) * 1999-10-06 2001-04-20 Nec Corp 半導体装置及びその製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3512099A (en) * 1967-09-28 1970-05-12 Tokyo Shibaura Electric Co Semiconductor amplifier wherein several metal oxide semiconductor field effect transistors are coupled on a substrate
US3618051A (en) * 1969-05-09 1971-11-02 Sperry Rand Corp Nonvolatile read-write memory with addressing
US3810124A (en) * 1972-06-30 1974-05-07 Ibm Memory accessing system
US3747072A (en) * 1972-07-19 1973-07-17 Sperry Rand Corp Integrated static mnos memory circuit
US3876991A (en) * 1973-07-11 1975-04-08 Bell Telephone Labor Inc Dual threshold, three transistor dynamic memory cell
US3868274A (en) * 1974-01-02 1975-02-25 Gen Instrument Corp Method for fabricating MOS devices with a multiplicity of thresholds on a semiconductor substrate
US3971001A (en) * 1974-06-10 1976-07-20 Sperry Rand Corporation Reprogrammable read only variable threshold transistor memory with isolated addressing buffer
US3938108A (en) * 1975-02-03 1976-02-10 Intel Corporation Erasable programmable read-only memory
US4003035A (en) * 1975-07-03 1977-01-11 Motorola, Inc. Complementary field effect transistor sense amplifier for one transistor per bit ram cell
US4094012A (en) * 1976-10-01 1978-06-06 Intel Corporation Electrically programmable MOS read-only memory with isolated decoders
US4112575A (en) * 1976-12-20 1978-09-12 Texas Instruments Incorporated Fabrication methods for the high capacity ram cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61194870U (ja) * 1985-05-29 1986-12-04

Also Published As

Publication number Publication date
DE2823854B2 (ja) 1980-04-17
NL7806294A (nl) 1978-12-12
US4156939A (en) 1979-05-29
FR2394144A1 (fr) 1979-01-05
DE2823854A1 (de) 1978-12-21
GB1602948A (en) 1981-11-18
FR2394144B1 (ja) 1983-02-04
DE2823854C3 (de) 1986-10-23

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