FR2385179A1 - Circuits d'acces a des cellules d'emmagasinage et leur mode de fonctionnement - Google Patents
Circuits d'acces a des cellules d'emmagasinage et leur mode de fonctionnementInfo
- Publication number
- FR2385179A1 FR2385179A1 FR7804979A FR7804979A FR2385179A1 FR 2385179 A1 FR2385179 A1 FR 2385179A1 FR 7804979 A FR7804979 A FR 7804979A FR 7804979 A FR7804979 A FR 7804979A FR 2385179 A1 FR2385179 A1 FR 2385179A1
- Authority
- FR
- France
- Prior art keywords
- operating mode
- storage cells
- access circuits
- switches
- cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
Abstract
L'invention concerne les circuits d'accès aux mémoires d'emmagasinage de données. La cellule 2 est reliée à une ligne de mot WL et à deux litres de bit B0 et B1. Ces dernières sont reliées aux lignes dentrée/sortie de données D0 et D1 par les commutateurs T9 et T10. Ces commutateurs sont préchargés par le signal de commande BD de sorte que la différence de potentiel apparaissant, lors d'un accès à la cellule, entre les lignes de bit B0 et B1, rende conducteur l'un des transistors T9 ou T10 mais pas l'autre. Applicable notamment dans les mémoires d'emmagasinage de données à circuits semi-conducteurs.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2712735A DE2712735B1 (de) | 1977-03-23 | 1977-03-23 | Lese-/Schreibzugriffschaltung zu Speicherzellen eines Speichers und Verfahren zu ihrem Betrieb |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2385179A1 true FR2385179A1 (fr) | 1978-10-20 |
FR2385179B1 FR2385179B1 (fr) | 1980-01-04 |
Family
ID=6004436
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7804979A Granted FR2385179A1 (fr) | 1977-03-23 | 1978-02-15 | Circuits d'acces a des cellules d'emmagasinage et leur mode de fonctionnement |
Country Status (8)
Country | Link |
---|---|
US (1) | US4112512A (fr) |
JP (1) | JPS6044751B2 (fr) |
DE (1) | DE2712735B1 (fr) |
FR (1) | FR2385179A1 (fr) |
GB (1) | GB1560367A (fr) |
IT (1) | IT1110464B (fr) |
NL (1) | NL7803023A (fr) |
SE (1) | SE422853B (fr) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2855118C2 (de) * | 1978-12-20 | 1981-03-26 | IBM Deutschland GmbH, 70569 Stuttgart | Dynamischer FET-Speicher |
US4274013A (en) * | 1979-02-09 | 1981-06-16 | Bell Telephone Laboratories, Incorporated | Sense amplifier |
JPS595989B2 (ja) * | 1980-02-16 | 1984-02-08 | 富士通株式会社 | スタティック型ランダムアクセスメモリ |
US4344156A (en) * | 1980-10-10 | 1982-08-10 | Inmos Corporation | High speed data transfer for a semiconductor memory |
JPS589285A (ja) * | 1981-07-08 | 1983-01-19 | Toshiba Corp | 半導体装置 |
DE3173745D1 (en) * | 1981-10-30 | 1986-03-20 | Ibm Deutschland | Fet memory |
JPS6151692A (ja) * | 1984-08-22 | 1986-03-14 | Hitachi Ltd | 記憶装置 |
JPS61239493A (ja) * | 1985-04-05 | 1986-10-24 | Fujitsu Ltd | 半導体記憶装置 |
JPH0766664B2 (ja) * | 1988-11-28 | 1995-07-19 | 日本電気株式会社 | 半導体メモリ回路 |
JPH0762955B2 (ja) * | 1989-05-15 | 1995-07-05 | 株式会社東芝 | ダイナミック型ランダムアクセスメモリ |
JPH02301097A (ja) * | 1989-05-15 | 1990-12-13 | Toshiba Corp | ダイナミック型ランダムアクセスメモリ |
JPH03154288A (ja) * | 1989-11-10 | 1991-07-02 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP2781080B2 (ja) * | 1991-04-09 | 1998-07-30 | 三菱電機株式会社 | ランダムアクセスメモリ |
US5907251A (en) * | 1996-11-22 | 1999-05-25 | International Business Machines Corp. | Low voltage swing capacitive bus driver device |
US6195027B1 (en) | 1999-04-30 | 2001-02-27 | International Business Machines Corporation | Capacitive precharging and discharging network for converting N bit input into M bit output |
US6549476B2 (en) | 2001-04-09 | 2003-04-15 | Micron Technology, Inc. | Device and method for using complementary bits in a memory array |
US6791859B2 (en) | 2001-11-20 | 2004-09-14 | Micron Technology, Inc. | Complementary bit PCRAM sense amplifier and method of operation |
US6791885B2 (en) | 2002-02-19 | 2004-09-14 | Micron Technology, Inc. | Programmable conductor random access memory and method for sensing same |
US6731528B2 (en) * | 2002-05-03 | 2004-05-04 | Micron Technology, Inc. | Dual write cycle programmable conductor memory system and method of operation |
JP2012114215A (ja) * | 2010-11-24 | 2012-06-14 | Elpida Memory Inc | 半導体装置及びそのレイアウト方法 |
WO2013158088A1 (fr) * | 2012-04-18 | 2013-10-24 | Hewlett-Packard Development Company, L.P. | Circuit fournissant des tensions continues à des lignes de signal différentiel par l'intermédiaire d'une impulsion de restauration |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3760381A (en) * | 1972-06-30 | 1973-09-18 | Ibm | Stored charge memory detection circuit |
US3949381A (en) * | 1974-07-23 | 1976-04-06 | International Business Machines Corporation | Differential charge transfer sense amplifier |
US3967252A (en) * | 1974-10-03 | 1976-06-29 | Mostek Corporation | Sense AMP for random access memory |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3676704A (en) * | 1970-12-29 | 1972-07-11 | Ibm | Monolithic memory sense amplifier/bit driver |
US3771147A (en) * | 1972-12-04 | 1973-11-06 | Bell Telephone Labor Inc | Igfet memory system |
US3806898A (en) * | 1973-06-29 | 1974-04-23 | Ibm | Regeneration of dynamic monolithic memories |
-
1977
- 1977-03-23 DE DE2712735A patent/DE2712735B1/de active Granted
- 1977-12-22 US US05/863,566 patent/US4112512A/en not_active Expired - Lifetime
-
1978
- 1978-02-15 FR FR7804979A patent/FR2385179A1/fr active Granted
- 1978-02-22 GB GB7134/78A patent/GB1560367A/en not_active Expired
- 1978-03-03 JP JP53023694A patent/JPS6044751B2/ja not_active Expired
- 1978-03-15 IT IT21202/78A patent/IT1110464B/it active
- 1978-03-17 SE SE7803096A patent/SE422853B/sv unknown
- 1978-03-21 NL NL7803023A patent/NL7803023A/xx not_active Application Discontinuation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3760381A (en) * | 1972-06-30 | 1973-09-18 | Ibm | Stored charge memory detection circuit |
US3949381A (en) * | 1974-07-23 | 1976-04-06 | International Business Machines Corporation | Differential charge transfer sense amplifier |
US3967252A (en) * | 1974-10-03 | 1976-06-29 | Mostek Corporation | Sense AMP for random access memory |
Also Published As
Publication number | Publication date |
---|---|
JPS6044751B2 (ja) | 1985-10-05 |
JPS53117344A (en) | 1978-10-13 |
IT1110464B (it) | 1985-12-23 |
IT7821202A0 (it) | 1978-03-15 |
SE422853B (sv) | 1982-03-29 |
DE2712735C2 (fr) | 1979-05-17 |
US4112512A (en) | 1978-09-05 |
SE7803096L (sv) | 1978-09-24 |
DE2712735B1 (de) | 1978-09-14 |
NL7803023A (nl) | 1978-09-26 |
GB1560367A (en) | 1980-02-06 |
FR2385179B1 (fr) | 1980-01-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2385179A1 (fr) | Circuits d'acces a des cellules d'emmagasinage et leur mode de fonctionnement | |
US5367488A (en) | DRAM having bidirectional global bit lines | |
JPS6057159B2 (ja) | Mos半導体記憶器 | |
FR2355358A1 (fr) | Cellule de memoire a deux dispositifs | |
KR920008753A (ko) | 반도체 기억장치 | |
GB1502058A (en) | Memory | |
GB1417410A (en) | Buffer drive circuit for a metal oxide semiconductor memory system | |
GB1374881A (en) | High density read-only memory | |
JPS6160517B2 (fr) | ||
FR2410864A1 (fr) | Cellule de memoire permettant des operations d'ecriture et de lecture simultanees | |
US4342054A (en) | Information read device | |
FR2392542A1 (fr) | Amplificateur de lecture pour memoires a circuits integres | |
JPS56114196A (en) | Ram circuit | |
KR880006698A (ko) | 씨모오스 반도체 메모리장치의 입출력 회로 | |
JPS5827917B2 (ja) | Mis記憶回路 | |
KR900002667B1 (en) | The semiconductor memory device having complementary perceiving voltage in memory cell | |
JP2523736B2 (ja) | 半導体記憶装置 | |
FR2360151A1 (fr) | Module de memoire | |
KR900008523A (ko) | 반도체 메모리 소자 | |
KR850008238A (ko) | 반도체 기억장치 | |
FR2362470A1 (fr) | Cellule de memoire a acces direct bipolaire de schottky a double entree | |
SU1014029A1 (ru) | Устройство дл выборки информации | |
JPS63308792A (ja) | 半導体記憶装置 | |
RU98107644A (ru) | Запоминающая ячейка статического зупв | |
JPH01185896A (ja) | 半導体記億装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |