FR2355358A1 - Cellule de memoire a deux dispositifs - Google Patents

Cellule de memoire a deux dispositifs

Info

Publication number
FR2355358A1
FR2355358A1 FR7714010A FR7714010A FR2355358A1 FR 2355358 A1 FR2355358 A1 FR 2355358A1 FR 7714010 A FR7714010 A FR 7714010A FR 7714010 A FR7714010 A FR 7714010A FR 2355358 A1 FR2355358 A1 FR 2355358A1
Authority
FR
France
Prior art keywords
line
volts
memory cell
word line
energized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7714010A
Other languages
English (en)
Other versions
FR2355358B1 (fr
Inventor
Ekkehard F Miersch
Dominic P Spampinato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2355358A1 publication Critical patent/FR2355358A1/fr
Application granted granted Critical
Publication of FR2355358B1 publication Critical patent/FR2355358B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)

Abstract

L'invention concerne les dispositifs de mémoire de données à deux dispositifs. Une cellule de mémoire comprend deux transistors 1, 3 interconnectés par un condensateur C? . Une électrode de conduction de chaque transistor est connectée à une ligne de bit/détection B/S0 B/S1 tandis que les électrodes de commande sont reliées à une ligne de mot. Pour écrire un << 1 >>, la ligne B/S1 est mise à V volts, la ligne B/S0 à 0 volt et la ligne de mot est excitée Pour écrire un << 0 >>, les tensions sur les lignes de bit/détection sont inversées. Pour la lecture, la capacité parasite des lignes B/S0 et BS1 est préchargée à V volts, puis isolée. Ensuite, la ligne de mot est excitée Applicable aux mémoires de calculateurs.
FR7714010A 1976-06-17 1977-05-03 Cellule de memoire a deux dispositifs Granted FR2355358A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/697,188 US4103342A (en) 1976-06-17 1976-06-17 Two-device memory cell with single floating capacitor

Publications (2)

Publication Number Publication Date
FR2355358A1 true FR2355358A1 (fr) 1978-01-13
FR2355358B1 FR2355358B1 (fr) 1979-03-09

Family

ID=24800170

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7714010A Granted FR2355358A1 (fr) 1976-06-17 1977-05-03 Cellule de memoire a deux dispositifs

Country Status (8)

Country Link
US (1) US4103342A (fr)
JP (1) JPS52154314A (fr)
CA (1) CA1095620A (fr)
DE (1) DE2725613C2 (fr)
FR (1) FR2355358A1 (fr)
GB (1) GB1523094A (fr)
IT (1) IT1115344B (fr)
NL (1) NL7704931A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2402277A1 (fr) * 1977-09-06 1979-03-30 Siemens Ag Memoire a semiconducteurs integree monolithique

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US4160275A (en) * 1978-04-03 1979-07-03 International Business Machines Corporation Accessing arrangement for memories with small cells
JPS5634179A (en) * 1979-08-24 1981-04-06 Mitsubishi Electric Corp Control circuit for memory unit
US4413330A (en) * 1981-06-30 1983-11-01 International Business Machines Corporation Apparatus for the reduction of the short-channel effect in a single-polysilicon, one-device FET dynamic RAM array
GB2144937B (en) * 1981-08-05 1986-02-19 Gen Instrument Corp A storage cell suitable for use in a storage cell logic array
JPS6033518U (ja) * 1983-08-10 1985-03-07 金子農機株式会社 穀物搬送装置
JPS6116099A (ja) * 1984-06-29 1986-01-24 Sharp Corp ダイナミック型半導体記憶装置
FR2595160A1 (fr) * 1986-02-28 1987-09-04 Eurotechnique Sa Cellule memoire couplee et memoire dynamique comportant une telle cellule
US4888733A (en) * 1988-09-12 1989-12-19 Ramtron Corporation Non-volatile memory cell and sensing method
JPH02168492A (ja) * 1988-12-21 1990-06-28 Nec Corp ダイナミックｒａｍのメモリセル
US5293563A (en) * 1988-12-29 1994-03-08 Sharp Kabushiki Kaisha Multi-level memory cell with increased read-out margin
US5219779A (en) * 1989-05-11 1993-06-15 Sharp Kabushiki Kaisha Memory cell for dynamic random access memory
JP2719237B2 (ja) * 1990-12-20 1998-02-25 シャープ株式会社 ダイナミック型半導体記憶装置
US5363327A (en) * 1993-01-19 1994-11-08 International Business Machines Corporation Buried-sidewall-strap two transistor one capacitor trench cell
KR0146075B1 (ko) * 1995-05-25 1998-11-02 문정환 반도체 메모리 셀
US7408218B2 (en) 2001-12-14 2008-08-05 Renesas Technology Corporation Semiconductor device having plural dram memory cells and a logic circuit
US6888187B2 (en) * 2002-08-26 2005-05-03 International Business Machines Corporation DRAM cell with enhanced SER immunity
US7164595B1 (en) * 2005-08-25 2007-01-16 Micron Technology, Inc. Device and method for using dynamic cell plate sensing in a DRAM memory cell
WO2018044479A1 (fr) 2016-08-31 2018-03-08 Micron Technology, Inc. Structures d'amplificateur de détection
KR102227270B1 (ko) 2016-08-31 2021-03-15 마이크론 테크놀로지, 인크. 강유전 메모리 셀
SG11201901168UA (en) 2016-08-31 2019-03-28 Micron Technology Inc Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory
EP3507831B1 (fr) 2016-08-31 2021-03-03 Micron Technology, Inc. Matrices mémoire
KR102160178B1 (ko) 2016-08-31 2020-09-28 마이크론 테크놀로지, 인크 메모리 어레이
WO2018044487A1 (fr) 2016-08-31 2018-03-08 Micron Technology, Inc. Appareils et procédés comprenant une mémoire ferroélectrique et permettant d'accéder à une mémoire ferroélectrique
US10056386B2 (en) 2016-08-31 2018-08-21 Micron Technology, Inc. Memory cells and memory arrays
EP3507830A4 (fr) 2016-08-31 2020-04-01 Micron Technology, Inc. Cellules mémoires et matrices mémoires
KR102134532B1 (ko) 2016-08-31 2020-07-20 마이크론 테크놀로지, 인크 메모리 셀들 및 메모리 어레이들
WO2018044510A1 (fr) 2016-08-31 2018-03-08 Micron Technology, Inc. Appareils et procédés comprenant une mémoire à deux transistors et un condensateur et pour accéder à celle-ci
US10355002B2 (en) * 2016-08-31 2019-07-16 Micron Technology, Inc. Memory cells, methods of forming an array of two transistor-one capacitor memory cells, and methods used in fabricating integrated circuitry
CN110192280A (zh) 2017-01-12 2019-08-30 美光科技公司 存储器单元、双晶体管单电容器存储器单元阵列、形成双晶体管单电容器存储器单元阵列的方法及用于制造集成电路的方法
US10867675B2 (en) 2017-07-13 2020-12-15 Micron Technology, Inc. Apparatuses and methods for memory including ferroelectric memory cells and dielectric memory cells
US10083973B1 (en) * 2017-08-09 2018-09-25 Micron Technology, Inc. Apparatuses and methods for reading memory cells
WO2019045882A1 (fr) 2017-08-29 2019-03-07 Micron Technology, Inc. Circuits de mémoire

Family Cites Families (5)

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Publication number Priority date Publication date Assignee Title
JPS4420093Y1 (fr) * 1966-04-27 1969-08-28
US3463992A (en) * 1966-06-13 1969-08-26 Gen Electric Electrical capacitor systems having long-term storage characteristics
US3585185A (en) * 1968-05-13 1971-06-15 Wyandotte Chemicals Corp Ester-containing polyols
DE2431079C3 (de) * 1974-06-28 1979-12-13 Ibm Deutschland Gmbh, 7000 Stuttgart Dynamischer Halbleiterspeicher mit Zwei-Transistor-Speicherelementen
US3938109A (en) * 1975-02-19 1976-02-10 Intel Corporation High speed ECL compatible MOS-Ram

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2402277A1 (fr) * 1977-09-06 1979-03-30 Siemens Ag Memoire a semiconducteurs integree monolithique

Also Published As

Publication number Publication date
JPS5733632B2 (fr) 1982-07-17
DE2725613C2 (de) 1984-05-24
US4103342A (en) 1978-07-25
NL7704931A (nl) 1977-12-20
IT1115344B (it) 1986-02-03
FR2355358B1 (fr) 1979-03-09
DE2725613A1 (de) 1977-12-29
GB1523094A (en) 1978-08-31
CA1095620A (fr) 1981-02-10
JPS52154314A (en) 1977-12-22

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