NL7704931A - Capacitieve geheugencel. - Google Patents

Capacitieve geheugencel.

Info

Publication number
NL7704931A
NL7704931A NL7704931A NL7704931A NL7704931A NL 7704931 A NL7704931 A NL 7704931A NL 7704931 A NL7704931 A NL 7704931A NL 7704931 A NL7704931 A NL 7704931A NL 7704931 A NL7704931 A NL 7704931A
Authority
NL
Netherlands
Prior art keywords
memory cell
capacitive memory
capacitive
cell
memory
Prior art date
Application number
NL7704931A
Other languages
English (en)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of NL7704931A publication Critical patent/NL7704931A/nl

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
NL7704931A 1976-06-17 1977-05-05 Capacitieve geheugencel. NL7704931A (nl)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/697,188 US4103342A (en) 1976-06-17 1976-06-17 Two-device memory cell with single floating capacitor

Publications (1)

Publication Number Publication Date
NL7704931A true NL7704931A (nl) 1977-12-20

Family

ID=24800170

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7704931A NL7704931A (nl) 1976-06-17 1977-05-05 Capacitieve geheugencel.

Country Status (8)

Country Link
US (1) US4103342A (nl)
JP (1) JPS52154314A (nl)
CA (1) CA1095620A (nl)
DE (1) DE2725613C2 (nl)
FR (1) FR2355358A1 (nl)
GB (1) GB1523094A (nl)
IT (1) IT1115344B (nl)
NL (1) NL7704931A (nl)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2740113A1 (de) * 1977-09-06 1979-03-15 Siemens Ag Monolithisch integrierter halbleiterspeicher
US4160275A (en) * 1978-04-03 1979-07-03 International Business Machines Corporation Accessing arrangement for memories with small cells
JPS5634179A (en) * 1979-08-24 1981-04-06 Mitsubishi Electric Corp Control circuit for memory unit
US4413330A (en) * 1981-06-30 1983-11-01 International Business Machines Corporation Apparatus for the reduction of the short-channel effect in a single-polysilicon, one-device FET dynamic RAM array
GB2144937B (en) * 1981-08-05 1986-02-19 Gen Instrument Corp A storage cell suitable for use in a storage cell logic array
JPS6033518U (ja) * 1983-08-10 1985-03-07 金子農機株式会社 穀物搬送装置
JPS6116099A (ja) * 1984-06-29 1986-01-24 Sharp Corp ダイナミック型半導体記憶装置
FR2595160A1 (fr) * 1986-02-28 1987-09-04 Eurotechnique Sa Cellule memoire couplee et memoire dynamique comportant une telle cellule
US4888733A (en) * 1988-09-12 1989-12-19 Ramtron Corporation Non-volatile memory cell and sensing method
JPH02168492A (ja) * 1988-12-21 1990-06-28 Nec Corp ダイナミックｒａｍのメモリセル
US5293563A (en) * 1988-12-29 1994-03-08 Sharp Kabushiki Kaisha Multi-level memory cell with increased read-out margin
US5219779A (en) * 1989-05-11 1993-06-15 Sharp Kabushiki Kaisha Memory cell for dynamic random access memory
JP2719237B2 (ja) * 1990-12-20 1998-02-25 シャープ株式会社 ダイナミック型半導体記憶装置
US5363327A (en) * 1993-01-19 1994-11-08 International Business Machines Corporation Buried-sidewall-strap two transistor one capacitor trench cell
KR0146075B1 (ko) * 1995-05-25 1998-11-02 문정환 반도체 메모리 셀
CN100336226C (zh) 2001-12-14 2007-09-05 株式会社日立制作所 半导体器件
US6888187B2 (en) 2002-08-26 2005-05-03 International Business Machines Corporation DRAM cell with enhanced SER immunity
US7164595B1 (en) * 2005-08-25 2007-01-16 Micron Technology, Inc. Device and method for using dynamic cell plate sensing in a DRAM memory cell
US10355002B2 (en) 2016-08-31 2019-07-16 Micron Technology, Inc. Memory cells, methods of forming an array of two transistor-one capacitor memory cells, and methods used in fabricating integrated circuitry
US10157926B2 (en) 2016-08-31 2018-12-18 Micron Technology, Inc. Memory cells and memory arrays
KR102188490B1 (ko) 2016-08-31 2020-12-09 마이크론 테크놀로지, 인크. 강유전체 메모리를 포함하며 강유전체 메모리에 액세스하기 위한 장치 및 방법
CN109690680B (zh) 2016-08-31 2023-07-21 美光科技公司 包含二晶体管一电容器的存储器及用于存取所述存储器的设备与方法
WO2018044485A1 (en) 2016-08-31 2018-03-08 Micron Technology, Inc. Ferroelectric memory cells
KR102208380B1 (ko) 2016-08-31 2021-01-28 마이크론 테크놀로지, 인크 메모리 셀들 및 메모리 어레이들
WO2018044486A1 (en) 2016-08-31 2018-03-08 Micron Technology, Inc. Apparatuses and methods including ferroelectric memory and for operating ferroelectric memory
WO2018044453A1 (en) 2016-08-31 2018-03-08 Micron Technology, Inc. Memory cells and memory arrays
WO2018044479A1 (en) 2016-08-31 2018-03-08 Micron Technology, Inc. Sense amplifier constructions
KR102160178B1 (ko) 2016-08-31 2020-09-28 마이크론 테크놀로지, 인크 메모리 어레이
US10153281B2 (en) 2016-08-31 2018-12-11 Micron Technology, Inc. Memory cells and memory arrays
US11211384B2 (en) 2017-01-12 2021-12-28 Micron Technology, Inc. Memory cells, arrays of two transistor-one capacitor memory cells, methods of forming an array of two transistor-one capacitor memory cells, and methods used in fabricating integrated circuitry
US10867675B2 (en) 2017-07-13 2020-12-15 Micron Technology, Inc. Apparatuses and methods for memory including ferroelectric memory cells and dielectric memory cells
US10083973B1 (en) * 2017-08-09 2018-09-25 Micron Technology, Inc. Apparatuses and methods for reading memory cells
WO2019045882A1 (en) 2017-08-29 2019-03-07 Micron Technology, Inc. MEMORY CIRCUITS

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4420093Y1 (nl) * 1966-04-27 1969-08-28
US3463992A (en) * 1966-06-13 1969-08-26 Gen Electric Electrical capacitor systems having long-term storage characteristics
US3585185A (en) * 1968-05-13 1971-06-15 Wyandotte Chemicals Corp Ester-containing polyols
DE2431079C3 (de) * 1974-06-28 1979-12-13 Ibm Deutschland Gmbh, 7000 Stuttgart Dynamischer Halbleiterspeicher mit Zwei-Transistor-Speicherelementen
US3938109A (en) * 1975-02-19 1976-02-10 Intel Corporation High speed ECL compatible MOS-Ram

Also Published As

Publication number Publication date
FR2355358A1 (fr) 1978-01-13
IT1115344B (it) 1986-02-03
DE2725613C2 (de) 1984-05-24
US4103342A (en) 1978-07-25
FR2355358B1 (nl) 1979-03-09
DE2725613A1 (de) 1977-12-29
GB1523094A (en) 1978-08-31
CA1095620A (en) 1981-02-10
JPS5733632B2 (nl) 1982-07-17
JPS52154314A (en) 1977-12-22

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Legal Events

Date Code Title Description
BV The patent application has lapsed