KR910010519A - 반도체 메모리 회로장치 - Google Patents

반도체 메모리 회로장치 Download PDF

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Publication number
KR910010519A
KR910010519A KR1019900018474A KR900018474A KR910010519A KR 910010519 A KR910010519 A KR 910010519A KR 1019900018474 A KR1019900018474 A KR 1019900018474A KR 900018474 A KR900018474 A KR 900018474A KR 910010519 A KR910010519 A KR 910010519A
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KR
South Korea
Prior art keywords
transistor
ram
word line
memory
signal
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KR1019900018474A
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English (en)
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KR940000613B1 (ko
Inventor
히로유키 모테기
히데아키 우치다
야스노리 구와시마
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
다케다이 마사다카
도시바 마이크로 일렉트로닉스 가부시키가이샤
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Application filed by 아오이 죠이치, 가부시키가이샤 도시바, 다케다이 마사다카, 도시바 마이크로 일렉트로닉스 가부시키가이샤 filed Critical 아오이 죠이치
Publication of KR910010519A publication Critical patent/KR910010519A/ko
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Publication of KR940000613B1 publication Critical patent/KR940000613B1/ko

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/14Dummy cell management; Sense reference voltage generators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)

Abstract

내용 없음.

Description

반도체메모리회로장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 1실시예의 회로도.
제2도는 본 발명에 따른 다른 실시예의 회로도.

Claims (2)

  1. 복수의 행과 복수의 열에 의한 매트릭스상에 배치된 랜덤·억세스·메모리(통칭 RAM)을 갖추고, 상기 RAM의 독출동작시에 있어서의 센스증폭기의 동작을 가능하게 하는 구성으로서, 상기 RAM의 각 메모리셀선택용 워드선과 같은 형태를 가지며 또한 같은 트랜지스터를 갖춘 더미워드선(DWL)을 설치하고, 이 더미워드선(DWL)의 말단의 RAM셀 데이터를 독출하는 전송게이트부와 같은 제1트랜지스터(T2)에는 상기 메모리셀중의 출력트랜지스터와 크기가 같은 제2트랜지스터(T1)를 상기 제1트랜지스터(T2)와 제1전원사이에 직렬로 배치함과 더불어 상기 1트랜지스터(T2)와 제2전원사이에 제2트랜지스터(T1)와 극성이 다른 제3트랜지스터(T3)를 설치하는 한편, 상기 제 2트랜지스터(T1)와 제3트랜지스터(T3)의 게이트입력신호로서 메모리동작을 가능하게 하는 이네이블신호(Enable)를 입력시킴으로써 인버터를 형성하고, 이 인버터의 드레인이 되는 상기 제1트랜지스터(T2)와 제3트랜지스터(T3)의 접속부에 용량(C2)를 설치하는 바, 이 용량(C2)은 상기 더미워드선(DWL)이 선택되어 충전 또는 방전을 개시했을 때부터 상기 드레인부의 전위변화를 검출할 때까지의 시간을 조정하는 것으로 상기 드레인전위에 의해 검출된 신호로 상기 RAM의 센스증폭기를 동작시키는 구성이 구비되어 있는 것을 특징으로 하는 반도체메모리회로장치.
  2. 복수의 행과 복수의 열에 의한 매트릭스형태로 RAM셀이 배치된 RAM을 갖추고, 독출동작 또는 기입동작종료후의 RAM의 버스선을 프리차아지시키는 신호작성회로로서, 상기 각 RAM셀을 선택하는 워드선과 같은 형태를 갖추고 또한 같은 트랜지스터를 갖춘 더미워드선(DWL1, DWL2)을 1개 내지 복수개 설치하고, 이 더미워드선 (DWL1, DWL2)의 말단에 워드선이 비선택으로 된 것을 검출하기 위한 검출 회로(115,141~143)를 설치하여, 이검출회로출력을 RAM의 버스선을 프리차아지시키기 위한 신호로서 사용하는 것을 특징으로 하는 반도체메모리회로장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900018474A 1989-11-15 1990-11-15 반도체메모리회로장치 KR940000613B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP01-294986 1989-11-15
JP1294986A JPH03156795A (ja) 1989-11-15 1989-11-15 半導体メモリ回路装置

Publications (2)

Publication Number Publication Date
KR910010519A true KR910010519A (ko) 1991-06-29
KR940000613B1 KR940000613B1 (ko) 1994-01-26

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900018474A KR940000613B1 (ko) 1989-11-15 1990-11-15 반도체메모리회로장치

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Country Link
US (1) US5241506A (ko)
EP (1) EP0432482B1 (ko)
JP (1) JPH03156795A (ko)
KR (1) KR940000613B1 (ko)
DE (1) DE69024773T2 (ko)

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JP3220035B2 (ja) * 1997-02-27 2001-10-22 エヌイーシーマイクロシステム株式会社 スタチック型半導体記憶装置
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Also Published As

Publication number Publication date
US5241506A (en) 1993-08-31
EP0432482A3 (en) 1992-03-18
DE69024773D1 (de) 1996-02-22
EP0432482A2 (en) 1991-06-19
JPH03156795A (ja) 1991-07-04
KR940000613B1 (ko) 1994-01-26
EP0432482B1 (en) 1996-01-10
DE69024773T2 (de) 1996-06-27

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