FR2146929A1 - Semiconductor elements separation - from diffused semiconductor wafer,using solder as mask for etching and cutting - Google Patents

Semiconductor elements separation - from diffused semiconductor wafer,using solder as mask for etching and cutting

Info

Publication number
FR2146929A1
FR2146929A1 FR7127300A FR7127300A FR2146929A1 FR 2146929 A1 FR2146929 A1 FR 2146929A1 FR 7127300 A FR7127300 A FR 7127300A FR 7127300 A FR7127300 A FR 7127300A FR 2146929 A1 FR2146929 A1 FR 2146929A1
Authority
FR
France
Prior art keywords
mask
elements
cutting
solder
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7127300A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Silec Semi Conducteurs SA
Original Assignee
Silec Semi Conducteurs SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silec Semi Conducteurs SA filed Critical Silec Semi Conducteurs SA
Priority to FR7127300A priority Critical patent/FR2146929A1/en
Priority to DE19712161749 priority patent/DE2161749A1/en
Publication of FR2146929A1 publication Critical patent/FR2146929A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3046Mechanical treatment, e.g. grinding, polishing, cutting using blasting, e.g. sand-blasting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)

Abstract

Semiconductor elements are sepd. from a wafer, etc., of diffused semiconductor material by applying a mask of a metal alloy, which can be used for soldering the elements, to both sides of the wafer in the areas to be protected, exposing the unmasked areas to mechanical and/or chemical attack to obtain the individual elements and then remelting the metal alloy areas to level the solder surfaces of the elements. The technique is esp. useful for cutting elements from Si wafers. The danger of contaminating the pn-transition is eliminated.
FR7127300A 1971-07-26 1971-07-26 Semiconductor elements separation - from diffused semiconductor wafer,using solder as mask for etching and cutting Withdrawn FR2146929A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR7127300A FR2146929A1 (en) 1971-07-26 1971-07-26 Semiconductor elements separation - from diffused semiconductor wafer,using solder as mask for etching and cutting
DE19712161749 DE2161749A1 (en) 1971-07-26 1971-12-13 METHOD OF DIVISIONING SEMICONDUCTOR ELEMENTS FROM A WASHER OR DGL. MADE OF SEMICONDUCTOR MATERIAL

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7127300A FR2146929A1 (en) 1971-07-26 1971-07-26 Semiconductor elements separation - from diffused semiconductor wafer,using solder as mask for etching and cutting

Publications (1)

Publication Number Publication Date
FR2146929A1 true FR2146929A1 (en) 1973-03-09

Family

ID=9080915

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7127300A Withdrawn FR2146929A1 (en) 1971-07-26 1971-07-26 Semiconductor elements separation - from diffused semiconductor wafer,using solder as mask for etching and cutting

Country Status (2)

Country Link
DE (1) DE2161749A1 (en)
FR (1) FR2146929A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2312116A1 (en) * 1975-05-20 1976-12-17 Siemens Ag PROCESS FOR MANUFACTURING SEMICONDUCTOR COMPONENTS

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2312116A1 (en) * 1975-05-20 1976-12-17 Siemens Ag PROCESS FOR MANUFACTURING SEMICONDUCTOR COMPONENTS

Also Published As

Publication number Publication date
DE2161749A1 (en) 1973-02-08

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Legal Events

Date Code Title Description
ST Notification of lapse