FI953159A0 - Yksikiteinen pii kvartsialustalla - Google Patents

Yksikiteinen pii kvartsialustalla

Info

Publication number
FI953159A0
FI953159A0 FI953159A FI953159A FI953159A0 FI 953159 A0 FI953159 A0 FI 953159A0 FI 953159 A FI953159 A FI 953159A FI 953159 A FI953159 A FI 953159A FI 953159 A0 FI953159 A0 FI 953159A0
Authority
FI
Finland
Prior art keywords
quartz
single crystal
crystal silicon
silicon
crystal
Prior art date
Application number
FI953159A
Other languages
English (en)
Swedish (sv)
Other versions
FI953159A (fi
Inventor
Kalluri R Sarma
Charles S Chanley
Original Assignee
Honeywell Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inc filed Critical Honeywell Inc
Publication of FI953159A0 publication Critical patent/FI953159A0/fi
Publication of FI953159A publication Critical patent/FI953159A/fi

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/764—Air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76275—Vertical isolation by bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76289—Lateral isolation by air gap
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/012—Bonding, e.g. electrostatic for strain gauges
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/135—Removal of substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/15—Silicon on sapphire SOS
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
FI953159A 1992-12-29 1995-06-26 Yksikiteinen pii kvartsialustalla FI953159A (fi)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/998,968 US5258323A (en) 1992-12-29 1992-12-29 Single crystal silicon on quartz
PCT/US1993/008172 WO1994015356A1 (en) 1992-12-29 1993-08-30 Single crystal silicon on quartz

Publications (2)

Publication Number Publication Date
FI953159A0 true FI953159A0 (fi) 1995-06-26
FI953159A FI953159A (fi) 1995-06-26

Family

ID=25545722

Family Applications (1)

Application Number Title Priority Date Filing Date
FI953159A FI953159A (fi) 1992-12-29 1995-06-26 Yksikiteinen pii kvartsialustalla

Country Status (9)

Country Link
US (1) US5258323A (fi)
EP (1) EP0677207B1 (fi)
JP (1) JP3584035B2 (fi)
KR (1) KR100275828B1 (fi)
DE (1) DE69320210T2 (fi)
FI (1) FI953159A (fi)
RU (1) RU2121733C1 (fi)
TW (1) TW295674B (fi)
WO (1) WO1994015356A1 (fi)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0604231B8 (en) * 1992-12-25 2001-04-11 Canon Kabushiki Kaisha Semiconductor device applicable for liquid crystal display device, and process for its fabrication
US5344524A (en) * 1993-06-30 1994-09-06 Honeywell Inc. SOI substrate fabrication
US5719065A (en) 1993-10-01 1998-02-17 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device with removable spacers
WO1995018463A1 (en) * 1993-12-30 1995-07-06 Honeywell Inc. Single crystal silicon on quartz
US5642129A (en) * 1994-03-23 1997-06-24 Kopin Corporation Color sequential display panels
US5536950A (en) * 1994-10-28 1996-07-16 Honeywell Inc. High resolution active matrix LCD cell design
US5668045A (en) * 1994-11-30 1997-09-16 Sibond, L.L.C. Process for stripping outer edge of BESOI wafers
US5937312A (en) * 1995-03-23 1999-08-10 Sibond L.L.C. Single-etch stop process for the manufacture of silicon-on-insulator wafers
US5494849A (en) * 1995-03-23 1996-02-27 Si Bond L.L.C. Single-etch stop process for the manufacture of silicon-on-insulator substrates
JPH08274285A (ja) * 1995-03-29 1996-10-18 Komatsu Electron Metals Co Ltd Ｓｏｉ基板及びその製造方法
US5688415A (en) * 1995-05-30 1997-11-18 Ipec Precision, Inc. Localized plasma assisted chemical etching through a mask
JPH0964321A (ja) * 1995-08-24 1997-03-07 Komatsu Electron Metals Co Ltd Ｓｏｉ基板の製造方法
TW374196B (en) * 1996-02-23 1999-11-11 Semiconductor Energy Lab Co Ltd Semiconductor thin film and method for manufacturing the same and semiconductor device and method for manufacturing the same
US6612022B1 (en) * 1996-05-03 2003-09-02 Invensys Systems, Inc. Printed circuit board including removable auxiliary area with test points
US5754013A (en) * 1996-12-30 1998-05-19 Honeywell Inc. Apparatus for providing a nonlinear output in response to a linear input by using linear approximation and for use in a lighting control system
US6686623B2 (en) 1997-11-18 2004-02-03 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and electronic apparatus
JPH11204452A (ja) * 1998-01-13 1999-07-30 Mitsubishi Electric Corp 半導体基板の処理方法および半導体基板
JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US6271101B1 (en) 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6087236A (en) 1998-11-24 2000-07-11 Intel Corporation Integrated circuit with multiple gate dielectric structures
US7245018B1 (en) * 1999-06-22 2007-07-17 Semiconductor Energy Laboratory Co., Ltd. Wiring material, semiconductor device provided with a wiring using the wiring material and method of manufacturing thereof
DE10139056B4 (de) * 2001-08-08 2005-04-21 Infineon Technologies Ag Verfahren zum Dünnen eines scheibenförmigen Gegenstands sowie zur Herstellung eines beidseitig strukturierten Halbleiterbauelements
JP4653374B2 (ja) * 2001-08-23 2011-03-16 セイコーエプソン株式会社 電気光学装置の製造方法
TW200535758A (en) * 2004-04-23 2005-11-01 Innolux Display Corp A low temperature poly-silicon driver circuit display panel and fabricating method thereof
CN100527416C (zh) * 2004-08-18 2009-08-12 康宁股份有限公司 应变绝缘体上半导体结构以及应变绝缘体上半导体结构的制造方法
FR2880184B1 (fr) 2004-12-28 2007-03-30 Commissariat Energie Atomique Procede de detourage d'une structure obtenue par assemblage de deux plaques
WO2007091215A1 (en) * 2006-02-10 2007-08-16 Philips Intellectual Property & Standards Gmbh A light emitting device
CN103155102A (zh) * 2011-02-15 2013-06-12 住友电气工业株式会社 具有保护膜的复合衬底和制造半导体器件的方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4601779A (en) * 1985-06-24 1986-07-22 International Business Machines Corporation Method of producing a thin silicon-on-insulator layer
JPH0269938A (ja) * 1988-09-05 1990-03-08 Nec Corp 半導体装置の製造方法
JP2645478B2 (ja) * 1988-10-07 1997-08-25 富士通株式会社 半導体装置の製造方法
JPH0636414B2 (ja) * 1989-08-17 1994-05-11 信越半導体株式会社 半導体素子形成用基板の製造方法
US5013681A (en) * 1989-09-29 1991-05-07 The United States Of America As Represented By The Secretary Of The Navy Method of producing a thin silicon-on-insulator layer
JPH0636413B2 (ja) * 1990-03-29 1994-05-11 信越半導体株式会社 半導体素子形成用基板の製造方法
US5122887A (en) * 1991-03-05 1992-06-16 Sayett Group, Inc. Color display utilizing twisted nematic LCDs and selective polarizers
JP2812405B2 (ja) * 1991-03-15 1998-10-22 信越半導体株式会社 半導体基板の製造方法
CA2061796C (en) * 1991-03-28 2002-12-24 Kalluri R. Sarma High mobility integrated drivers for active matrix displays
US5110748A (en) * 1991-03-28 1992-05-05 Honeywell Inc. Method for fabricating high mobility thin film transistors as integrated drivers for active matrix display

Also Published As

Publication number Publication date
US5258323A (en) 1993-11-02
KR100275828B1 (ko) 2000-12-15
KR960700522A (ko) 1996-01-20
DE69320210T2 (de) 1999-02-11
DE69320210D1 (de) 1998-09-10
EP0677207B1 (en) 1998-08-05
FI953159A (fi) 1995-06-26
JP3584035B2 (ja) 2004-11-04
WO1994015356A1 (en) 1994-07-07
TW295674B (fi) 1997-01-11
RU2121733C1 (ru) 1998-11-10
EP0677207A1 (en) 1995-10-18
JPH08505010A (ja) 1996-05-28

Similar Documents

Publication Publication Date Title
FI953159A0 (fi) Yksikiteinen pii kvartsialustalla
DE69427730D1 (de) Kristallresonator
DE69431333T2 (de) GaN-Einkristall
DE69322565D1 (de) Diamant-Halbleiteranordnung
KR900008069A (ko) 실리콘 단결정의 제조장치
DE69319463T2 (de) Einkristall-Ziehvorrichtung
DE59209827D1 (de) Flüssigkristalline verbindungen
KR920701529A (ko) 실리콘 단결정 제조장치
KR970705775A (ko) 강유전성 액정 장치(Ferroeletric loquid crystal devices)
DE69311918D1 (de) Quarzkristalldruckwandler
DE59610014D1 (de) Schwingquarzsensor
DE69013631D1 (de) Einkristallsilizium.
DE59406690D1 (de) Flüssigkristalline verbindungen
FI911127A0 (fi) Anordning foer framstaellning av enskilda silikonkristaller.
DE69606449T2 (de) Züchtung von Silizium-Einkristall
DE69309198D1 (de) Flüssigkristallverbindung
DE69326786D1 (de) Einkristallziehungsverfahren
DE69508469T2 (de) Oxyde-Granat-Einkristall
DE69231552T2 (de) Komplex Kristall
DE69221215T2 (de) Drehschwingender Quarzkristallresonator
KR930022148U (ko) 액정표시장치
KR940022683U (ko) 단결정 성장장치
DE69322005T2 (de) Einkristalline Feldemissionsvorrichtung
KR930019039U (ko) 기판 착탈 장치
DE9218546U1 (de) Lünette

Legal Events

Date Code Title Description
FD Application lapsed