ES2238053T3 - Matriz pasiva no volatil y metodo para la lectura de la misma. - Google Patents

Matriz pasiva no volatil y metodo para la lectura de la misma.

Info

Publication number
ES2238053T3
ES2238053T3 ES01985301T ES01985301T ES2238053T3 ES 2238053 T3 ES2238053 T3 ES 2238053T3 ES 01985301 T ES01985301 T ES 01985301T ES 01985301 T ES01985301 T ES 01985301T ES 2238053 T3 ES2238053 T3 ES 2238053T3
Authority
ES
Spain
Prior art keywords
memory
segment
cell
lines
bit lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES01985301T
Other languages
English (en)
Spanish (es)
Inventor
Michael Thompson
Richard Womack
Goran Gustafsson
Johan Carlsson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ensurge Micropower ASA
Original Assignee
Thin Film Electronics ASA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thin Film Electronics ASA filed Critical Thin Film Electronics ASA
Application granted granted Critical
Publication of ES2238053T3 publication Critical patent/ES2238053T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
  • Read Only Memory (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
  • Magnetic Record Carriers (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Peptides Or Proteins (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Investigating Or Analysing Biological Materials (AREA)
  • Investigating Or Analyzing Materials By The Use Of Fluid Adsorption Or Reactions (AREA)
  • Investigating Or Analysing Materials By The Use Of Chemical Reactions (AREA)
ES01985301T 2000-08-24 2001-08-24 Matriz pasiva no volatil y metodo para la lectura de la misma. Expired - Lifetime ES2238053T3 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NO20004236A NO20004236L (no) 2000-08-24 2000-08-24 Ikke-flyktig passiv matriseinnretning og fremgangsmåte for utlesing av samme
NO20004236 2000-08-24

Publications (1)

Publication Number Publication Date
ES2238053T3 true ES2238053T3 (es) 2005-08-16

Family

ID=19911499

Family Applications (1)

Application Number Title Priority Date Filing Date
ES01985301T Expired - Lifetime ES2238053T3 (es) 2000-08-24 2001-08-24 Matriz pasiva no volatil y metodo para la lectura de la misma.

Country Status (14)

Country Link
US (1) US20030137865A1 (enExample)
EP (1) EP1316090B1 (enExample)
JP (1) JP3848620B2 (enExample)
KR (1) KR100540266B1 (enExample)
CN (1) CN100530420C (enExample)
AT (1) ATE290711T1 (enExample)
AU (2) AU2002223159B2 (enExample)
CA (1) CA2420378C (enExample)
DE (1) DE60109307T2 (enExample)
DK (1) DK1316090T3 (enExample)
ES (1) ES2238053T3 (enExample)
NO (1) NO20004236L (enExample)
RU (1) RU2245584C2 (enExample)
WO (1) WO2002025665A2 (enExample)

Families Citing this family (27)

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US6756620B2 (en) * 2001-06-29 2004-06-29 Intel Corporation Low-voltage and interface damage-free polymer memory device
US6624457B2 (en) 2001-07-20 2003-09-23 Intel Corporation Stepped structure for a multi-rank, stacked polymer memory device and method of making same
NO314524B1 (no) * 2001-11-30 2003-03-31 Thin Film Electronics Asa Fremgangsmåte til lesing av celler i en passiv matriseadresserbar innretning, samt innretning for utförelse av fremgangsmåten
US6996652B1 (en) * 2002-09-19 2006-02-07 Inapac Technology, Inc. High-speed segmented data bus architecture
NO324607B1 (no) * 2003-11-24 2007-11-26 Thin Film Electronics Asa Fremgangsmate for a betjene et datalagringsapparat som benytter passiv matriseadressering
KR100576484B1 (ko) * 2003-12-09 2006-05-10 주식회사 하이닉스반도체 차동 데이터를 가지는 불휘발성 강유전체 메모리 장치
NO324029B1 (no) * 2004-09-23 2007-07-30 Thin Film Electronics Asa Lesemetode og deteksjonsanordning
CN100466036C (zh) * 2005-06-30 2009-03-04 精工爱普生株式会社 显示装置及电子设备
TWI260643B (en) 2005-12-30 2006-08-21 Ind Tech Res Inst Organic memory
CN1996495B (zh) * 2005-12-31 2010-11-03 财团法人工业技术研究院 有机存储器之位单元
CN1996486B (zh) * 2005-12-31 2010-11-03 财团法人工业技术研究院 数字感测电路
CN100524519C (zh) * 2005-12-31 2009-08-05 财团法人工业技术研究院 有机存储器
ES2301344B1 (es) * 2006-03-14 2009-05-01 Universidad De Zaragoza Sistema de comunicaciones digitales para entornos residenciales, asistenciales, oficinas y similares.
EP1944763A1 (en) * 2007-01-12 2008-07-16 STMicroelectronics S.r.l. Reading circuit and method for data storage system
US9574326B2 (en) 2012-08-02 2017-02-21 Harnischfeger Technologies, Inc. Depth-related help functions for a shovel training simulator
AU2014202349A1 (en) 2012-08-02 2014-05-22 Harnischfeger Technologies, Inc. Depth-related help functions for a wheel loader training simulator
JP5714681B2 (ja) * 2013-10-25 2015-05-07 ウィンボンド エレクトロニクス コーポレーション 半導体記憶装置
US9773553B1 (en) * 2016-08-19 2017-09-26 Micron Technology, Inc. Segmented memory and operation
DE102016012071A1 (de) 2016-10-10 2018-04-12 Kai-Uwe Demasius Matrix mit kapazitiver Steuerungsvorrichtung
US10504575B2 (en) 2016-10-10 2019-12-10 Kai-Uwe Demasius Capacitive matrix arrangement and method for actuation thereof
JP2020088497A (ja) * 2018-11-20 2020-06-04 三星電子株式会社Samsung Electronics Co.,Ltd. メモリ回路、半導体装置および移動体デバイス
US11102437B2 (en) 2018-11-20 2021-08-24 Samsung Electronics Co., Ltd. Memory circuit and semiconductor device
US12407532B2 (en) * 2020-02-18 2025-09-02 International Business Machines Corporation Gain cell memory based physically unclonable function
KR20210143612A (ko) * 2020-05-20 2021-11-29 삼성전자주식회사 비휘발성 메모리 및 비휘발성 메모리의 동작 방법
CN111696602A (zh) * 2020-05-22 2020-09-22 珠海拍字节信息科技有限公司 铁电存储器及其操作方法
US11309034B2 (en) * 2020-07-15 2022-04-19 Ferroelectric Memory Gmbh Memory cell arrangement and methods thereof
CN114093398A (zh) * 2021-11-26 2022-02-25 无锡拍字节科技有限公司 一种铁电存储器的位线布局及铁电存储器

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4599709A (en) * 1984-02-17 1986-07-08 At&T Bell Laboratories Byte organized static memory
SU1378682A1 (ru) * 1986-05-18 1994-12-30 В.И. Овчаренко Матричный накопитель для постоянного запоминающего устройства
SU1596392A1 (ru) * 1987-10-23 1990-09-30 Предприятие П/Я Х-5737 Матричный накопитель и способ управлени записью, считыванием и стиранием информации в накопителе
DE68923573T2 (de) * 1988-03-31 1996-01-18 Sony Corp Eingangsschaltungen.
JP2982905B2 (ja) * 1989-10-02 1999-11-29 三菱電機株式会社 ダイナミック型半導体記憶装置
US5086412A (en) * 1990-11-21 1992-02-04 National Semiconductor Corporation Sense amplifier and method for ferroelectric memory
KR950011965B1 (ko) * 1992-02-19 1995-10-12 삼성전자주식회사 불휘발성 반도체 메모리 장치
TW231343B (enExample) * 1992-03-17 1994-10-01 Hitachi Seisakusyo Kk
JPH0677434A (ja) * 1992-08-27 1994-03-18 Hitachi Ltd 半導体記憶装置
US5337414A (en) * 1992-09-22 1994-08-09 Unisys Corporation Mass data storage and retrieval system
US5424997A (en) * 1994-03-15 1995-06-13 National Semiconductor Corporation Non-volatile semiconductor memory having switching devices for segmentation of a memory page and a method thereof
US5567636A (en) * 1995-02-27 1996-10-22 Motorola Inc. Process for forming a nonvolatile random access memory array
US5574692A (en) * 1995-06-07 1996-11-12 Lsi Logic Corporation Memory testing apparatus for microelectronic integrated circuit
US5969380A (en) * 1996-06-07 1999-10-19 Micron Technology, Inc. Three dimensional ferroelectric memory

Also Published As

Publication number Publication date
CN1471712A (zh) 2004-01-28
CA2420378C (en) 2006-05-09
NO20004236L (no) 2002-02-25
AU2002223159B2 (en) 2005-04-14
JP3848620B2 (ja) 2006-11-22
WO2002025665A2 (en) 2002-03-28
JP2004510283A (ja) 2004-04-02
AU2315902A (en) 2002-04-02
DK1316090T3 (da) 2005-05-30
EP1316090A2 (en) 2003-06-04
DE60109307T2 (de) 2006-04-13
KR100540266B1 (ko) 2006-01-10
CN100530420C (zh) 2009-08-19
NO20004236D0 (no) 2000-08-24
EP1316090B1 (en) 2005-03-09
KR20030059110A (ko) 2003-07-07
RU2245584C2 (ru) 2005-01-27
ATE290711T1 (de) 2005-03-15
WO2002025665A3 (en) 2002-05-16
US20030137865A1 (en) 2003-07-24
CA2420378A1 (en) 2002-03-28
DE60109307D1 (de) 2005-04-14

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