NO20004236L - Ikke-flyktig passiv matriseinnretning og fremgangsmåte for utlesing av samme - Google Patents

Ikke-flyktig passiv matriseinnretning og fremgangsmåte for utlesing av samme

Info

Publication number
NO20004236L
NO20004236L NO20004236A NO20004236A NO20004236L NO 20004236 L NO20004236 L NO 20004236L NO 20004236 A NO20004236 A NO 20004236A NO 20004236 A NO20004236 A NO 20004236A NO 20004236 L NO20004236 L NO 20004236L
Authority
NO
Norway
Prior art keywords
memory
segment
bit lines
passive matrix
lines
Prior art date
Application number
NO20004236A
Other languages
English (en)
Other versions
NO20004236D0 (no
Inventor
Michael O Thompson
Richard H Womack
Goeran Gustafsson
Johan Karlsson
Original Assignee
Thin Film Electronics Asa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thin Film Electronics Asa filed Critical Thin Film Electronics Asa
Priority to NO20004236A priority Critical patent/NO20004236L/no
Publication of NO20004236D0 publication Critical patent/NO20004236D0/no
Priority to US09/899,096 priority patent/US20020024835A1/en
Priority to NO20014136A priority patent/NO318368B1/no
Priority to EP01985301A priority patent/EP1316090B1/en
Priority to AU2002223159A priority patent/AU2002223159B2/en
Priority to CA002420378A priority patent/CA2420378C/en
Priority to KR1020037002558A priority patent/KR100540266B1/ko
Priority to AT01985301T priority patent/ATE290711T1/de
Priority to ES01985301T priority patent/ES2238053T3/es
Priority to CNB018178707A priority patent/CN100530420C/zh
Priority to PCT/NO2001/000348 priority patent/WO2002025665A2/en
Priority to RU2003108726/09A priority patent/RU2245584C2/ru
Priority to DE60109307T priority patent/DE60109307T2/de
Priority to JP2002529782A priority patent/JP3848620B2/ja
Priority to AU2315902A priority patent/AU2315902A/xx
Priority to DK01985301T priority patent/DK1316090T3/da
Priority to US10/088,913 priority patent/US20030137865A1/en
Publication of NO20004236L publication Critical patent/NO20004236L/no

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
  • Read Only Memory (AREA)
  • Investigating Or Analysing Biological Materials (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
  • Investigating Or Analyzing Materials By The Use Of Fluid Adsorption Or Reactions (AREA)
  • Investigating Or Analysing Materials By The Use Of Chemical Reactions (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Peptides Or Proteins (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Magnetic Record Carriers (AREA)

Abstract

I en ikke-flyktig passiv matriseinnretning (10) som omfatter et elektrisk polariserbart dielektrisk minnemateriale (12) som viser hysterese og er anordnet mellom første og andre sett (14; 15) av adresseringselektroder, utgjør elektrodene i det første sett ordlinjer (WLi... J og elektroden i det andre sett bitlinjer (BL]...n) i minneinnretningen. En minnecelle (13) med kondensatorlignende struktur er definert i minnematerialet (12) ved krysningene mellom ordlinjer (WL) og bitlinjer (BL). Ordlinjene (WL) er delt i segmenter (S]...,), som hver omfatter og er definert av tilstøtende bitlinjer (BL) og koblingsanordninger (25) er innrettet til å forbinde hver bitlinje (BL) i et segment (S) med en deteksjons anordning (26) og for samtidig kobling av alle minneceller (13) i et segment (S) for utlesning via dets bitlinjer (BL). Hver deteksjonsanordning (26) detekterer ladningsstrømmen i en bitlinje (BL) for å bestemme en logisk verdi lagret i en minnecelle (13) definert av bitlinjen (BL). I en utlesningsmetode for en slik minneinnretning (10) blir en ordlinje (WL) i et segment aktivert i henhold til en protokoll ved å sette dens potensial på en svitsjespennning (Vs) for minnecellen under minst en del av en lesesyklus, ' mens alle bitlinjene (BL) i segmentet (S) holdes på holdes på nullpotensial, hvorved en logisk verdi lagret i de enkelte minneceller detekteres av deteksjpnsanordningene (26). - Bruk i et volumetrisk datalagringsapparat med en rekke stablede sjikt som hver omfatter en ikke-flyktig passiv matriseminneinnretning.
NO20004236A 2000-07-07 2000-08-24 Ikke-flyktig passiv matriseinnretning og fremgangsmåte for utlesing av samme NO20004236L (no)

Priority Applications (17)

Application Number Priority Date Filing Date Title
NO20004236A NO20004236L (no) 2000-08-24 2000-08-24 Ikke-flyktig passiv matriseinnretning og fremgangsmåte for utlesing av samme
US09/899,096 US20020024835A1 (en) 2000-07-07 2001-07-06 Non-volatile passive matrix device and method for readout of the same
DK01985301T DK1316090T3 (da) 2000-08-24 2001-08-24 Ikke-flygtig passiv matrix og fremgangsmåde til udlæsning af denne
ES01985301T ES2238053T3 (es) 2000-08-24 2001-08-24 Matriz pasiva no volatil y metodo para la lectura de la misma.
CNB018178707A CN100530420C (zh) 2000-08-24 2001-08-24 非易失性无源矩阵器件及其读出方法
AU2002223159A AU2002223159B2 (en) 2000-08-24 2001-08-24 Non-volatile passive matrix and method for readout of the same
CA002420378A CA2420378C (en) 2000-08-24 2001-08-24 Non-volatile passive matrix and method for readout of the same
KR1020037002558A KR100540266B1 (ko) 2000-08-24 2001-08-24 비휘발성 수동 매트릭스 디바이스 및 그 독출 방법
AT01985301T ATE290711T1 (de) 2000-08-24 2001-08-24 Nichtfluechtige passive speicherarray und sein leseverfahren
NO20014136A NO318368B1 (no) 2000-08-24 2001-08-24 Ikke-flyktig passiv matriseinnretning og fremgangsmate for utlesing av samme
EP01985301A EP1316090B1 (en) 2000-08-24 2001-08-24 Non-volatile passive matrix and method for readout of the same
PCT/NO2001/000348 WO2002025665A2 (en) 2000-08-24 2001-08-24 Non-volatile passive matrix and method for readout of the same
RU2003108726/09A RU2245584C2 (ru) 2000-08-24 2001-08-24 Энергонезависимая пассивная матрица, способ считывания из подобной матрицы и устройство трехмерного хранения данных
DE60109307T DE60109307T2 (de) 2000-08-24 2001-08-24 Nichtfluechtige passive speicherarray und sein leseverfahren
JP2002529782A JP3848620B2 (ja) 2000-08-24 2001-08-24 不揮発性受動マトリックス装置および同装置の読み出し方法
AU2315902A AU2315902A (en) 2000-08-24 2001-08-24 Non-volatile passive matrix and method for readout of the same
US10/088,913 US20030137865A1 (en) 2000-08-24 2001-09-24 Non-volatile passive matrix device and method for readout of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NO20004236A NO20004236L (no) 2000-08-24 2000-08-24 Ikke-flyktig passiv matriseinnretning og fremgangsmåte for utlesing av samme

Publications (2)

Publication Number Publication Date
NO20004236D0 NO20004236D0 (no) 2000-08-24
NO20004236L true NO20004236L (no) 2002-02-25

Family

ID=19911499

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20004236A NO20004236L (no) 2000-07-07 2000-08-24 Ikke-flyktig passiv matriseinnretning og fremgangsmåte for utlesing av samme

Country Status (14)

Country Link
US (1) US20030137865A1 (no)
EP (1) EP1316090B1 (no)
JP (1) JP3848620B2 (no)
KR (1) KR100540266B1 (no)
CN (1) CN100530420C (no)
AT (1) ATE290711T1 (no)
AU (2) AU2002223159B2 (no)
CA (1) CA2420378C (no)
DE (1) DE60109307T2 (no)
DK (1) DK1316090T3 (no)
ES (1) ES2238053T3 (no)
NO (1) NO20004236L (no)
RU (1) RU2245584C2 (no)
WO (1) WO2002025665A2 (no)

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US6756620B2 (en) * 2001-06-29 2004-06-29 Intel Corporation Low-voltage and interface damage-free polymer memory device
US6624457B2 (en) 2001-07-20 2003-09-23 Intel Corporation Stepped structure for a multi-rank, stacked polymer memory device and method of making same
NO314524B1 (no) * 2001-11-30 2003-03-31 Thin Film Electronics Asa Fremgangsmåte til lesing av celler i en passiv matriseadresserbar innretning, samt innretning for utförelse av fremgangsmåten
US6996652B1 (en) * 2002-09-19 2006-02-07 Inapac Technology, Inc. High-speed segmented data bus architecture
NO324607B1 (no) * 2003-11-24 2007-11-26 Thin Film Electronics Asa Fremgangsmate for a betjene et datalagringsapparat som benytter passiv matriseadressering
KR100576484B1 (ko) * 2003-12-09 2006-05-10 주식회사 하이닉스반도체 차동 데이터를 가지는 불휘발성 강유전체 메모리 장치
NO324029B1 (no) * 2004-09-23 2007-07-30 Thin Film Electronics Asa Lesemetode og deteksjonsanordning
CN100466036C (zh) * 2005-06-30 2009-03-04 精工爱普生株式会社 显示装置及电子设备
TWI260643B (en) 2005-12-30 2006-08-21 Ind Tech Res Inst Organic memory
CN1996495B (zh) * 2005-12-31 2010-11-03 财团法人工业技术研究院 有机存储器之位单元
CN1996486B (zh) * 2005-12-31 2010-11-03 财团法人工业技术研究院 数字感测电路
EP1944763A1 (en) * 2007-01-12 2008-07-16 STMicroelectronics S.r.l. Reading circuit and method for data storage system
US9574326B2 (en) 2012-08-02 2017-02-21 Harnischfeger Technologies, Inc. Depth-related help functions for a shovel training simulator
AU2014202349A1 (en) 2012-08-02 2014-05-22 Harnischfeger Technologies, Inc. Depth-related help functions for a wheel loader training simulator
JP5714681B2 (ja) * 2013-10-25 2015-05-07 ウィンボンド エレクトロニクス コーポレーション 半導体記憶装置
US9773553B1 (en) 2016-08-19 2017-09-26 Micron Technology, Inc. Segmented memory and operation
CN110073440B (zh) 2016-10-10 2022-04-29 塞姆隆有限责任公司 电容矩阵布置及其激励方法
DE102016012071A1 (de) 2016-10-10 2018-04-12 Kai-Uwe Demasius Matrix mit kapazitiver Steuerungsvorrichtung
JP2020088497A (ja) * 2018-11-20 2020-06-04 三星電子株式会社Samsung Electronics Co.,Ltd. メモリ回路、半導体装置および移動体デバイス
US11102437B2 (en) * 2018-11-20 2021-08-24 Samsung Electronics Co., Ltd. Memory circuit and semiconductor device
US20210258173A1 (en) * 2020-02-18 2021-08-19 International Business Machines Corporation Gain cell memory based physically unclonable function
CN111696602A (zh) * 2020-05-22 2020-09-22 珠海拍字节信息科技有限公司 铁电存储器及其操作方法
US11309034B2 (en) * 2020-07-15 2022-04-19 Ferroelectric Memory Gmbh Memory cell arrangement and methods thereof

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Also Published As

Publication number Publication date
DK1316090T3 (da) 2005-05-30
DE60109307T2 (de) 2006-04-13
KR100540266B1 (ko) 2006-01-10
EP1316090A2 (en) 2003-06-04
ATE290711T1 (de) 2005-03-15
EP1316090B1 (en) 2005-03-09
CN100530420C (zh) 2009-08-19
JP2004510283A (ja) 2004-04-02
CN1471712A (zh) 2004-01-28
JP3848620B2 (ja) 2006-11-22
NO20004236D0 (no) 2000-08-24
DE60109307D1 (de) 2005-04-14
CA2420378C (en) 2006-05-09
US20030137865A1 (en) 2003-07-24
CA2420378A1 (en) 2002-03-28
WO2002025665A2 (en) 2002-03-28
WO2002025665A3 (en) 2002-05-16
AU2002223159B2 (en) 2005-04-14
RU2245584C2 (ru) 2005-01-27
KR20030059110A (ko) 2003-07-07
AU2315902A (en) 2002-04-02
ES2238053T3 (es) 2005-08-16

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