ES2077406T3 - Familia de circuitos logicos paralelos de entrada logica complementaria (clip). - Google Patents

Familia de circuitos logicos paralelos de entrada logica complementaria (clip).

Info

Publication number
ES2077406T3
ES2077406T3 ES92906350T ES92906350T ES2077406T3 ES 2077406 T3 ES2077406 T3 ES 2077406T3 ES 92906350 T ES92906350 T ES 92906350T ES 92906350 T ES92906350 T ES 92906350T ES 2077406 T3 ES2077406 T3 ES 2077406T3
Authority
ES
Spain
Prior art keywords
clip
logic
fet
fets
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES92906350T
Other languages
English (en)
Inventor
Albert W Vinal
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thunderbird Technologies Inc
Original Assignee
Thunderbird Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=24599896&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ES2077406(T3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Thunderbird Technologies Inc filed Critical Thunderbird Technologies Inc
Application granted granted Critical
Publication of ES2077406T3 publication Critical patent/ES2077406T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096Synchronous circuits, i.e. using clock signals
    • H03K19/0963Synchronous circuits, i.e. using clock signals using transistors of complementary type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356113Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

UNA FAMILIA DE CIRCUITOS LOGICOS PARALELOS DE ENTRADA LOGICA COMPLEMENTARIA (CLIP), DE BAJA CAPACITANCIA Y ALTA VELOCIDAD QUE INCLUYE UNA ETAPA DE EXCITACION POR FET (11), UN INVERSOR DE FET (14) Y POR LO MENOS UN FET DE COMPUERTA (13A-13B). LAS DIMENSIONES DEL FET DE COMPUERTA (13) SE CONTROLAN RESPECTO A LAS DIMENSIONES DE LOS FETS DE ETAPA DE EXCITACION (11A-11F) PARA OBTENER UN CIRCUITO LOGICO DE ALTA VELOCIDAD. PUEDE HABER CIRCUITOS LOGICOS CLIP AND Y OR. SE PUEDE OBTENER UN CIRCUITO LOGICO CLIP TEMPORIZADO SI SE AÑADE UN FET TEMPORIZADOR. TAMBIEN SE PUEDE OBTENER UN CIRCUITO LOGICO CLIP TEMPORIZADO INVERTIDO SI SE AÑADE UN FET INVERSOR. EN EL CIRCUITO LOGICO CLIP TEMPORIZADO, INVERTIDO, LA SALIDA DE COMPUERTA SE INVIERTE DE TAL MODO QUE NO PUEDA CAMBIAR DURANTE EL PERIODO DE RELOJ INDEPENDIENTEMENTE DE LOS CAMBIOS QUE SE PRODUZCAN EN LAS ENTRADAS LOGICAS DEL CIRCUITO. LA VELOCIDAD DE LOS CIRCUITOS LOGICOS CLIP SE PUEDE AUMENTAR AUN MAS SI SE INCLUYE GERMANIO EN EL CANAL DE SUS FETS DECANAL P PARA ASI AUMENTAR LA MOVILIDAD DE LA PORTADORA EN LOS FETS DE CANAL P. LOS FETS DE CANAL N NO TIENEN GERMANIO. LA CAPACITANCIA INTERNA DE LOS CIRCUITOS LOGICOS CLIP TAMBIEN SE PUEDE REDUCIR SI SE UTILIZAN REGIONES DE DIFUSION COMUNES EN EL CIRCUITO INTEGRADO PARA PARES DE FETS DE ETAPA DE EXCITACION. SE PUEDEN UTILIZAR REGIONES DE DIFUSION DE FUENTE COMUN Y/O DE DREN COMUN.
ES92906350T 1991-01-31 1992-01-31 Familia de circuitos logicos paralelos de entrada logica complementaria (clip). Expired - Lifetime ES2077406T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/648,219 US5247212A (en) 1991-01-31 1991-01-31 Complementary logic input parallel (clip) logic circuit family

Publications (1)

Publication Number Publication Date
ES2077406T3 true ES2077406T3 (es) 1995-11-16

Family

ID=24599896

Family Applications (1)

Application Number Title Priority Date Filing Date
ES92906350T Expired - Lifetime ES2077406T3 (es) 1991-01-31 1992-01-31 Familia de circuitos logicos paralelos de entrada logica complementaria (clip).

Country Status (12)

Country Link
US (1) US5247212A (es)
EP (1) EP0569540B1 (es)
JP (1) JP3242650B2 (es)
KR (1) KR100221565B1 (es)
AT (1) ATE127639T1 (es)
AU (1) AU1412392A (es)
CA (1) CA2101559C (es)
DE (1) DE69204659T2 (es)
DK (1) DK0569540T3 (es)
ES (1) ES2077406T3 (es)
GR (1) GR3017608T3 (es)
WO (1) WO1992014304A1 (es)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
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US5305269A (en) 1991-05-31 1994-04-19 Thunderbird Technologies, Inc. Differential latching inverter and random access memory using same
US5519344A (en) * 1994-06-30 1996-05-21 Proebsting; Robert J. Fast propagation technique in CMOS integrated circuits
US5831451A (en) * 1996-07-19 1998-11-03 Texas Instruments Incorporated Dynamic logic circuits using transistors having differing threshold voltages
US5926050A (en) * 1996-07-29 1999-07-20 Townsend And Townsend And Crew Llp Separate set/reset paths for time critical signals
US5914844A (en) * 1997-10-14 1999-06-22 Cypress Semiconductor Corp. Overvoltage-tolerant input-output buffers having a switch configured to isolate a pull up transistor from a voltage supply
US6049242A (en) * 1997-10-14 2000-04-11 Cypress Semiconductor Corp. Voltage reference source for an overvoltage-tolerant bus interface
US6496054B1 (en) 2000-05-13 2002-12-17 Cypress Semiconductor Corp. Control signal generator for an overvoltage-tolerant interface circuit on a low voltage process
US7342421B2 (en) 2003-09-24 2008-03-11 Infineon Technologies Ag CMOS circuit arrangement
KR20060090679A (ko) * 2003-09-30 2006-08-14 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 하향 변환기
US7009265B2 (en) * 2004-06-11 2006-03-07 International Business Machines Corporation Low capacitance FET for operation at subthreshold voltages
US8018268B1 (en) 2004-11-19 2011-09-13 Cypress Semiconductor Corporation Over-voltage tolerant input circuit
US7816738B2 (en) * 2005-11-30 2010-10-19 International Business Machines Corporation Low-cost FEOL for ultra-low power, near sub-vth device structures
KR100660909B1 (ko) * 2006-01-06 2006-12-26 삼성전자주식회사 반도체 소자 및 그 제조 방법
FI20160183L (fi) * 2016-07-14 2016-07-15 Artto Mikael Aurola Parannettu puolijohdekokoonpano

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US3728556A (en) * 1971-11-24 1973-04-17 United Aircraft Corp Regenerative fet converter circuitry
US3911289A (en) * 1972-08-18 1975-10-07 Matsushita Electric Ind Co Ltd MOS type semiconductor IC device
US4053792A (en) * 1974-06-27 1977-10-11 International Business Machines Corporation Low power complementary field effect transistor (cfet) logic circuit
US3967988A (en) * 1974-08-05 1976-07-06 Motorola, Inc. Diffusion guarded metal-oxide-silicon field effect transistors
JPS5759689B2 (es) * 1974-09-30 1982-12-16 Citizen Watch Co Ltd
UST952012I4 (es) * 1976-01-20 1976-11-02
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Also Published As

Publication number Publication date
EP0569540B1 (en) 1995-09-06
EP0569540A1 (en) 1993-11-18
AU1412392A (en) 1992-09-07
GR3017608T3 (en) 1996-01-31
CA2101559A1 (en) 1992-08-01
KR100221565B1 (ko) 1999-09-15
DE69204659T2 (de) 1996-04-04
JPH06505373A (ja) 1994-06-16
WO1992014304A1 (en) 1992-08-20
ATE127639T1 (de) 1995-09-15
CA2101559C (en) 2001-05-15
DK0569540T3 (da) 1995-10-16
JP3242650B2 (ja) 2001-12-25
US5247212A (en) 1993-09-21
DE69204659D1 (de) 1995-10-12

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