EP1905084A2 - Integrierte schaltung mit schutz vor elektrostatischen entladungen - Google Patents
Integrierte schaltung mit schutz vor elektrostatischen entladungenInfo
- Publication number
- EP1905084A2 EP1905084A2 EP06766003A EP06766003A EP1905084A2 EP 1905084 A2 EP1905084 A2 EP 1905084A2 EP 06766003 A EP06766003 A EP 06766003A EP 06766003 A EP06766003 A EP 06766003A EP 1905084 A2 EP1905084 A2 EP 1905084A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- supply voltage
- integrated circuit
- clamp devices
- clamp
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 230000004224 protection Effects 0.000 title abstract description 28
- 230000004913 activation Effects 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 12
- 230000003213 activating effect Effects 0.000 claims description 7
- 239000003990 capacitor Substances 0.000 claims description 5
- 230000003068 static effect Effects 0.000 abstract description 2
- 230000008901 benefit Effects 0.000 description 6
- 238000013459 approach Methods 0.000 description 5
- 101100123053 Arabidopsis thaliana GSH1 gene Proteins 0.000 description 4
- 101100298888 Arabidopsis thaliana PAD2 gene Proteins 0.000 description 4
- 101150092599 Padi2 gene Proteins 0.000 description 4
- 102100035735 Protein-arginine deiminase type-2 Human genes 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000001052 transient effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 231100001261 hazardous Toxicity 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 241001282153 Scopelogadus mizolepis Species 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000013404 process transfer Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0292—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using a specific configuration of the conducting means connecting the protective devices, e.g. ESD buses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
Definitions
- the invention relates to the field of integrated circuits, more specifically the invention is applicable within multi- voltage-domain integrated circuits.
- the invention relates to the field of electro-static discharge protection of integrated circuits.
- the invention provides electro-static discharge protection of an integrated circuit with a plurality of supply voltages and a method for electro-static discharge protecting an integrated circuit.
- each of the input-output (I/O) cells comprises a set of clamp devices associated with the first and second supply voltage domain (e.g. 3V and 20V).
- first and second clamp devices each begin adapted to clamp their respective supply voltages in case of an ESD event.
- the ESD trigger circuit it is possible for the ESD trigger circuit to activate the clamp devices associated with a specific supply voltage in all I/O cells of the IC in case an ESD event is detected.
- all clamp devices of all I/O cells can be used to contribute to clamping in
- ESD events e.g. provide a short circuit between the supply voltage with an ESD problem and electrical ground, thus shunting current protecting the sensible circuits and components connected to that voltage domain.
- first clamp devices e.g. transistors
- second clamp devices are preferably adapted to handle the second supply voltage.
- the clamp devices comprises a transistor connected to the power track, the ESD trigger circuit sending a signal via the power track upon an ESD event being detected with the purpose of opening the transistor that will then clamp the supply voltage and thus remedy the effect of the ESD event.
- the invention is advantageously applied in a device comprising an integrated circuit according to the invention.
- the device may be any electronic device that comprises an integrated circuit connected to a plurality of supply voltages, such as a power management unit, a microprocessor, a digital signal processor, an integrated circuit for automotive use etc.
- the device may generally be any wireless and/or battery powered product.
- the device may be such as an audio device, a video device, a mobile phone, an MP3 player, or a digital camera.
- Fig. 1 illustrates prior art ESD protection schemes for ICs with a pad-based and a rail-based architectures together with an example of positions of I/O cells of a power management unit.
- Fig. 2 illustrates a schematic of a preferred ESD protection part of an IC connected to two supply voltages,
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Emergency Protection Circuit Devices (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP06766003A EP1905084A2 (de) | 2005-07-08 | 2006-07-04 | Integrierte schaltung mit schutz vor elektrostatischen entladungen |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP05106282 | 2005-07-08 | ||
| PCT/IB2006/052252 WO2007007237A2 (en) | 2005-07-08 | 2006-07-04 | Integrated circuit with electro-static discharge protection |
| EP06766003A EP1905084A2 (de) | 2005-07-08 | 2006-07-04 | Integrierte schaltung mit schutz vor elektrostatischen entladungen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP1905084A2 true EP1905084A2 (de) | 2008-04-02 |
Family
ID=37452831
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP06766003A Withdrawn EP1905084A2 (de) | 2005-07-08 | 2006-07-04 | Integrierte schaltung mit schutz vor elektrostatischen entladungen |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP1905084A2 (de) |
| JP (1) | JP2009500840A (de) |
| CN (1) | CN101258597A (de) |
| WO (1) | WO2007007237A2 (de) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101389234B1 (ko) | 2007-10-30 | 2014-04-24 | 에이저 시스템즈 엘엘시 | 정전기 방전 보호 회로 |
| EP2238686A1 (de) | 2008-01-29 | 2010-10-13 | Nxp B.V. | Elektronische klemmen für integrierte schaltkreise und verfahren zu ihrer verwendung |
| DE102008001368A1 (de) * | 2008-04-24 | 2009-10-29 | Robert Bosch Gmbh | Flächenoptimierte ESD-Schutzschaltung |
| US8116047B2 (en) * | 2008-12-18 | 2012-02-14 | Sandisk Technologies Inc. | Electrostatic discharge protective circuit having rise time detector and discharge sustaining circuitry |
| FR2955699B1 (fr) * | 2010-01-26 | 2013-08-16 | St Microelectronics Rousset | Structure de protection d'un circuit integre contre des decharges electrostatiques |
| CN102457053A (zh) * | 2010-10-18 | 2012-05-16 | 联咏科技股份有限公司 | 用于一多电压系统的静电放电保护装置 |
| US8705282B2 (en) | 2011-11-01 | 2014-04-22 | Silicon Storage Technology, Inc. | Mixed voltage non-volatile memory integrated circuit with power saving |
| US8643988B1 (en) * | 2012-09-25 | 2014-02-04 | Hong Kong Applied Science & Technology Research Institute Company Ltd. | ESD power clamp using a low-voltage transistor to clamp a high-voltage supply in a mixed-voltage chip |
| JP6266444B2 (ja) * | 2014-06-20 | 2018-01-24 | ザインエレクトロニクス株式会社 | 半導体装置 |
| CN105656017B (zh) * | 2014-11-13 | 2018-05-22 | 旺宏电子股份有限公司 | 适用于集成电路的保护电路与输入电路 |
| CN105977938B (zh) * | 2016-06-17 | 2018-09-25 | 中国电子科技集团公司第二十四研究所 | 芯片esd保护电路 |
| CN106533419B (zh) * | 2016-10-12 | 2022-11-01 | 格科微电子（上海）有限公司 | Esd保护电路以及mipi接口的时钟通路 |
| CN110138375B (zh) * | 2018-02-02 | 2021-08-27 | 华为技术有限公司 | 一种用于芯片管脚的电路 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5946177A (en) * | 1998-08-17 | 1999-08-31 | Motorola, Inc. | Circuit for electrostatic discharge protection |
| US20030076636A1 (en) * | 2001-10-23 | 2003-04-24 | Ming-Dou Ker | On-chip ESD protection circuit with a substrate-triggered SCR device |
| JP3908669B2 (ja) * | 2003-01-20 | 2007-04-25 | 株式会社東芝 | 静電気放電保護回路装置 |
| US6970336B2 (en) * | 2003-10-10 | 2005-11-29 | Freescale Semiconductor, Inc. | Electrostatic discharge protection circuit and method of operation |
| DE102004004789B3 (de) * | 2004-01-30 | 2005-03-03 | Infineon Technologies Ag | ESD-Schutzschaltkreis für eine elektronische Schaltung mit mehreren Versorgungsspannungen |
-
2006
- 2006-07-04 JP JP2008520044A patent/JP2009500840A/ja not_active Withdrawn
- 2006-07-04 CN CNA2006800327233A patent/CN101258597A/zh active Pending
- 2006-07-04 WO PCT/IB2006/052252 patent/WO2007007237A2/en active Application Filing
- 2006-07-04 EP EP06766003A patent/EP1905084A2/de not_active Withdrawn
Non-Patent Citations (1)
| Title |
|---|
| See references of WO2007007237A3 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101258597A (zh) | 2008-09-03 |
| WO2007007237A2 (en) | 2007-01-18 |
| WO2007007237A3 (en) | 2007-03-29 |
| JP2009500840A (ja) | 2009-01-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
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| 17P | Request for examination filed |
Effective date: 20080208 |
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| AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR |
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| DAX | Request for extension of the european patent (deleted) | ||
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION HAS BEEN WITHDRAWN |
|
| 18W | Application withdrawn |
Effective date: 20090930 |