Classifications

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Definitions

• the invention relates to an arrangement with at least one electrical component that has at least one electrical contact surface, at least one electrical connecting line for electrically contacting the contact surface of the component and at least one electrical insulation layer arranged on the component with at least one opening that is continuous in the thickness direction of the insulation layer the contact area of the component
• the insulation layer 15 is arranged opposite one another, the insulation layer having a side surface delimiting the opening and the electrical connecting line having at least one metallization layer arranged on the side surface.
• the electrical connecting line having at least one metallization layer arranged on the side surface.
• the component is a power semiconductor component based on
• the substrate is, for example, a DCB (Direct Copper Bonding) substrate, which consists of a carrier layer made of a ceramic, to which electrically conductive layers of copper are applied on both sides.
• the power semiconductor component DCB (Direct Copper Bonding) substrate
• An insulation film based on polyimide or epoxy is laminated onto the arrangement of the power semiconductor component and the substrate under vacuum, so that the Insulation film is closely connected to the power semiconductor component and the substrate.
• the insulation film is positively and non-positively connected to the power semiconductor component and the substrate.
• a surface contour (topography), which is given by the power semiconductor component and the substrate, is imaged in a surface contour of the insulation film facing away from the power semiconductor component.
• an opening is created in the insulation film.
• the opening is created by laser ablation.
• the contact area of the power semiconductor component is exposed.
• a metallization layer is subsequently applied to the contact surface and to the insulation film.
• a relatively thick layer of copper is deposited on the metallization layer in order to ensure the necessary current-carrying capacity of the connecting line produced in this way.
• The. Copper is deposited galvanically.
• a layer thickness of the layer of copper can be several hundred ⁇ m.
• the power semiconductor component essentially consists of silicon.
• a coefficient of thermal expansion of copper differs significantly from the thermal
• the object of the present invention is therefore to provide an arrangement of an electrical component and an electrical connecting line, in which the component and the connecting line consist of materials with very different coefficients of thermal expansion and in which the contacting of the contact surface of the component is ensured despite the high thermal stress on the arrangement ,
• the arrangement is characterized in that the metallization layer is oriented obliquely to the contact surface. The metallization layer is applied both on the contact surface of the component and on the side surface of the insulation layer.
• a method for producing the arrangement is also specified with the following method steps: a) providing a component with an electrical contact surface, b) producing an insulation layer with a through opening on the component so that the contact surface of the component is freely accessible, and c) arranging the metallization layer of the connecting line on a side surface of the insulation layer delimiting the opening such that the metallization layer is oriented obliquely to the contact surface.
• the component is arranged on a substrate such that the contact surface of the component is freely accessible.
• the substrate is any circuit carrier on an organic or inorganic basis.
• Such circuit carriers or substrates are, for example, PCB (Printed Circuit Board), DCB, IM (Insolated Metal), HTCC (High Temperature Cofired Ceramics) and LTCC (Low Temperature Cofired Ceramics) substrates.
• the connecting line consists, for example, of two sections firmly connected to one another.
• a first section is formed by the metallization layer, which is arranged, for example, on a bevelled side surface of the opening and on the contact surface of the component.
• a second section of the connecting line is formed by a metallization applied to the insulation layer.
• the alignment of the metallization layer, which is arranged on the side surface mechanically decouples the second section of the connecting line and the component.
• the second section of the connecting line and the component made of materials with different coefficients of thermal expansion can be processed.
• the second section of the connecting line has a thick layer of copper.
• the component is, for example, a semiconductor component made of silicon.
• the metallization layer is aligned at an angle to the contact surface which is selected from the range from 30 ° to 80 ° inclusive.
• the angle is preferably selected from the range from 50 ° to 70 ° inclusive.
• the metallization layer would be aligned perpendicular to the contact area.
• the layer thickness of the metallization layer is selected so that there is an efficient strain relief. It is particularly advantageous if the layer thickness of the metallization layer is selected from the range from 0.5 ⁇ m to 30 ⁇ m inclusive. In particular, the layer thickness is selected from the range from 2.0 ⁇ m up to and including 20 ⁇ m. A region of the metallization layer that is not oriented obliquely to the contact surface preferably has significantly larger layer thicknesses. These are thicker layers for example, to provide a current carrying capacity necessary for the operation of the component.
• the metallization layer can consist of a single layer. There is a single-layer metallization layer.
• the metallization layer has a multilayer structure with at least two partial metallization layers arranged one above the other. Each of the partial metallization layers is associated with different functions.
• a first partial metallization layer leads, for example, to very good adhesion to the contact surface of the component.
• This partial metallization layer acts as an adhesion promoting layer.
• An adhesion-promoting layer made of titanium has proven itself in a semiconductor component. Other suitable materials for the adhesion-promoting layer are, for example, chromium, vanadium or zirconium.
• a second partial metallization layer arranged above the adhesion-promoting layer functions, for example, as a diffusion barrier.
• Such a partial metallization layer consists, for example, of a titanium-tungsten alloy.
• a third partial metallization layer consists, for example, of copper electrodeposited on the second partial metallization layer.
• the partial metallization layer made of copper ensures the necessary current carrying capacity. The result is a metallization layer with the layer sequence Ti / TiW / Cu.
• the side surface of the opening is, for example
• Insulation layer beveled.
• an (average) surface normal of the side surface and the (average) surface normal of the contact surface take an angle which is selected from the range from 30 ° to 80 ° inclusive.
• Metallization layer is arranged, at least one step.
• the step results in a direction of propagation of the metallization layer at an angle to the contact surface of the component. Several stages are advantageously present.
• the step or steps result in an efficient strain relief.
• the individual stages are generated, for example, by a multilayer insulation layer.
• the insulation layer therefore has a multilayer structure with at least two partial insulation layers arranged one above the other. Individual or all partial insulation layers can additionally be beveled towards the opening.
• the insulation layer or the partial insulation layers are chamfered, for example, by removing material by means of laser ablation. The material can also be removed by wet or dry chemical means. For example, insulation material of the partial insulation layers is etched away by attack by a reactive substance. Since an etching rate is generally increased at exposed points, for example an edge, the partial insulation layers are flattened or chamfered automatically at these edges.
• a layer thickness of the insulation layer is selected from the range from 20 ⁇ m to 500 ⁇ m inclusive.
• the layer thickness of the insulation layer is preferably selected from the range from 50 ⁇ m up to and including 200 ⁇ m. If the metallization layer is very thin (e.g. 5 ⁇ m to 10 ⁇ m), an insulation layer with the significantly larger layer thicknesses can act as an efficient abutment. The insulation layer is not pushed away during thermal expansion of the metallization layer.
• an electrically insulating lacquer is applied in a corresponding thickness. The varnish is applied to the component in a printing process. After the lacquer has hardened and / or dried, the opening is created in the resulting insulation layer. In particular, a photolithographic process is carried out. A photosensitive lacquer is preferably used for this.
• the following method steps are carried out to produce the insulation layer on the component: d) laminating at least one insulation film on the component and e) producing the opening in the insulation film, so that the contact surface of the component is exposed.
• the insulation layer is formed by at least one insulation film laminated onto the component. At least part of the insulation film is laminated onto the component in such a way that a surface contour of the component is in one
• the surface contour of a part of the insulation film is shown, which faces away from the component.
• the surface contour does not concern a roughness or waviness of the surface of the component.
• the surface contour results, for example, from an edge of the component.
• the surface contour shown is specified not only by the component alone, but also by the substrate on which the component is arranged.
• the insulation film is laminated on under vacuum. Laminating under vacuum creates a particularly firm and intimate contact between the insulation film and the component.
• An insulation film used has an electrically insulating plastic. Any thermosetting (thermosetting) and / or thermoplastic plastic is conceivable as plastic.
• the insulation film has at least one plastic selected from the group consisting of polyacrylate, polyimide, polyisocyanate, polyethylene, polyphenol, polyether ether ketone, polytetrafluoroethylene and / or epoxy. Mixtures of the plastics and / or copolymers from monomers of the plastics are also conceivable. So-called Liquid Cristal Polymers can be used as well as organically modified ceramics.
• the insulation film is laminated on in such a way that the opening over the contact surface of the
• Openings in the insulation films are only created after lamination.
• the opening in the insulation foils is created by removing material. This can be done photolithographically.
• the opening in the insulation film is produced by laser ablation. Material is removed using a laser. For example, a C0 2 laser with a wavelength of 9.24 ⁇ m is used for laser ablation. The use of a UV laser is also conceivable.
• a vapor deposition process is preferably carried out to arrange the metallization layer.
• Vapor deposition is, for example, a physical vapor deposition (PVD) process. Such a vapor deposition process can also be used to produce the insulation layer.
• the PVD process is sputtering, for example.
• a chemical Vapor deposition (chemical vapor deposition, CVD) is also conceivable.
• CVD chemical vapor deposition
• a metallization layer with a sufficient layer thickness can be produced with the aid of a vapor deposition process.
• the vapor deposition process advantageously also produces a metallization layer on the insulation layer or the insulation film, which is the starting point for the galvanic deposition of further electrode material, for example.
• a metal selected from the group consisting of aluminum, gold, copper, molybdenum, silver, titanium and / or tungsten is preferably used for the metallization layer and / or the electrodeposition.
• Silver is particularly suitable because it has a high electrical conductivity and at the same time is relatively soft (lower modulus of elasticity than copper). This creates lower mechanical stresses when subjected to thermal loads.
• a portion of the connecting line is generated, which has a greater thickness than the layer thickness of the metallization layer.
• a thin metallization layer is not only produced on the side surface of the insulation layer towards the opening of the insulation layer, but also on the surface of the insulation layer.
• a metal is galvanically deposited from the insulation layer.
• the section of the connecting line with the greater layer thickness is formed.
• the metal is deposited with a layer thickness of up to 500 ⁇ m.
• the metal is, for example, aluminum or copper.
• the opening of the insulation layer is preferably closed during the deposition of the metal.
• a photolithographic process is carried out to close the opening. Closing the opening ensures that the metal is only deposited at those points on the connecting line that are not covered.
• the arrangement can have any component.
• the component is, for example, a passive electrical component.
• the component is a semiconductor component.
• the semiconductor component is preferably a power semiconductor component.
• the power semiconductor component is selected in particular from the group diode, MOSFET, IGBT, tyristor and / or bipolar transistor. Such power semiconductor components are suitable for controlling and / or switching high currents (a few hundred A).
• the power semiconductor components mentioned are controllable.
• the power semiconductor components each have at least one input, one output and one control contact.
• the input contact is usually referred to as the emitter
• the output contact as the collector
• the control contact as the base.
• these contacts are referred to as source, drain and gate.
• the insulation layer has a multiplicity of openings which form a row or a matrix. A large-area contacting of the contact area is made via the plurality of openings with at least one each
• Metallization layer reached. This ensures that the power semiconductor component is supplied with sufficient current despite the thin metallization layers. In addition, it is ensured that the current is evenly distributed over the contact area. During operation of the power semiconductor component, there is no disruptive lateral current gradient in the region of the contact.
• the base area is, for example, oval, rectangular or circular. In the case of an opening arranged in a row, openings with a stri-shaped base are appropriate.
• the metallization layers are preferably along one
• the configuration of the connecting line with the preferably thin, metallization layer arranged obliquely to the contact surface of the component ensures that a section of the connecting line that is attached to the insulation layer and that Component are largely mechanically decoupled from each other.
• the mechanical decoupling significantly reduces the probability of the arrangement failing due to thermally induced mechanical stresses. This also applies in particular in the event that the connecting line and the component consist of different materials with different expansion coefficients.
• the arrangement for the electrical contacting of power semiconductor components in which a relatively strong heat development occurs during operation is particularly advantageous.
• FIG. 1 shows an arrangement of an electrical component, a connecting line of the component and an insulation layer on a substrate in a lateral cross section.
• FIG. 2 shows a section of the arrangement from FIG. 1.
• FIGS 3 to 5 show different embodiments of the arrangement.
• FIG. 6 shows a section of an insulation layer with a matrix of a plurality of openings from above.
• FIG. 7 shows a section of an insulation layer with a row of a plurality of strip-shaped openings from above.
• FIG. 8 shows a method for producing the arrangement.
• the arrangement 1 has an electrical component 2 on a substrate 5 (FIG. 1).
• the substrate 5 is a DCB substrate with a carrier layer 50 and an electrically conductive layer 51 made of copper applied to the carrier layer 50.
• the carrier layer 50 consists of a ceramic.
• the electrical component 2 is a
• Power semiconductor component in the form of a MOSFET is soldered onto the electrically conductive layer 51 such that an electrical contact surface 20 of the power semiconductor component 2 faces away from the substrate 5.
• One of the contacts of the power semiconductor component 3 (source, gate, drain) is electrically contacted via the contact surface 20.
• An insulation layer 4 in the form of an insulation film is applied to the power semiconductor component 2 and to the substrate 5.
• the insulation film 4 is applied in such a way that a surface contour 25, which results from the power semiconductor component 2, the electrically conductive layer 51 and the carrier layer 50 of the DCB substrate, is imaged in a surface contour 47 of part of the insulation film 4.
• the insulation film follows the topology of the power semiconductor component 4 and the substrate 5. A height difference of over 500 ⁇ m is overcome.
• the insulation film 4 has one along the thickness direction
• This opening 42 is arranged opposite the electrical contact surface 20 of the power semiconductor component 2.
• the side surface 43 of the insulation layer which delimits the opening 42 of the insulation layer, is chamfered.
• the side surface 43 is arranged obliquely to the contact surface 20.
• a metallization layer 30 is applied to the side surface 43.
• a layer thickness 32 of the metallization layer 30 is approximately 5 ⁇ m. Due to the inclined side surface 43 of the insulation film 4, the metallization layer 30 is also inclined to the contact surface 20 of the
• An angle 23 with which the metallization layer 30 is aligned with the contact surface 20 is approximately 50 °.
• the metallization layer 30 is distinguished by a multilayer structure (FIG. 3).
• the metallization layer 30 consists of individual partial metallization layers 33 arranged one above the other.
• a total layer thickness 30 is likewise 5 ⁇ m. The lower one
• Partial metallization layer which is connected directly to the contact surface 20 of the power semiconductor component, consists of titanium and functions as an adhesion-promoting layer.
• the partial metallization layer arranged above consists of a titanium-tungsten alloy.
• a section 34 of the connecting line 3 is applied, which has a greater thickness 35 than a layer thickness 32 of the metallization layer 30 in the opening 42 of the insulating film 4.
• the thickness 35 of the connecting line 3 in section 34 is approximately 500 ⁇ m ,
• This section is formed by a galvanic deposition 36 made of copper.
• the power semiconductor component 2 consists of silicon.
• the section 34 of the connecting line 3 on the insulation film 4 is formed from copper. Very high currents flow during operation of the power semiconductor component 2. Due to the power loss of the power semiconductor component 2, the entire arrangement 1 heats up relatively strongly, since silicon and copper have very different thermal effects Having expansion coefficients, relatively high mechanical stresses occur within the arrangement 1 during operation. A relatively high tensile stress occurs in the thickness direction of the electrodeposited layer 36 made of copper.
• the chosen special arrangement of the connecting line 3 with the thin metallization layer 30 in the opening 42 of the insulating film 4 ensures that the thermally induced expansion of the section 34 of the connecting line 3 and the thermal expansion of the insulating layer 4 are almost decoupled from the thermally induced expansion of the Semiconductor component 2.
• the section 34 of the connecting line and the power semiconductor component 2 are essentially mechanically decoupled from one another.
• the obliquely arranged metallization layer 30 in the opening leads to a strain relief of the arrangement 1. This results in an increased reliability of the arrangement 1. Via the metallization layer 30, the power semiconductor component 2 remains in electrical contact despite the high thermal load.
• the insulation film 4 has a plurality of partial insulation films 45 (FIG. 4).
• the insulation film 4 consists of a plurality of partial insulation films 45 arranged one above the other
• Partial insulation films 45 arranged such that a step 44 results in the opening 42.
• the metallization layer 30 is arranged over this step 44.
• each of the partial insulation foils is additionally
• the plurality of openings 42 forms a row 49 ( Figure 7).
• Each of the Openings 42 has a strip-shaped base.
• each of the openings 42 has a square base.
• the plurality of openings 42 is distributed in the form of a matrix 48 over the insulation film 4 (FIG. 6).
• Each of the openings 42 is arranged in such a way that the contact surface 20 is electrically contacted through the opening 42 with the aid of a metallization layer 30. This arrangement 1, on the one hand, ensures a necessary current carrying capacity. In addition, it is ensured that the contact surface 20 of the
• Power semiconductor device is evenly powered.
• a relatively thick copper layer is applied. This copper layer is arranged, for example, in the middle of the opening 42.
• the power semiconductor component 2 is soldered onto a DCB substrate 5.
• the insulation film 4 is then laminated on (FIG. 8, reference number 80).
• the lamination is carried out under vacuum. This creates a firm and intimate contact between the insulation film 4 and the power semiconductor component 2 or the substrate 5.
• the surface contour 25, which is predetermined by the power semiconductor component 2 and the substrate 5, is imaged in the surface contour 47 of the insulation film 4 by the lamination.
• Power semiconductor component 2 facing away from the insulation film 4 shows essentially the same surface contour as the power semiconductor component 2 and the substrate 5.
• the opening 42 for contacting the contact surface 20 of the power semiconductor component 2 is created in the insulation film 4.
• a window 42 is opened.
• the window 42 is opened by material removal by means of
• a C0 2 laser with a wavelength of 9.24 ⁇ m is used.
• the material removal takes place in such a way that a side surface 43 resulting at an angle to the contact surface 20 of the power semiconductor component 2 and delimiting the opening 42 results.
• a cleaning step is carried out in order to remove residues of the material removal.
• a metallization layer 30 is formed on the contact surface 20 of the
• Insulation film 4 applied ( Figure 8, reference numeral 82).
• the application is carried out by a vapor deposition process.
• the method is optionally carried out several times to include a metallization layer
• the opening 42 is covered by a photolithography step (FIG. 8, reference numeral 82). This results in a sealing 37 of the connecting line 3 or of the metallization layer 30 in the opening 42. Then copper is electrodeposited to produce the connecting line 3 in the unsealed area. This results in section 34 of connecting line 3 with a thick copper layer. A layer thickness 35 of the copper layer 36 is 400 ⁇ m.
• galvanic deposition is first performed on both
• Metallization layer 30 performed in the opening 42 and on the metallization layer outside the opening 42.
• the galvanic deposition is interrupted.
• the opening 42 is closed in a photolithography step.
• copper is deposited in a corresponding thickness in the area outside the opening 42.
• the result is a metallization layer 30 with a further partial metallization layer 33 made of copper.
• the procedure for providing the power semiconductor component 2 with a metallization layer 30 on the contact surface 20 is as follows: the insulation film 4 is laminated onto a wafer which is subdivided into a multiplicity of power semiconductor components 2. Furthermore, the contact areas 20 of the power semiconductor component 2 are exposed. Below is a metallization of the
• a metallization layer 30 is deposited in the openings 42 of the insulation film and on the insulation film 4. The separation is structured.
• the electrical connecting lines are produced directly on the wafer, as described above.
• the separation into individual modules takes place only after the production of the electrical connecting lines.
• the wafer is divided into individual
• the individual power semiconductor components 2 are further processed as described above. For this purpose, for example, one of the power semiconductor components 2 is soldered onto a substrate. A further insulation film is then laminated onto the power semiconductor component 2 and the substrate 5. Openings are created at the appropriate points in this further insulation film. Electrically conductive material is introduced into these openings.

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