EP1623357A2 - Agencement de circuit analogique pour l'obtention de fonctions elliptiques - Google Patents

Agencement de circuit analogique pour l'obtention de fonctions elliptiques

Info

Publication number
EP1623357A2
EP1623357A2 EP04709200A EP04709200A EP1623357A2 EP 1623357 A2 EP1623357 A2 EP 1623357A2 EP 04709200 A EP04709200 A EP 04709200A EP 04709200 A EP04709200 A EP 04709200A EP 1623357 A2 EP1623357 A2 EP 1623357A2
Authority
EP
European Patent Office
Prior art keywords
analog
input
output
arithmetic
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP04709200A
Other languages
German (de)
English (en)
Inventor
Klaus University of Illinois HUBER
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Deutsche Telekom AG
Original Assignee
Deutsche Telekom AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche Telekom AG filed Critical Deutsche Telekom AG
Publication of EP1623357A2 publication Critical patent/EP1623357A2/fr
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/24—Arrangements for performing computing operations, e.g. operational amplifiers for evaluating logarithmic or exponential functions, e.g. hyperbolic functions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/32—Arrangements for performing computing operations, e.g. operational amplifiers for solving of equations or inequations; for matrices
    • G06G7/34—Arrangements for performing computing operations, e.g. operational amplifiers for solving of equations or inequations; for matrices of simultaneous equations

Definitions

  • the invention relates to an analog circuit arrangement with a plurality of analog arithmetic circuits for generating elliptical functions.
  • the function sn (x, k) is similar in its course to the sine function, while the function cn (x, k) is similar to the cosine function.
  • the functions sn (x, 0) and cn (x, 0) merge into the sine and cosine functions.
  • the value of k is mostly in the interval [0, 1].
  • elliptical functions play a role, for example, when designing Cauer filters. Because essential parameters of the Cauer filter are connected by elliptical functions. A method and an arrangement for setting an analog filter with the aid of elliptical functions is described in German patent application 102 49 050.3. Elliptical functions are also used in the two-dimensional representation, interpolation or compression of data which are described in German patent application 102 48 543.7.
  • the object of the invention is to provide analog circuit arrangements which can electrically simulate elliptical functions.
  • the above technical problem is solved by the features of claim 1.
  • an analog circuit arrangement has several analog computing circuits, such as analog multipliers, adders, integrators, differential amplifiers and dividers, which generate at least one output signal, the curve shape of which corresponds at least in sections to an elliptical function or is approximated.
  • analog computing circuits such as analog multipliers, adders, integrators, differential amplifiers and dividers, which generate at least one output signal, the curve shape of which corresponds at least in sections to an elliptical function or is approximated.
  • Elliptical functions are preferably simulated electrically with the Jacobi analog circuitry.
  • Circuitry includes analog multipliers and
  • Integrators that are able to deliver three output signals, the waveforms of which at least in sections
  • Can produce a connection has a first multiplier, at whose one input an input signal with the size x, preferably a triangular input signal, and at whose other input the factor (lk 2 ) / 2 is applied. Furthermore, a second multiplier is provided, at one input of which the triangular input signal and at the other input of which the factor (1 + k 2 ) / 2 is applied. A differential amplifier is connected to the output of the second multiplier, a further input of the differential amplifier being connected to ground. Furthermore, an adder is provided which is connected to the output of the first multiplier and the output of the differential amplifier. At the output of the adder there is an output signal U a which is linked to the input signal by the Jacobi elliptic function sn (U e ).
  • Control or influence the value k of an elliptical function is, for example, the voltage-controlled change in the frequency f, the oscillation period T or the module k. For this purpose it is necessary to select the value of the frequency f and the value of ⁇ in a targeted manner.
  • the quantities ⁇ and ⁇ are related as follows:
  • At least one analog computing circuit is provided, at the first input of which
  • M (l, -jl - k 2 ) corresponds to 1 and I- k 2 .
  • An alternative analog circuit arrangement for generating the arithmetic-geometric mean M (l, y / l - k 2 ) has an analog arithmetic circuit for calculating the minimum from two input signals, an analog arithmetic circuit for calculating the maximum from two input signals, an analog arithmetic circuit for calculating the arithmetic mean from two input signals and one
  • Analog arithmetic circuit for calculating the geometric mean from two input signals.
  • the output of the analog arithmetic circuit for calculating the minimum has an input of the analog arithmetic circuit for calculating the arithmetic mean and an input of the
  • Analog arithmetic circuit connected to calculate the geometric mean.
  • the output of the analog arithmetic circuit for calculating the maximum is with another input of the analog arithmetic circuit for calculating the arithmetic
  • An input of the analog computing circuit for calculating the minimum is connected to the output of the analog computing circuit for computing the arithmetic mean, the value 1 being applied to the other input.
  • An input of the analog arithmetic circuit for calculating the maximum is connected to the output of the analog arithmetic circuit for calculating the geometric mean, the value VI - & 2 being present at the other input. Accordingly, at the exit of the analog computing circuit for calculating the geometric mean.
  • Analog arithmetic circuit for calculating the geometric mean and at the output of the analog arithmetic circuit for calculating the arithmetic mean the arithmetic-geometric mean M
  • a device in particular a divider, is provided, at the inputs of which the arithmetic-geometric mean
  • 1 shows an analog circuit arrangement for generating three output signals, each of which corresponds to a Jacobian elliptical time function
  • Fig. 2 shows an analog circuit arrangement for generating an output signal which the Jacobi
  • FIG. 3 shows an analog circuit arrangement for generating an output signal which is linked to a triangular input signal by the Jacobi elliptical time function sn (U e ),
  • FIG. 4 shows an analog circuit arrangement consisting of two
  • Fig. 5 shows an alternative analog circuit arrangement for
  • analog circuit arrangements are considered that generate at least one output signal, the curve shape of which corresponds to or is approximated to a Jacobi elliptical time function.
  • Jacobi elliptic functions sn (x, k), cn (x, k) and dn (x, k) are used below.
  • Fig. 1 shows an analog circuit arrangement which generates three output signals, the curves of which correspond to the Jacobi elliptical functions.
  • a multiplier 10 multiplies the output signal of the multiplier 10 by a factor of 2 ⁇ / 1.
  • the multiplier 50 multiplies that
  • the multiplier 80 multiplies the output signal of the o 2 ⁇ t multiplier 70 by the factor -k -.
  • the output signal of the integrator 30 is fed back to the multiplier 40 and to the input of the multiplier 70.
  • the output signal of the integrator 60 is fed back to the input of the multiplier 10 and to the input of the multiplier 70.
  • the output of the integrator 90 is fed back to the input of the multiplier 40 and to the input of the multiplier 10.
  • Integrator 90 the Jacobi elliptic function dn (2 ft).
  • Multipliers 20 and 50 and the multiplication with can also take place in the integrators 30, 60 and 90 in the multiplier 80.
  • the multiplication by k 2 can also be applied to the output of the integrator 90.
  • all three Jacobi elliptical time functions sn (2 ft), cn (2 ⁇ ft) and dn (2 ⁇ ft) can be implemented simultaneously.
  • the derivatives of the Jacobi elliptical time functions sn, cn and dn are obtained at the output of the multipliers 10, 40 and 70.
  • the analog circuit arrangement has a multiplier 100, the output of which is connected to a downstream multiplier 110. At the entrance of the multiplier 100, the output of which is connected to a downstream multiplier 110.
  • Multiplier 110 also has the factor -2k 2 applied.
  • the output of multiplier 110 is connected to an input of an adder 120.
  • the factor 1 + k 2 is present at a second input of the adder 120.
  • the output of adder 120 is connected to the input of a multiplier 130. To another input of multiplier 130
  • the exit of the Multiplier 130 is connected to an input of a multiplier 140.
  • the output of multiplier 140 is connected to an input of an integrator 150.
  • the output of the integrator 150 is connected to the input of an integrator 160. The exit of the
  • Integrator 160 is coupled back to the input of multiplier 140 and to two inputs of multiplier 100. In this way, an output signal appears at the output of the integrator 160, the curve profile of which
  • the analog circuit arrangement shown in FIG. 3 comprises a differential amplifier 170, a multiplier 180, a multiplier 190 and an adder 200.
  • a differential amplifier 170 For example, an input signal with a triangular voltage curve is applied to each input of the multipliers 180 and 190.
  • the factor (lk) / 2 is also applied to the multiplier 180, whereas the factor (l + k 2 ) / 2 is applied to the multiplier 190.
  • the output signal of the multiplier 190 is fed to the differential amplifier 170.
  • the second input of the differential amplifier is grounded. The exit of the
  • Multiplier 180 and the output of differential amplifier 170 are connected to the inputs of adder 200. Due to the fact that the
  • Differential amplification circuit 170 shows a relationship between the input signal U e and the output signal U a according to the equation
  • the circuit arrangement shown in FIG. 1 can be followed by a division device (not shown).
  • a division device (not shown).
  • the output signals of the integrators 30 and 60 can be added to the division device.
  • the arithmetic-geometric mean M (1, VI- & 2 ) can first be implemented, for example, with an analog circuit arrangement which is shown in FIG. 4.
  • the circuit arrangement shown in FIG. 4 consists of a plurality of analog arithmetic circuits 210, 220, 230 designated AG and an arithmetic arithmetic circuit 240 for calculating the arithmetic mean of two input signals.
  • the analog computing circuits 210 to 230 are designed such that they generate the arithmetic mean of the two input signals at one output and the geometric mean of the two input signals at the other output. As shown in FIG.
  • the factor 1 is applied to the first input of the analog computing circuit 210 and the factor VI- & 2 is applied to its other input.
  • the output signal of the analog circuit device 240 corresponds approximately to the arithmetic-geometric mean M of the factors 1 and applied to the inputs of the analog computing circuit 210 5 shows an alternative analog circuit arrangement for calculating the arithmetic-geometric mean M of the two factors 1 and VI-k 2 .
  • the circuit arrangement shown in FIG. 5 has an analog arithmetic circuit 250 for calculating the minimum of two input signals, one
  • Analog arithmetic circuit 260 for calculating the maximum from two input signals, an analog arithmetic circuit 270 for calculating the arithmetic mean of two input signals and an analog arithmetic circuit 280 for calculating a geometric mean from two input signals.
  • the factor 1 is applied to an input of the analog computing circuit 250, whereas the input is applied to an input of the analog computing circuit 260
  • Analog computing circuit 270 and the analog computing circuit 280 connected.
  • the output of the analog computing circuit 260 for calculating the maximum of two input signals is connected to an input of the analog computing circuit 270 and an input of the analog computing circuit 280.
  • the output of the analog computing circuit 270 is connected to an input of the analog computing circuit 250, whereas the output of the analog computing circuit 280 is connected to an input of the analog computing circuit 260.
  • the outputs of the analog computing circuit 270 and 280 each provide the arithmetic-geometric mean M of 1 and VI- 2 .
  • multipliers 20, 50 and 80 of the circuit arrangement according to FIG. 1 can be supplied with specifically changed values for ⁇ , as a result of which the frequency behavior of the output functions can be influenced in a targeted manner.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Mathematical Analysis (AREA)
  • Algebra (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Complex Calculations (AREA)
  • Feedback Control In General (AREA)
  • Analogue/Digital Conversion (AREA)
  • Amplifiers (AREA)
  • Image Generation (AREA)

Abstract

L'invention concerne des agencements de circuits analogiques pour la production de signaux de sortie, dont l'allure des courbes correspond, au moins dans certaines portions, à une fonction elliptique, ou s'en rapproche. A cet effet, de préférence, des modules standards analogiques, tels que des additionneurs, des intégrateurs, des multiplicateurs et des amplificateurs différentiels, sont interconnectés de manière à reproduire, en relation avec une technique de circuit, des fonctions temporelles elliptiques.
EP04709200A 2003-05-02 2004-02-09 Agencement de circuit analogique pour l'obtention de fonctions elliptiques Ceased EP1623357A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10319637A DE10319637A1 (de) 2003-05-02 2003-05-02 Analoge Schaltungsanordnung zur Erzeugung elliptischer Funktionen
PCT/DE2004/000223 WO2004097713A2 (fr) 2003-05-02 2004-02-09 Agencement de circuit analogique pour l'obtention de fonctions elliptiques

Publications (1)

Publication Number Publication Date
EP1623357A2 true EP1623357A2 (fr) 2006-02-08

Family

ID=33394046

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04709200A Ceased EP1623357A2 (fr) 2003-05-02 2004-02-09 Agencement de circuit analogique pour l'obtention de fonctions elliptiques

Country Status (6)

Country Link
US (1) US7584238B2 (fr)
EP (1) EP1623357A2 (fr)
JP (1) JP4365407B2 (fr)
KR (1) KR20060119702A (fr)
DE (1) DE10319637A1 (fr)
WO (1) WO2004097713A2 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9325333B2 (en) * 2013-03-15 2016-04-26 The Regents Of The University Of California Fast frequency estimator

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2214689A1 (de) 1972-03-25 1973-09-27 Ver Flugtechnische Werke Schaltungsanordnung zur bildung eines ausgangssignals aus mehreren einzelsignalen
US3821949A (en) * 1972-04-10 1974-07-02 Menninger Foundation Bio-feedback apparatus
US3900823A (en) * 1973-03-28 1975-08-19 Nathan O Sokal Amplifying and processing apparatus for modulated carrier signals
DE68912363T2 (de) 1988-02-29 1994-07-28 Philips Nv Logarithmischer Verstärker.
US5121009A (en) * 1990-06-15 1992-06-09 Novatel Communications Ltd. Linear phase low pass filter
DE10248543A1 (de) 2002-10-14 2004-04-22 Deutsche Telekom Ag Verfahren zur zweidimensionalen Darstellung, Interpolation und zur Kompression von Daten
DE10249050A1 (de) 2002-10-22 2004-05-06 Huber, Klaus, Dr. Verfahren und Anordnung zum Einstellen eines analogen Filters

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2004097713A2 *

Also Published As

Publication number Publication date
WO2004097713A3 (fr) 2005-05-26
JP2007524140A (ja) 2007-08-23
KR20060119702A (ko) 2006-11-24
US7584238B2 (en) 2009-09-01
DE10319637A1 (de) 2004-12-02
JP4365407B2 (ja) 2009-11-18
US20070244945A1 (en) 2007-10-18
WO2004097713A2 (fr) 2004-11-11

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