EP1347436B1 - OLED display device and driving method thereof - Google Patents

OLED display device and driving method thereof Download PDF

Info

Publication number
EP1347436B1
EP1347436B1 EP03006113A EP03006113A EP1347436B1 EP 1347436 B1 EP1347436 B1 EP 1347436B1 EP 03006113 A EP03006113 A EP 03006113A EP 03006113 A EP03006113 A EP 03006113A EP 1347436 B1 EP1347436 B1 EP 1347436B1
Authority
EP
European Patent Office
Prior art keywords
data
precharge
voltages
data lines
switching elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP03006113A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP1347436A2 (en
EP1347436A3 (en
Inventor
Dong-Yong Shin
Oh-Kyong Kwon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Display Co Ltd
Original Assignee
Samsung Mobile Display Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Mobile Display Co Ltd filed Critical Samsung Mobile Display Co Ltd
Publication of EP1347436A2 publication Critical patent/EP1347436A2/en
Publication of EP1347436A3 publication Critical patent/EP1347436A3/en
Application granted granted Critical
Publication of EP1347436B1 publication Critical patent/EP1347436B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Definitions

  • the present invention relates to a display and a driving method thereof, and more particularly to an organic electroluminescence (hereinafter, "EL") display of an active matrix driving method.
  • EL organic electroluminescence
  • an organic EL display is a display that emits light by electrical excitation of fluorescent organic compound and displays image by driving each of M N organic luminescent cells with voltage or current.
  • This organic cell has a structure of an anode (ITO), an organic thin film and, a cathode layer (metal).
  • the organic thin film is formed as a multi-layered structure including an emission layer ("EML”), an electron transport layer (“ETL”), and a hole transport layer (“HTL”) so as to increase luminescence efficiency by balancing electron and hole concentrations.
  • EML emission layer
  • ETL electron transport layer
  • HTL hole transport layer
  • EIL electron injection layer
  • HIL hole injection layer
  • Organic EL displays that use organic luminescent cells like the above are configured as passive matrix or active matrix that includes thin film transistors (TFTs).
  • TFTs thin film transistors
  • organic luminescent cells are formed between anodes and cathodes lines that cross each other and driven by driving those lines.
  • each organic luminescent cell is connected to a TFT usually through an ITO electrode and driven by controlling the gate voltage of the corresponding TFT.
  • Fig. 1 is a circuit diagram of a conventional pixel for driving the organic EL display using TFTs, and it is a representative of M N pixels.
  • driving transistor Mb is connected to organic EL device OLED to supply current for emitting light.
  • the amount of current through driving transistor Mb is controlled by data voltage applied through switching transistor Ma.
  • capacitor C1 for maintaining the applied voltage during a certain period is connected between source and gate of transistor Mb.
  • Scan line X M is connected to the gate of transistor Ma, and data line Y N is connected to the source thereof.
  • Operation of the pixel is as follows.
  • switching transistor Ma When switching transistor Ma is turned on by the selection signal applied to the gate thereof, a data voltage is applied to node A, the gate of the driving transistor through the data line. Then, a current corresponding to the data voltage applied to the gate thereof flows into the organic EL device OLED to emit light.
  • I OLED ⁇ 2 ⁇ V GS - V TH 2 + ⁇ 2 ⁇ V DD - V DATA - V TH 2
  • I OLED is a current flowing through organic EL device OLED
  • V GS is the gate-to-source voltage of transistor Mb
  • V TH is a threshold voltage of transistor Mb
  • V DATA is a data voltage
  • ⁇ is a constant.
  • the current corresponding to the applied data voltage is supplied to organic EL device OLED, and organic EL device OLED emits light in correspondence to the supplied current.
  • the applied data voltage has many levels to express corresponding gray levels.
  • Document EP 1 220 191 discloses an OLED display device comprising several pixel circuits each of which having a switch for switching the voltage applied to a data line in response to a select signal supplied to a scan line.
  • a thin film transistor supplies current to an organic EL element in response to the voltage applied to the TFT gate through the switch and a capacitor maintains the applied voltage.
  • the threshold voltage deviation of the driving TFT is compensated by coupling its gate to another gate of another TFT thereby creating a first precharge process.
  • the document US 5 510 807 discloses an LCD data driver circuit integrated onto a display substrate, a demultiplexer circuit demultiplexes a group of Y columns of multiplexed video data signals to X groups of Y pixel capacitors precharged before video signal applied, thereby creating only a part of a second precharge process.
  • an organic EL display which includes: a plurality of data lines transmitting data voltages; a plurality of scan lines transmitting selection signals; a plurality of pixel circuits; and a data driver.
  • the pixel circuits are provided in pixel areas defined by two adjacent data lines and two adjacent scan lines and include first and second switching elements, first thin film transistors, and capacitors.
  • the first switching elements respond to the selection signals applied to the scan lines to transmit the data voltages applied to the data lines, and the first thin film transistors supply currents to organic electroluminescence devices in correspondence to the data voltages inputted to gates thereof through the first switching elements.
  • the capacitors maintain the data voltages during a certain period, and the second switching elements apply first precharge voltage to the capacitors in response to control signals while the selection signals are applied to previous scan lines.
  • control signals are separate reset signals or selection signals applied to previous scan lines.
  • the data driver divides a plurality of data lines into a plurality of groups to apply data voltage corresponding to the respective groups
  • the organic EL display preferably further includes a demultiplexer.
  • the demultiplexer applies data voltages sequentially applied from the data driver to the corresponding data lines and applies second precharge voltages to data lines of at least one group before selection signals for selecting scan lines are applied to the scan lines connected to the pixel circuits.
  • the data driver applies the data voltages to respective data lines sequentially
  • the organic EL display preferably further includes a precharge means, which applies second precharge voltages to the data lines simultaneously before selection signals for selecting scan lines are applied to the scan lines connected to the pixel circuits.
  • the data driver applies the data voltages to respective data lines
  • the organic EL display preferably further includes a precharge means.
  • the precharge means simultaneously applies second precharge voltages to all data lines before selection signals for selecting scan lines are applied to the scan lines connected to the pixel circuits and sequentially stops the application of the second precharge voltages before the data voltages are applied to the respective data lines sequentially.
  • the pixel circuits may further include second thin film transistors of which the gates are connected to the gates of the first thin film transistors and that are diode-connected between the first and the second switching elements.
  • the second precharge voltage preferably has a value equal to the first precharge voltage or a value further from the data voltage than that.
  • the second precharge voltage preferably has a constant value.
  • a method of driving such an organic EL display is provided.
  • the capacitor of the pixel circuit connected to i-th scan line is precharged with the first precharge voltage while selection signal is applied to (i-1)th scan line.
  • the data lines are applied with second precharge voltages before selection signal is applied to the i-th scan line.
  • data voltages are sequentially applied to corresponding groups of data lines which consist of at least one data line and applications of the second precharge voltages to each group of data lines are stopped before the data voltages are applied to those lines.
  • a display which includes a plurality of data lines, a plurality of scan lines, a plurality of pixel circuits, a data driver, and a scan driver.
  • the pixel circuits are provided in pixel areas defined by two adjacent data lines and two adjacent scan lines.
  • Each of the pixel circuits includes a first switching element responding to selection signal applied to the scan line to transmit data voltage applied to the data line, a capacitor for maintaining the data voltage during a certain period, and a second switching element applying a first precharge voltage to the capacitor in response to control signal while selection signal is applied to the previous scan line.
  • the data driver divides a plurality of data lines into a plurality of groups each of which consists of at least one data line and applies corresponding data voltages to the respective groups sequentially.
  • Second precharge voltages are applied to data lines of at least one group before selection signals for selecting scan lines are applied to the scan lines connected to the pixel circuits, and the application of second precharge voltages is stopped when corresponding data voltages are applied to the respective groups.
  • Control signals are preferably selection signals applied to previous scan lines or separate reset signals.
  • Fig. 2 shows an organic EL display according to a first embodiment of the present invention
  • Fig. 3A and Fig. 3B show a representative pixel of the first embodiment and a modified example thereof according to the present invention, respectively.
  • the organic EL display according to the first embodiment of the present invention includes organic EL display panel 110, scan driver 120, and data driver 130.
  • Organic EL display panel 110 includes a plurality of data lines Y 1 to Y N transmitting data voltages, a plurality of scan lines X 1 to X M transmitting selection signals, and a plurality of pixel circuits 112. Pixel circuits 112 are provided in pixel areas defined by two adjacent data lines and two adjacent scan lines. Scan driver 120 applies the selection signals to scan lines X 1 to X M , and data driver 130 applies the data voltages representing image signals to data lines Y 1 to Y N .
  • pixel circuit 112 includes organic EL device OLED; transistors M1, M2, M3, and M4; and capacitor C1.
  • Transistor M3 has a gate connected to scan line X m , a source connected to the data line and a drain connected to a source of transistor M2, to transmit the data voltage to transistor M2 in response to the selection signal applied to scan line X m .
  • the gate and the drain of transistor M2 are connected with each other so as to work as a diode (diode-connected) to transmit the data voltage from transistor M3 to transistor M1.
  • Transistor M1 has a source connected to power voltage VDD, a drain connected to organic EL device OLED, and a gate connected to the drain of transistor M2, and supplies a current corresponding to the data voltage from transistor M2 to organic EL device OLED.
  • Organic EL device OLED emits light corresponding to the supplied current.
  • Capacitor C1 is connected between power voltage VDD and the gate of transistor M1 to maintain the data voltage and precharge voltage Vp applied to the gate of transistor M1 during a specific period.
  • Transistor M4 has a gate connected to previous scan line X m-1 , a source connected to the drain of transistor M2, and a drain connected to the precharge voltage Vp is applied to, and initializes the gate of transistor M1 to precharge voltage Vp in response to the selection signal applied to previous scan line X m-1 .
  • precharge voltage Vp is preferably set to a somewhat smaller value than that of a voltage of node A corresponding to the highest gray level (i.e., a voltage corresponding to the minimum voltage applied to the data line).
  • transistor M3 is turned on by the selection signal applied to scan line X m , the data voltage applied to the data line is transmitted to the gate (node A) of driving transistor M1 through transistor M2. Then, a current corresponding to the data voltage applied to the gate thereof flows through organic EL device OLED, passing through transistor M1, to emit light.
  • the current flowing through organic EL device OLED according to the first embodiment of the present invention is as following Equation 2.
  • I OLED ⁇ 2 ⁇ V GS - V TH 2 + ⁇ 2 ⁇ V DD - V DATA - V TH 2
  • I OLED is a current flowing through organic EL device OLED
  • V GS is a gate-to-source voltage of transistor M1
  • V TH1 is a threshold voltage of transistor M1
  • V TH2 is a threshold voltage of transistor M2
  • ⁇ is a constant.
  • Equation 2 can be expressed as the following Equation 3.
  • I OLED ⁇ 2 ⁇ V DD - V DATA 2
  • transistors M1, M2, M3, and M4 of pixel circuit 112 have been described with PMOS transistors in the first embodiment of the present invention, the present invention is not limited to this but may use NMOS transistors or the combination of PMOS and NMOS transistors. Since modification of pixel circuits for these cases can be easily configured by those who have common knowledge in the fields related to this invention, no detailed description will be included herein.
  • transistor M4 is driven by the selection signal of previous scan line X m-1 in order to initialize the gate of transistor M1 of pixel circuit 112 to precharge voltage Vp.
  • transistor M4 may be driven by applying a separate reset signal to the gate of transistor M4 without applying the selection signal of previous scan line X m-1 to the gate thereof.
  • the data voltages when the data voltages are applied to the data lines, the data voltages may be applied to all data lines Y 1 to Y N not at once, but sequentially. In the case wherein the data voltages are applied sequentially, when a data voltage is applied to data line Y 1 with scan line X m selected, in data line Y 2 , the data voltage applied at the time of selecting previous scan line X m-1 is stored in a parasitic capacitor, and precharge voltage Vp is stored in capacitor C1 of pixel circuit 112.
  • diode element M2 is turned on by difference between the voltage of the parasitic capacitor and the voltage of capacitor C1, the charges are redistributed between the parasitic capacitor and capacitor C1 to change the voltage of capacitor C1.
  • transistor M2 may not be turned on by difference between the changed voltage of capacitor C1 and the data voltage applied to data line Y 2 later, and in this case, a desired voltage is not applied to capacitor C1 and desired images cannot be obtained.
  • precharge voltage Vpre is applied to the data line to which the data voltage is not applied to charge the data line with precharge voltage Vpre, and thereby, transistor M2 cannot be turned on by the difference between the voltage of capacitor C1 and precharge voltage Vpre.
  • precharge voltage Vpre is equal to 'precharge voltage Vp - threshold voltage V TH2 ' or further from the data voltage than that, so that transistor M2 is not turned on.
  • the threshold voltage V TH2 is negative in case transistor M2 is a PMOS transistor, and threshold voltage V TH2 is positive in case transistor M2 is an NMOS transistor.
  • Fig. 4 shows an organic EL display according to a second embodiment of the present invention
  • Fig. 5 shows a demultiplexer of the organic EL display according to the second embodiment of the present invention
  • Fig. 6 shows a timing diagram of the organic EL display according to the second embodiment of the present invention.
  • organic EL display 200 includes organic EL display panel 210, scan driver 220, data driver 230 and demultiplexer 240.
  • the organic EL display according to the second embodiment of the present invention has the same configuration as that of the first embodiment except for data driver 230 and demultiplexer 240.
  • Pixel circuit 212 of organic EL display panel 210 includes pixel circuit 112 according to the first embodiment of the present invention and all the pixel circuits capable of being modified in the first embodiment of the present invention.
  • Data driver 230 outputs the data voltages to demultiplexer 240 per R (red), G (green), and B (blue) sequentially under the control of a controller (not shown).
  • a controller not shown
  • the number of data lines Y 1 , Y 2 , Y 3 , Y 4 , Y 5 , Y 6 , ..., Y 3n-2 , Y 3n-1 , and Y 3n is 3n, i.e., data lines Y 1 , Y 4 ,..,Y 3n-2 transmitting the R data voltages, data lines Y 2 , Y 5 ,.., Y 3n-1 transmitting the G data voltages, and data line Y 3 , Y 6 ,.., Y 3n transmitting the B data voltages
  • the number of signal lines D 1 , D 2 , .., D n transmitting the data voltages from the data driver to demultiplexer 240 is n in correspondence to each one of R, G
  • data driver 230 sequentially outputs R, G and B data voltages to signal lines D 1 , D 2 , ..., D n under the control of the controller.
  • demultiplexer 240 is supplied with the data voltages per R, G, and B from data driver 230, and then, it outputs the R, G, and B data voltages to respective data lines sequentially.
  • Demultiplexer 240 includes data voltage supplying switching elements MR 1 , MG 1 , MB 1 , MR 2 , MG 2 , MB 2 ,..., MR n , MG n , and MB n and precharge voltage supplying switching elements PG 1 , PB 1 , PG 2 , PB 2 ,..., PG n , and PB n composed of PMOS transistors.
  • Data lines Y 1 , Y 2 , and Y 3 are connected to signal line D 1 in parallel with each other through the respective switching elements MR 1 , MG 1 , and MB 1 , and data lines Y 4 , Y 5 , and Y 6 are connected to data line D 2 in parallel with each other through the respective switching elements MR 2 , MG 2 , and MB 2 .
  • data lines Y 3n-2 , Y 3n-1 , and Y 3n are connected to signal line D n through the respective switching elements MR n , MG n , and MB n .
  • switching elements PG 1 , PB 1 , PG 2 , PB 2 , ..., PG n , and PB n are connected between precharge voltage Vpre and data lines Y 2 , Y 3 , Y 5 , Y 6 ,..., Y 3n-1 , and Y 3n .
  • Data voltage supplying switching elements MR 1 to MR n are connected to switching signal line 241, and transmit the R data voltages to data lines Y 1 , Y 4 ,..., Y 3n-2 and pixel circuits 212 in response to switching signal H R applied from the controller through signals lines 241.
  • Data voltage supplying switching elements MG 1 to MG n are connected to switching signal line 243, and apply the G data voltages to data lines Y 2 , Y 5 , ..., Y 3n-1 and pixel circuits 212 in response to switching signal H G .
  • data voltage supplying switching elements MB 1 to MB n are connected to switching signal line 245, and apply the B data voltages to data lines Y 3 , Y 6 ,..., Y 3n and pixel circuits 212 in response to switching signal H B .
  • precharge voltage supplying switching elements PG 1 to PG n are connected to signal line 242 and transmit precharge voltages Vpre via data lines Y 2 , Y 5 ,..., Y 3n-1 to pixel circuits 212 in response to switching signal P G applied through signal line 242 from the controller.
  • Precharge voltage supplying switching elements PB 1 to PB n are connected to signal line 244 and transmit precharge voltages Vpre via data lines Y 3 , Y 6 ,..., Y 3n to pixel circuits 212 in response to switching signal P B .
  • Such precharge voltages Vpre must have a value equal to 'precharge voltage Vp - threshold voltage V TH2 ' or a value that is further from the data voltages than that, compared with precharge voltage Vp applied to capacitor C1. In this way, transistor M2 is not turned on by the difference between voltage Vpre stored in the data line and voltage Vp stored in capacitor C1.
  • transistors M1 M2, M3, and M4 of pixel circuit 212; data voltage supplying switching elements MR 1 , MG 1 , MB 1 , MR 2 , MG 2 , MB 2 ,..., MR n , MG n , and MB n ; and precharge voltage supplying switching elements PG 1 , PB 1 , PG 2 , PB 2 ,..., PG n , and PB n have been described using PMOS transistors, the present invention is not limited to these but may use NMOS transistors or a combination of PMOS transistors and NMOS transistors. Since alternative circuit configurations and driving signals in accordance with the teachings of the present invention will be apparent those skilled in the art, no further detailed description thereof will be included herein.
  • pixel circuits 212 connected to scan line X m operate with R data voltages applied to data lines Y 1 , Y 4 ,..., Y 3n-2 and data lines Y 2 , Y 3 , Y 5 , Y 6 ,..., Y 3n-1 and Y 3n are precharged to precharge voltages Vpre with the parasitic capacitors.
  • switching elements MR 1 to MR n and PG 1 to PG n are turned off, and switching elements MG 1 to MG n are turned on by switching signals H R and P G of high level, and switching signal H G of low level.
  • pixel circuits 212 connected to scan line X m and data lines Y 2 , Y 5 ,..., Y 3n-1 operate with the G data voltages applied to those data lines and data lines Y 3 , Y 6 ,...,Y 3n are still precharged to precharge voltages Vpre with the parasitic capacitors.
  • switching elements MG 1 to MG n and switching elements PB 1 to PB n are turned off, and switching elements MB 1 to MB n are turned on by switching signals HG and P B of high level and switching signal H B of a low signal.
  • pixel circuits 212 connected to scan line X m and data lines Y 3 , Y 6 ,..., Y 3n operate with the B data voltages applied to those data lines.
  • the data lines Y 2 , Y 3 , Y 5 , Y 6 ,..., Y 3n-1 , and Y 3n are precharged to precharge voltages Vpre during the application of the R data voltages to data lines Y 1 , Y 4 , ..., Y 3n-2 . Accordingly, since transistors M2 are not turned on by the differences between the precharge voltages stored in capacitors C1 and precharge voltages Vpre, capacitors C1 can be kept with precharge voltages Vp continuously.
  • transistors M2 are not turned on by applied data voltages due to changed voltages of capacitors C1.
  • the data voltages are outputted per R, G, and B sequentially and demultiplexer 240 works as 1:3 DEMUX
  • the present invention is not limited to this.
  • N data lines may be formed as one group and the data voltages corresponding to respective groups may be outputted sequentially.
  • the demultiplexer works as 1:N DEMUX to distribute the data voltages inputted to the respective groups to the corresponding the data lines out of the N data lines. Since alternative configurations and driving signals in accordance with the teachings of the present invention will be apparent those skilled in the art, no further detailed description thereof will be included herein.
  • Fig. 7 shows an organic EL display according to a third embodiment of the present invention
  • Fig. 8 shows timing diagrams of the organic EL display according to the third embodiment of the present invention.
  • the organic EL display according to the third embodiment of the present invention includes organic EL display panel 310, scan driver 320, data driver 330, and precharge means 340.
  • Organic EL display panel 310 includes a plurality of data lines Y 1 to Y n transmitting the data voltages representing image signals, a plurality of scan lines X 1 to X M transmitting selection signals, and a plurality of pixel circuits 312.
  • Pixel circuits 312 include pixel circuits 112 according to the first embodiment and all the pixel circuits capable of being modified in the first embodiment of the present invention.
  • Scan driver 320 applies the selection signals to scan lines X 1 to X M to control on/off of thin film transistors M3 of pixel circuits 312.
  • Data driver 330 includes shift register 332, a plurality of OR gates OR 1 to OR N , and data voltage switching elements HSW 1 to HSW N made of PMOS transistors.
  • Shift register 332 outputs control signals H 1 to H N for controlling on/off of switching elements HSW 1 to HSW N , and these signals H 1 to H N are inputted to respective OR gates OR 1 to OR N together with an OE signal from a controller (not shown).
  • the OE signal is a control signal for selecting the data lines after the data of image signals Vsig is changed, and the respective outputs of OR gates OR 1 to OR N become switching signals for turning on/off switching elements HSW 1 to HSW N .
  • the image signals Vsig are sequentially sampled by switching signals S 1 to S N of shift register 332 to be applied to respective data lines Y 1 to Y N .
  • one ends of switching elements HSW 1 to HSW N are connected to one ends of data lines Y 1 to Y N
  • the other ends of switching elements HSW 1 to HSW N are connected to image signal lines 334 transmitting image signals Vsig.
  • Switching elements HSW 1 to HSW N sequentially apply the image signals to respective data lines Y 1 to Y N , responding to switching signals S 1 to S N , respectively.
  • Precharge means 340 are connected to the other ends of data lines Y 2 to Y N and include switching elements PSW 2 to PSW N composed of PMOS transistors for precharging. Switching elements PSW 2 to PSW N apply precharge voltage Vpre to data lines Y 2 to Y N at the same time in response to precharge control signal PC from the controller. Precharge voltage Vpre has a value equal to 'precharge voltage Vp - threshold voltage V TH2 ' or a value further from image signals Vsig than that, compared with precharge voltage Vp applied to capacitors C1.
  • switching elements HSW 1 to HSW N and PSW 1 to PSW N are respectively provided at both ends of data lines Y 1 to Y N , they may also be provided at either end of data lines Y 1 to Y N .
  • transistors M1, M2, M3, and M4, switching elements HSW 1 to HSW N , and switching elements PSW 2 to PSW N have been described to be composed of PMOS transistors, the present invention is not limited to this but they may be composed of NMOS transistors or both of PMOS and NMOS transistors. Since alternative circuit configurations and driving signals in accordance with the teachings of the present invention will be apparent those skilled in the art, no further detailed description thereof will be included herein.
  • switching element HSW 1 and switching elements PSW 2 to PSW N are turned on by switching signal S 1 and control signals PC of low level, and then the selection signal for selecting scan line X m are applied.
  • organic EL device OLED of pixel circuit 312 connected to scan line X m and data line Y 1 is driven with the data voltage that is sampled from image signal Vsig by switching element HSW 1 , and data lines Y 2 to Y N are precharged to precharge voltages Vpre by the parasitic capacitors.
  • control signals are inverted to turn off switching elements PSW 2 to PSW N , and thereby, data lines Y 2 to Y N are floated to be kept with precharge voltage Vpre until the data voltages are applied thereto.
  • shift register 332 shifts and outputs the selection signal to turn on switching elements HSW 2 to HSW N sequentially to apply image signal Vsig to data lines Y 2 to Y N , and thereby, driving organic EL device OLED.
  • transistors M2 are not turned on by differences between precharge voltages Vp stored in capacitors C1 and precharge voltages Vpre at the time of selecting scan line X m . Accordingly, capacitors C1 are kept with precharge voltages Vp continuously. Therefore, the case where transistors M2 are not turned on at the time the data voltages are applied due to the change of the voltages of capacitors C1, as described before, does not occur.
  • switching elements for precharging may be driven respectively, and in the following, such an embodiment will be described with reference to Figs. 9 and 10 .
  • Fig. 9 shows an organic EL display according to a fourth embodiment of the present invention
  • Fig. 10 shows a timing diagram of the organic EL display according to the fourth embodiment of the present invention.
  • the organic EL display according to the fourth embodiment of the present invention includes organic EL display panel 410, scan driver 420, data driver 430, and precharge means 440.
  • Organic EL display panel 410 and scan driver 420 of the fourth embodiment are the same as organic EL display panel 310 and scan driver 320 of the third embodiment, and pixel circuits 412 of organic EL display panel 410 include the pixel circuits according to the first embodiment and all the pixel circuits capable of being modified in the first embodiment of the present invention.
  • Data driver 430 includes shift register 432, switching elements for data voltage HSW 1 to HSW N , and OR gate OR 1 to OR N .
  • Shift register outputs control signals H 1 to H N for controlling switching elements HSW 1 to HSW N sequentially, and these control signals are inputted to respective OR gates OR 1 to OR N together with an OE signal from a controller (not shown). Respective outputs of OR gates OR 1 to OR N become switching signals S 1 to S N for turning on/off switching elements HSW 1 to HSW N .
  • Image signals Vsig are sampled sequentially by the switching signals of shift register 432 to be applied to respective data lines Y 1 to Y N .
  • one ends of data lines Y 1 to Y N are respectively connected to one ends of switching elements HSW 1 to HSW N
  • the other ends of switching elements HSW 1 to HSW N are respectively connected to image signal line 434 for transmitting image signals Vsig.
  • Switching elements HSW 1 to HSW N sequentially transmit the image signals to respective data lines Y 1 to Y N in response to switching signals S 1 to S N .
  • Precharge means 440 include switching elements for precharging PSW 2 to PSW N and a plurality of precharge control signal generators 442.
  • Precharge control signal generators 442 respectively receive control signals H 1 to H N-1 from shift register 432 and previous precharge control signals P 1 to P N-1 to generate precharge control signals P 2 to P N .
  • Precharge control signal P 1 is a signal always high.
  • Precharge control signal generators 442 are composed of AND gates in the fourth embodiment of the present invention.
  • Switching elements PSW 2 to PSW N transmit precharge voltages Vpre to data lines Y 2 to Y N in response to precharge control signals P 2 to P N .
  • Such precharge control signal Vpre is equal to 'precharge voltage Vp - threshold voltage V TH2 ' or further from voltage Vsig than that, compared with the precharge voltage applied to capacitor C1.
  • precharge control signals P 2 to P N become low level by control signal H 1 of low level, control signal H 2 to H N of high level, and control signal P 1 of high level.
  • Switching elements HSW 1 and switching elements PSW 2 to PSW N are turned on by these signals and the selection signal for selecting scan line X m is applied.
  • organic EL device OLED of pixel circuit 412 connected to scan line X m and data line Y 1 are driven by the data voltage sampled by switching element HSW 1 , and data lines Y 2 to Y N are precharged to precharge voltages Vpre by the parasitic capacitors.
  • control signal H 1 becomes high level and control signal H 2 becomes low level by shift register 432
  • control signal P 2 becomes high level
  • control signals P 3 to P N are kept with low level continuously.
  • Switching element PSW 2 is turned off, and switching element HSW 2 is turned on by such signals to transmit the data voltage to data line Y 2
  • switching elements PSW 3 to PSW N are turned on continuously to transmit the precharge voltages to data lines Y 3 to Y N .
  • switching elements HSW 2 to HSW N are sequentially turned on, and switching elements PSW 2 to PSW N are sequentially turned off, thereby, applying the data voltages to data lines Y 2 to Y N , and the data lines are charged to precharge voltage Vpre until the data voltages are applied to them.
  • transistor M2 is not turned on by difference between precharge voltage Vp stored in capacitor C1 at the time scan line X m-1 is selected and precharge voltage Vpre, and thus, capacitor C1 can be kept with precharge voltage Vp.
  • transistors M2 are not turned on at the time the data voltages are applied due to the change of the voltages of capacitors C1, as described before, does not occur.
  • Fig. 11 is a timing diagram of organic EL displays according to a fifth and a sixth embodiment of the present invention.
  • Figs. 12 and 13 are diagrams to illustrate precharge control signal generators in the organic EL displays according to the fifth and the sixth embodiments of the present invention.
  • precharge control signal generators 442 as shown in Fig. 12 generate precharge control signals P 1 to P N
  • precharge control signals are generated as shown in Fig. 11 in the fifth embodiment of the present invention.
  • precharge control signal generator 442 for generating precharge control signal P n applied to data line Y n will be described.
  • Precharge control signal generator 442 for generating precharge control signal P n includes an inverter, an OR gate, and an AND gate.
  • the OR gate receives a signal that the inverter outputs in response to control signal H n+1 corresponding to the next data line Y n+1 and a control signal corresponding to the present data line Y n .
  • Output of the OR gate and previous precharge control signal P n-1 are inputted together to the AND gate to generate precharge control signal P n .
  • Precharge control signals P 1 to P N generated as above are as shown in Fig. 11 .
  • a time interval that switching element HSW 2 is turned on by control signal H 2 of low level is generated.
  • switching element PSW 2 may be turned on by precharge control signal P 2 according to the fifth embodiment to transmit precharge voltage Vpre.
  • precharge voltage Vpre has to be set so that the voltage applied to data line Y 2 and determined by image signal Vsig and precharge voltage Vpre is equal to 'precharge voltage Vp - threshold voltage V TH2 ' or further from image signal Vsig than that.
  • the driving voltages of switching elements PSW 2 and HSW 2 may increase as the difference between precharge voltage Vpre and image signal Vsig increases.
  • the driving voltages are increased, there is a problem that power consumption is also increased.
  • a shift register whose outputs do not overlap each other is configured in a sixth embodiment by adjusting outputs of the shift register in the fifth embodiment.
  • the shift register whose outputs do not overlap may be provided by an OR operation of the two adjacent outputs of shift register 432 with OR gates.
  • the result of performing an OR-operation of outputs H 1 and H 2 of shift register 432 is made to be new output H 1 '. That is, when both of two outputs H 1 and H 2 are low levels, output H 1 ' of the OR gate becomes low level, and also, when both of outputs H 2 and H 3 are low levels, output H 2 ' becomes low level, and thereby, it is possible to form a shift register without overlapping the outputs.
  • the present invention is not limited to this but may use NMOS transistors, CMOS transistors, or a combination thereof. Since alternative circuit configurations and driving signals in accordance with the teachings of the present invention will be apparent those skilled in the art, no further detailed description thereof will be included herein.
  • a separate reset signal is applied to the gate of transistor M4 to drive it to charge capacitor C1 of pixel circuit 112 with precharge voltage Vp.
  • the present invention is not limited to this but is applicable to all of the pixel circuits that precharge voltages Vp are applied to.
  • the organic EL display has been described as an example in the embodiments of the present invention, the present invention is not limited to this but is applicable to all of the displays applying precharge voltages Vp to capacitors C1 provided in the pixel circuits.
  • the pixel circuits of the displays include transistors driven by the signals applied through the gate lines and the data lines and transistors for applying precharge voltages Vp, it is possible to improve the poor images by applying precharge voltages Vpre to the data lines, as described in the embodiments of the present invention.
EP03006113A 2002-03-21 2003-03-18 OLED display device and driving method thereof Expired - Lifetime EP1347436B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR2002015437 2002-03-21
KR1020020015437A KR100649243B1 (ko) 2002-03-21 2002-03-21 유기 전계발광 표시 장치 및 그 구동 방법

Publications (3)

Publication Number Publication Date
EP1347436A2 EP1347436A2 (en) 2003-09-24
EP1347436A3 EP1347436A3 (en) 2005-03-16
EP1347436B1 true EP1347436B1 (en) 2010-01-20

Family

ID=27786041

Family Applications (1)

Application Number Title Priority Date Filing Date
EP03006113A Expired - Lifetime EP1347436B1 (en) 2002-03-21 2003-03-18 OLED display device and driving method thereof

Country Status (6)

Country Link
US (1) US7057589B2 (zh)
EP (1) EP1347436B1 (zh)
JP (1) JP4657580B2 (zh)
KR (1) KR100649243B1 (zh)
CN (1) CN1310202C (zh)
DE (1) DE60331020D1 (zh)

Families Citing this family (118)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW588468B (en) * 2002-09-19 2004-05-21 Ind Tech Res Inst Pixel structure of active matrix organic light-emitting diode
JP4074533B2 (ja) * 2003-03-06 2008-04-09 セイコーエプソン株式会社 電気光学装置及び電子機器
TWI230914B (en) * 2003-03-12 2005-04-11 Au Optronics Corp Circuit of current driving active matrix organic light emitting diode pixel and driving method thereof
KR100515299B1 (ko) * 2003-04-30 2005-09-15 삼성에스디아이 주식회사 화상 표시 장치와 그 표시 패널 및 구동 방법
US8378939B2 (en) * 2003-07-11 2013-02-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP4144474B2 (ja) * 2003-08-22 2008-09-03 ソニー株式会社 画像表示装置、画像表示パネル、パネル駆動装置および画像表示パネルの駆動方法
KR100560468B1 (ko) 2003-09-16 2006-03-13 삼성에스디아이 주식회사 화상 표시 장치와 그 표시 패널
KR100515300B1 (ko) * 2003-10-07 2005-09-15 삼성에스디아이 주식회사 전류 샘플/홀드 회로와 전류 샘플/홀드 방법 및 이를이용한 역다중화 장치와 디스플레이 장치
KR100948623B1 (ko) * 2003-10-15 2010-03-24 삼성전자주식회사 유기전계발광 패널과, 이를 갖는 표시 장치
KR100778409B1 (ko) * 2003-10-29 2007-11-22 삼성에스디아이 주식회사 화상 표시 패널 및 그 구동 방법
KR100515306B1 (ko) * 2003-10-29 2005-09-15 삼성에스디아이 주식회사 유기ｅｌ 표시패널
KR20050041665A (ko) * 2003-10-31 2005-05-04 삼성에스디아이 주식회사 화상 표시 장치 및 그 구동 방법
KR100670129B1 (ko) * 2003-11-10 2007-01-16 삼성에스디아이 주식회사 화상 표시 장치 및 그 구동 방법
KR100529075B1 (ko) * 2003-11-10 2005-11-15 삼성에스디아이 주식회사 전류 샘플/홀드 회로를 이용한 역다중화 장치와, 이를이용한 디스플레이 장치
KR100529077B1 (ko) * 2003-11-13 2005-11-15 삼성에스디아이 주식회사 화상 표시 장치, 그 표시 패널 및 그 구동 방법
KR100599726B1 (ko) * 2003-11-27 2006-07-12 삼성에스디아이 주식회사 발광 표시 장치 및 그 표시 패널과 구동 방법
KR100536235B1 (ko) * 2003-11-24 2005-12-12 삼성에스디아이 주식회사 화상 표시 장치 및 그 구동 방법
JP4297438B2 (ja) * 2003-11-24 2009-07-15 三星モバイルディスプレイ株式會社 発光表示装置，表示パネル，及び発光表示装置の駆動方法
KR100578793B1 (ko) * 2003-11-26 2006-05-11 삼성에스디아이 주식회사 발광 표시 장치 및 그 구동 방법
KR100578911B1 (ko) 2003-11-26 2006-05-11 삼성에스디아이 주식회사 전류 역다중화 장치 및 이를 이용한 전류 기입형 표시 장치
KR100578913B1 (ko) 2003-11-27 2006-05-11 삼성에스디아이 주식회사 역다중화기를 이용한 표시 장치 및 그 구동 방법
KR100578914B1 (ko) 2003-11-27 2006-05-11 삼성에스디아이 주식회사 역다중화기를 이용한 표시 장치
KR100589381B1 (ko) 2003-11-27 2006-06-14 삼성에스디아이 주식회사 역다중화기를 이용한 표시 장치 및 그 구동 방법
JP4036184B2 (ja) * 2003-11-28 2008-01-23 セイコーエプソン株式会社 表示装置および表示装置の駆動方法
JP2005164666A (ja) * 2003-11-28 2005-06-23 Sanyo Electric Co Ltd 表示装置の駆動システム
JP4111128B2 (ja) * 2003-11-28 2008-07-02 カシオ計算機株式会社 表示駆動装置及び表示装置並びにその駆動制御方法
JP4054794B2 (ja) * 2003-12-04 2008-03-05 キヤノン株式会社 駆動装置及び表示装置及び記録装置
KR101019047B1 (ko) * 2003-12-23 2011-03-04 엘지디스플레이 주식회사 유기전계발광소자 및 그 구동방법
KR101019967B1 (ko) * 2003-12-27 2011-03-09 엘지디스플레이 주식회사 유기전계발광소자 및 그 구동방법
US7400098B2 (en) * 2003-12-30 2008-07-15 Solomon Systech Limited Method and apparatus for applying adaptive precharge to an electroluminescence display
KR100560449B1 (ko) * 2004-04-29 2006-03-13 삼성에스디아이 주식회사 발광 표시 패널 및 발광 표시 장치
KR100560450B1 (ko) * 2004-04-29 2006-03-13 삼성에스디아이 주식회사 발광 표시 패널 및 발광 표시 장치
KR101126343B1 (ko) * 2004-04-30 2012-03-23 엘지디스플레이 주식회사 일렉트로-루미네센스 표시장치
KR100600350B1 (ko) * 2004-05-15 2006-07-14 삼성에스디아이 주식회사 역다중화 및 이를 구비한 유기 전계발광 표시 장치
KR100622217B1 (ko) * 2004-05-25 2006-09-08 삼성에스디아이 주식회사 유기 전계발광 표시장치 및 역다중화부
KR100581799B1 (ko) * 2004-06-02 2006-05-23 삼성에스디아이 주식회사 유기 전계발광 표시소자 및 역다중화부
KR100581800B1 (ko) * 2004-06-07 2006-05-23 삼성에스디아이 주식회사 유기 전계발광 표시 장치 및 역다중화부
KR100578806B1 (ko) * 2004-06-30 2006-05-11 삼성에스디아이 주식회사 역다중화 장치와, 이를 이용한 표시 장치 및 그 표시 패널
KR100649246B1 (ko) * 2004-06-30 2006-11-24 삼성에스디아이 주식회사 역다중화 장치와, 이를 이용한 표시 장치 및 그 표시 패널
US8013816B2 (en) * 2004-06-30 2011-09-06 Samsung Mobile Display Co., Ltd. Light emitting display
KR100649249B1 (ko) * 2004-06-30 2006-11-24 삼성에스디아이 주식회사 역다중화 장치와, 이를 이용한 발광 표시 장치 및 그 표시패널
KR101087417B1 (ko) * 2004-08-13 2011-11-25 엘지디스플레이 주식회사 유기 발광표시장치의 구동회로
JP2006058654A (ja) * 2004-08-20 2006-03-02 Seiko Epson Corp 電気光学装置の駆動回路及び駆動方法、電気光学装置並びに電子機器
KR100581810B1 (ko) * 2004-08-25 2006-05-23 삼성에스디아이 주식회사 발광 표시장치와 그의 구동방법
US8199079B2 (en) * 2004-08-25 2012-06-12 Samsung Mobile Display Co., Ltd. Demultiplexing circuit, light emitting display using the same, and driving method thereof
JP2006091845A (ja) * 2004-08-27 2006-04-06 Seiko Epson Corp 電気光学装置用駆動回路及びその駆動方法、並びに電気光学装置及び電子機器
US20060077138A1 (en) * 2004-09-15 2006-04-13 Kim Hong K Organic light emitting display and driving method thereof
KR100602361B1 (ko) * 2004-09-22 2006-07-19 삼성에스디아이 주식회사 디멀티플렉서 및 이를 이용한 발광 표시장치와 그의구동방법
JP2006123493A (ja) * 2004-09-30 2006-05-18 Seiko Epson Corp ラインヘッド及び画像形成装置
KR101102021B1 (ko) * 2004-10-06 2012-01-04 엘지디스플레이 주식회사 일렉트로 루미네센스 표시소자
KR100583138B1 (ko) * 2004-10-08 2006-05-23 삼성에스디아이 주식회사 발광 표시장치
KR100604053B1 (ko) * 2004-10-13 2006-07-24 삼성에스디아이 주식회사 발광 표시장치
KR100604054B1 (ko) * 2004-10-13 2006-07-24 삼성에스디아이 주식회사 발광 표시장치
JP4206087B2 (ja) * 2004-10-13 2009-01-07 三星エスディアイ株式会社 発光表示装置
KR100688800B1 (ko) * 2004-11-17 2007-03-02 삼성에스디아이 주식회사 발광 표시장치와 그의 구동방법
KR100602352B1 (ko) * 2004-11-22 2006-07-18 삼성에스디아이 주식회사 화소 및 이를 이용한 발광 표시장치
KR100604060B1 (ko) * 2004-12-08 2006-07-24 삼성에스디아이 주식회사 발광 표시장치와 그의 구동방법
KR100637203B1 (ko) 2005-01-07 2006-10-23 삼성에스디아이 주식회사 유기 전계발광 표시장치 및 그 동작방법
KR101100885B1 (ko) * 2005-01-31 2012-01-02 삼성전자주식회사 유기 발광 표시 장치용 박막 트랜지스터 표시판
KR101152119B1 (ko) 2005-02-07 2012-06-15 삼성전자주식회사 표시 장치 및 그 구동 방법
TWI275056B (en) * 2005-04-18 2007-03-01 Wintek Corp Data multiplex circuit and its control method
KR100840116B1 (ko) * 2005-04-28 2008-06-20 삼성에스디아이 주식회사 발광 표시장치
KR100762138B1 (ko) 2005-05-17 2007-10-02 엘지전자 주식회사 평판 디스플레이 패널의 구동 방법
KR101192769B1 (ko) * 2005-06-03 2012-10-18 엘지디스플레이 주식회사 액정표시장치
KR101201127B1 (ko) * 2005-06-28 2012-11-13 엘지디스플레이 주식회사 액정표시장치와 그 구동방법
KR20070005967A (ko) * 2005-07-05 2007-01-11 삼성전자주식회사 액정표시장치와, 이의 구동 장치 및 방법
KR100635509B1 (ko) * 2005-08-16 2006-10-17 삼성에스디아이 주식회사 유기 전계발광 표시장치
KR100666640B1 (ko) * 2005-09-15 2007-01-09 삼성에스디아이 주식회사 유기 전계발광 표시장치
KR100666646B1 (ko) * 2005-09-15 2007-01-09 삼성에스디아이 주식회사 유기전계발광표시장치 및 유기전계발광표시장치의 구동방법
JP4923505B2 (ja) * 2005-10-07 2012-04-25 ソニー株式会社 画素回路及び表示装置
KR100732842B1 (ko) * 2005-11-09 2007-06-27 삼성에스디아이 주식회사 발광 표시장치
JP5160748B2 (ja) 2005-11-09 2013-03-13 三星ディスプレイ株式會社 発光表示装置
KR100800524B1 (ko) * 2006-02-13 2008-02-04 엘지전자 주식회사 액정 표시 장치
KR100748320B1 (ko) * 2006-03-29 2007-08-09 삼성에스디아이 주식회사 유기발광표시장치 및 그의 구동방법
KR100748321B1 (ko) * 2006-04-06 2007-08-09 삼성에스디아이 주식회사 주사 구동회로와 이를 이용한 유기 전계발광 표시장치
KR100759688B1 (ko) * 2006-04-07 2007-09-17 삼성에스디아이 주식회사 원장단위 검사가 가능한 유기전계발광 표시장치 및모기판과 그 검사방법
JP4208902B2 (ja) * 2006-06-30 2009-01-14 キヤノン株式会社 アクティブマトリクス型表示装置およびその駆動方法
US7852304B2 (en) * 2006-07-20 2010-12-14 Solomon Systech Limited Driving circuit, system, and method to improve uniformity of column line outputs in display systems
JP4203773B2 (ja) * 2006-08-01 2009-01-07 ソニー株式会社 表示装置
KR100739335B1 (ko) 2006-08-08 2007-07-12 삼성에스디아이 주식회사 화소 및 이를 이용한 유기전계발광 표시장치
KR100796136B1 (ko) * 2006-09-13 2008-01-21 삼성에스디아이 주식회사 유기전계발광표시장치 및 그의 구동방법
US20080238336A1 (en) * 2007-03-29 2008-10-02 Hong Kong Applied Science And Technology Research Back-Light Devices and Displays Incorporating Same
JP2009009018A (ja) * 2007-06-29 2009-01-15 Seiko Epson Corp ソースドライバ、電気光学装置、投写型表示装置及び電子機器
KR101493079B1 (ko) * 2007-07-11 2015-02-13 엘지디스플레이 주식회사 전계 발광 표시 장치 및 그 구동 방법
KR101407302B1 (ko) 2007-12-27 2014-06-13 엘지디스플레이 주식회사 발광 표시 장치 및 그 구동 방법
TWI395185B (zh) * 2008-02-19 2013-05-01 Wintek Corp 用於液晶顯示器之多工驅動電路
JP5384051B2 (ja) * 2008-08-27 2014-01-08 株式会社ジャパンディスプレイ 画像表示装置
JP5284198B2 (ja) * 2009-06-30 2013-09-11 キヤノン株式会社 表示装置およびその駆動方法
KR101082283B1 (ko) 2009-09-02 2011-11-09 삼성모바일디스플레이주식회사 유기전계발광 표시장치 및 그의 구동방법
US9251741B2 (en) * 2010-04-14 2016-02-02 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device and driving method
US9158408B2 (en) 2010-07-08 2015-10-13 Indian Institute Of Science Surfaces with embedded sensing and actuation networks using complementary-metal-oxide-semiconductor (CMOS) sensing chips
TWI451176B (zh) 2011-05-23 2014-09-01 Au Optronics Corp 液晶顯示器及用來對液晶顯示器的像素充放電的方法
CN102646389B (zh) * 2011-09-09 2014-07-23 京东方科技集团股份有限公司 Oled面板及oled面板驱动方法
TWI451394B (zh) * 2011-12-30 2014-09-01 Orise Technology Co Ltd 應用於顯示面板之控制裝置及其控制方法
KR102035718B1 (ko) * 2012-11-26 2019-10-24 삼성디스플레이 주식회사 유기전계발광 표시장치 및 그의 구동방법
CN103943082B (zh) 2014-03-25 2016-03-16 京东方科技集团股份有限公司 一种显示装置及其驱动方法
CN104091564B (zh) * 2014-06-30 2016-07-06 京东方科技集团股份有限公司 一种像素电路、有机电致发光显示面板及显示装置
CN105334650B (zh) * 2014-08-14 2018-11-13 群创光电股份有限公司 显示装置及触控显示装置
TWI543056B (zh) * 2014-08-14 2016-07-21 群創光電股份有限公司 顯示裝置及觸控顯示裝置
CN105810143B (zh) * 2014-12-29 2018-09-28 昆山工研院新型平板显示技术中心有限公司 一种数据驱动电路及其驱动方法和有机发光显示器
KR102261352B1 (ko) * 2014-12-31 2021-06-04 엘지디스플레이 주식회사 데이터 제어회로 및 이를 포함하는 평판표시장치
CN105185299B (zh) * 2015-08-07 2018-03-20 深圳市绿源半导体技术有限公司 一种led显示灰度补偿驱动装置、系统及其方法
KR102378589B1 (ko) * 2015-08-21 2022-03-28 삼성디스플레이 주식회사 디멀티플렉서, 이를 포함한 표시장치 및 그의 구동방법
KR102493555B1 (ko) * 2016-03-16 2023-02-01 삼성디스플레이 주식회사 표시 장치 및 이를 포함하는 전자 기기
KR101979444B1 (ko) * 2016-07-29 2019-05-17 삼성디스플레이 주식회사 표시장치
CN106251806B (zh) * 2016-09-29 2019-04-02 北京集创北方科技股份有限公司 Led显示装置及其驱动方法
CN106356026B (zh) * 2016-11-30 2019-02-01 广东聚华印刷显示技术有限公司 一种显示装置以及显示装置的驱动方法
KR102341411B1 (ko) 2017-03-31 2021-12-22 삼성디스플레이 주식회사 터치 센서, 그의 구동 방법 및 표시 장치
KR101832831B1 (ko) * 2017-06-14 2018-02-28 주식회사 에이코닉 표시 장치
JP6579173B2 (ja) * 2017-09-19 2019-09-25 セイコーエプソン株式会社 電気光学装置、電気光学装置の駆動方法、及び、電子機器
CN110176202B (zh) 2018-04-16 2021-04-06 京东方科技集团股份有限公司 信号处理电路及其驱动方法、显示面板及显示装置
CN108777132A (zh) * 2018-06-25 2018-11-09 昆山国显光电有限公司 像素电路及其驱动方法、显示面板及显示装置
CN109448631B (zh) * 2019-01-25 2019-04-19 南京中电熊猫平板显示科技有限公司 一种显示装置
CN113450701A (zh) * 2020-07-22 2021-09-28 重庆康佳光电技术研究院有限公司 数据线控制方法及装置、数据线驱动装置、显示装置
CN114170891B (zh) * 2020-09-11 2023-03-10 京东方科技集团股份有限公司 显示基板和显示装置
CN113628588B (zh) * 2021-08-17 2022-07-12 深圳市华星光电半导体显示技术有限公司 显示驱动模组、显示装置及显示方法
CN115171607B (zh) * 2022-09-06 2023-01-31 惠科股份有限公司 像素电路、显示面板及显示装置
CN115909943B (zh) * 2022-12-27 2023-11-17 惠科股份有限公司 显示面板及电子设备

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2602703B2 (ja) * 1988-09-20 1997-04-23 富士通株式会社 マトリクス表示装置のデータドライバ
US5426447A (en) * 1992-11-04 1995-06-20 Yuen Foong Yu H.K. Co., Ltd. Data driving circuit for LCD display
US5510807A (en) * 1993-01-05 1996-04-23 Yuen Foong Yu H.K. Co., Ltd. Data driver circuit and associated method for use with scanned LCD video display
JPH06337400A (ja) * 1993-05-31 1994-12-06 Sharp Corp マトリクス型表示装置及び駆動方法
JP3482683B2 (ja) * 1994-04-22 2003-12-22 ソニー株式会社 アクティブマトリクス表示装置及びその駆動方法
US6229506B1 (en) * 1997-04-23 2001-05-08 Sarnoff Corporation Active matrix light emitting diode pixel structure and concomitant method
US6229508B1 (en) * 1997-09-29 2001-05-08 Sarnoff Corporation Active matrix light emitting diode pixel structure and concomitant method
JP3629939B2 (ja) * 1998-03-18 2005-03-16 セイコーエプソン株式会社 トランジスタ回路、表示パネル及び電子機器
JP4081852B2 (ja) * 1998-04-30 2008-04-30 ソニー株式会社 有機ｅｌ素子のマトリクス駆動方法及び有機ｅｌ素子のマトリクス駆動装置
TW530287B (en) * 1998-09-03 2003-05-01 Samsung Electronics Co Ltd Display device, and apparatus and method for driving display device
KR100296113B1 (ko) * 1999-06-03 2001-07-12 구본준, 론 위라하디락사 전기발광소자
JP4092857B2 (ja) * 1999-06-17 2008-05-28 ソニー株式会社 画像表示装置
US6760005B2 (en) * 2000-07-25 2004-07-06 Semiconductor Energy Laboratory Co., Ltd. Driver circuit of a display device
SG114502A1 (en) * 2000-10-24 2005-09-28 Semiconductor Energy Lab Light emitting device and method of driving the same
KR100370286B1 (ko) * 2000-12-29 2003-01-29 삼성에스디아이 주식회사 전압구동 유기발광소자의 픽셀회로
JP2002215095A (ja) * 2001-01-22 2002-07-31 Pioneer Electronic Corp 発光ディスプレイの画素駆動回路
JP2002358031A (ja) * 2001-06-01 2002-12-13 Semiconductor Energy Lab Co Ltd 発光装置及びその駆動方法
JP3968499B2 (ja) * 2001-10-17 2007-08-29 ソニー株式会社 表示装置
JP4498669B2 (ja) * 2001-10-30 2010-07-07 株式会社半導体エネルギー研究所 半導体装置、表示装置、及びそれらを具備する電子機器

Also Published As

Publication number Publication date
CN1447302A (zh) 2003-10-08
EP1347436A2 (en) 2003-09-24
KR20030075946A (ko) 2003-09-26
JP2003308045A (ja) 2003-10-31
DE60331020D1 (de) 2010-03-11
KR100649243B1 (ko) 2006-11-24
EP1347436A3 (en) 2005-03-16
JP4657580B2 (ja) 2011-03-23
CN1310202C (zh) 2007-04-11
US7057589B2 (en) 2006-06-06
US20030179164A1 (en) 2003-09-25

Similar Documents

Publication Publication Date Title
EP1347436B1 (en) OLED display device and driving method thereof
US11710455B2 (en) Pixel, organic light emitting display device using the same, and method of driving the organic light emitting display device
KR100768047B1 (ko) 유기발광다이오드 표시소자 및 그의 구동 방법
EP1755104B1 (en) Organic light emitting display (OLED)
EP1646032B1 (en) Pixel circuit for OLED display with self-compensation of the threshold voltage
KR100739318B1 (ko) 화소회로 및 발광 표시장치
US10997925B2 (en) Gate driver and organic light-emitting display device including same
EP1591993B1 (en) Light-emitting display device
KR100637203B1 (ko) 유기 전계발광 표시장치 및 그 동작방법
US9704433B2 (en) Organic light emitting display and method for driving the same
US7358938B2 (en) Circuit and method for driving pixel of organic electroluminescent display
EP3477625A1 (en) Gate driver and electroluminescent display device including the same
EP1465142A1 (en) Light emitting display, display panel, and driving method thereof
JP2005196116A (ja) エレクトロルミネセンス表示装置及びその駆動方法
WO2019186765A1 (ja) 表示装置およびその駆動方法
US11158257B2 (en) Display device and driving method for same
JP2006259737A (ja) 表示装置及びその駆動方法
JP2007128019A (ja) 有機電界発光表示装置及びその駆動方法
KR20090005588A (ko) 발광 표시장치 및 그의 구동방법
KR100600346B1 (ko) 발광 표시장치
US20060001618A1 (en) Demultiplexer, display apparatus using the same, and display panel thereof
US8810488B2 (en) Display device and method for driving the same
JP2005141195A (ja) 画像表示装置及びその駆動方法
KR101352322B1 (ko) 유기발광다이오드 표시소자 및 그의 구동 방법
CN116312344A (zh) 像素电路和像素驱动设备

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT SE SI SK TR

AX Request for extension of the european patent

Extension state: AL LT LV MK RO

17P Request for examination filed

Effective date: 20040728

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT SE SI SK TR

AX Request for extension of the european patent

Extension state: AL LT LV MK RO

AKX Designation fees paid

Designated state(s): DE FR GB

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: SAMSUNG MOBILE DISPLAY CO., LTD.

RTI1 Title (correction)

Free format text: OLED DISPLAY DEVICE AND DRIVING METHOD THEREOF

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REF Corresponds to:

Ref document number: 60331020

Country of ref document: DE

Date of ref document: 20100311

Kind code of ref document: P

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20101021

REG Reference to a national code

Ref country code: DE

Ref legal event code: R082

Ref document number: 60331020

Country of ref document: DE

Representative=s name: SCHIEBER - FARAGO, DE

REG Reference to a national code

Ref country code: FR

Ref legal event code: CA

Effective date: 20121129

Ref country code: FR

Ref legal event code: TP

Owner name: SAMSUNG DISPLAY CO., LTD., KR

Effective date: 20121129

REG Reference to a national code

Ref country code: DE

Ref legal event code: R081

Ref document number: 60331020

Country of ref document: DE

Owner name: SAMSUNG DISPLAY CO., LTD., KR

Free format text: FORMER OWNER: SAMSUNG MOBILE DISPLAY CO. LTD., SUWON, KR

Effective date: 20121123

Ref country code: DE

Ref legal event code: R082

Ref document number: 60331020

Country of ref document: DE

Representative=s name: SCHIEBER - FARAGO, DE

Effective date: 20121123

Ref country code: DE

Ref legal event code: R081

Ref document number: 60331020

Country of ref document: DE

Owner name: SAMSUNG DISPLAY CO., LTD., YONGIN-CITY, KR

Free format text: FORMER OWNER: SAMSUNG MOBILE DISPLAY CO. LTD., SUWON, GYEONGGI, KR

Effective date: 20121123

Ref country code: DE

Ref legal event code: R082

Ref document number: 60331020

Country of ref document: DE

Representative=s name: FARAGO PATENTANWAELTE, DE

Effective date: 20121123

Ref country code: DE

Ref legal event code: R082

Ref document number: 60331020

Country of ref document: DE

Representative=s name: FARAGO PATENTANWALTS- UND RECHTSANWALTSGESELLS, DE

Effective date: 20121123

REG Reference to a national code

Ref country code: GB

Ref legal event code: 732E

Free format text: REGISTERED BETWEEN 20130103 AND 20130109

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 14

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 15

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 16

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20220307

Year of fee payment: 20

Ref country code: DE

Payment date: 20220308

Year of fee payment: 20

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20220316

Year of fee payment: 20

REG Reference to a national code

Ref country code: DE

Ref legal event code: R082

Ref document number: 60331020

Country of ref document: DE

Representative=s name: SCHIEBER - FARAGO PATENTANWAELTE, DE

Ref country code: DE

Ref legal event code: R082

Ref document number: 60331020

Country of ref document: DE

Representative=s name: FARAGO PATENTANWALTSGESELLSCHAFT MBH, DE

REG Reference to a national code

Ref country code: DE

Ref legal event code: R082

Ref document number: 60331020

Country of ref document: DE

Representative=s name: SCHIEBER - FARAGO PATENTANWAELTE, DE

REG Reference to a national code

Ref country code: DE

Ref legal event code: R071

Ref document number: 60331020

Country of ref document: DE

REG Reference to a national code

Ref country code: GB

Ref legal event code: PE20

Expiry date: 20230317

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF EXPIRATION OF PROTECTION

Effective date: 20230317