EP1193656A2 - Schaltungsanordnung zur Erzeugung eines Einschaltsignals für batteriebetriebene Münzprüfer - Google Patents
Schaltungsanordnung zur Erzeugung eines Einschaltsignals für batteriebetriebene Münzprüfer Download PDFInfo
- Publication number
- EP1193656A2 EP1193656A2 EP01250342A EP01250342A EP1193656A2 EP 1193656 A2 EP1193656 A2 EP 1193656A2 EP 01250342 A EP01250342 A EP 01250342A EP 01250342 A EP01250342 A EP 01250342A EP 1193656 A2 EP1193656 A2 EP 1193656A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- oscillator
- coin
- switching element
- circuit arrangement
- arrangement according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07D—HANDLING OF COINS OR VALUABLE PAPERS, e.g. TESTING, SORTING BY DENOMINATIONS, COUNTING, DISPENSING, CHANGING OR DEPOSITING
- G07D5/00—Testing specially adapted to determine the identity or genuineness of coins, e.g. for segregating coins which are unacceptable or alien to a currency
- G07D5/08—Testing the magnetic or electric properties
Definitions
- the invention relates to a circuit arrangement for Generation of a switch-on signal for battery-operated Coin validator according to the preamble of the main claim.
- An electrical switch-on sensor is known from EP 0 607 624 B1 known for battery operated coin validators, who uses an oscillator. About a first transistor connected to the oscillator in Emitter sequencing becomes first over first Resistor discharge capacitor periodically like this charged that the first transistor when reducing the oscillator voltage becomes dead. About the first Transistor becomes a second battery voltage Transistor driven, the switch-on signal generated. The oscillator voltage breaks down when a coin is inserted into the coin validator while damping the coil of the oscillator.
- the invention has for its object a circuit arrangement to generate a switch-on signal according to the preamble of the main claim create that always ensures a stable working point and with all component tolerances be balanced.
- the special training of the Colpitts transistor ensures low power consumption and the provision of the constant current source gives a stable working point over the whole Temperature range compensation of component tolerances and a compensation for unwanted interference through metal objects in the coin validator. Farther becomes a more stable through the constant current source Switching point for the output transistor supplied, whereby the effect of fluctuations in switching thresholds of the integrated circuits used, the between 30% and 50%, are suppressed.
- the circuit arrangement shown in the figure serves to switch on a battery-operated electronic Coin validator, whereby one of the Circuit arrangement generated electronic switch-on signal Circuits of the coin validator, such as electronic Test facilities are supplied with voltage.
- One essential requirement for the presented Circuit arrangement is that they are at rest Condition and also in the operating state a slight Has electricity requirements.
- the circuit arrangement essentially consists of a Colpitts oscillator 1, a first circuit 2 for setting the operating point of the oscillator 1 in the idle state of the coin validator, a second one Circuit 3 for driving a first electronic Switching element Q4, the output of the circuit arrangement represents and when inserting a coin a switch-on signal for the electronic circuits of the Coin validator.
- the Colpitts oscillator 1 consists in a known manner of a capacitive voltage divider C3, C4, which determines the fraction of the coupled voltage.
- the series connection of the capacitors C3, C4 acts as a resonant circuit capacitance.
- the coil L1 of the Colpitts oscillator is connected to the connections of the capacitors C3, C4 and its inductance, together with the capacitors C3, C4, determines the resonance frequency.
- the Colpitts oscillator has two MOS field-effect transistors Q3, Q5, the drain electrodes of which are connected to one another and form the output of the oscillator 1, the gate electrodes of which are connected to the live connection of the capacitor C3 and the source electrodes of which are on the one hand a resistor R2 to the battery voltage U Batt and on the other hand via a resistor R6 to ground or GND.
- a capacitor C2 is connected in parallel with the resistor R6, which ensures that the negative feedback for the AC voltage (R6) goes to zero.
- the substrate of the field effect transistor Q3 is connected to the battery voltage, while the substrate of the field effect transistor Q5 is connected to ground.
- the resistors R2 and R6 preferably have the same resistance value and the FETS Q3, Q4 are also identical.
- the Colpitts oscillator is designed so that the current consumption does not exceed 10 ⁇ A.
- Current consumption is essentially determined by the quiescent current flowing through transistors Q3 and Q5.
- the two resistors R2 and R6 and the switching thresholds of the transistors Q3 and Q5 are decisive for the quiescent current.
- the circuit for setting the operating point of the Oscillator 1 in the idle state of the coin validator has a transistor Q1, the pnp transistor is trained on.
- the emitter of transistor Q1 is connected to battery voltage during the Collector connected to the source of the FET Q3 is.
- the base of transistor Q1 as a control electrode is present on the one hand via a capacitor C1 the battery voltage and on the other hand is about one Resistor R3, which is used to set the base current serves, connected to a resistor R1, the Resistor R1 with its other terminal as well is due to battery voltage.
- the resistance value of R1 is much larger than that of R3.
- the second circuit 3 for driving the electronic Switching element Q4 has a diode D1, preferably a Schottky diode, the anode of which the output of the oscillator 1 and its cathode is connected to the gate terminal of a MOS-FET Q2.
- a resistor R4 is connected in parallel with the diode D1.
- the Source of FET Q2 is at the connection point between resistor R3 and resistor R1 of the first circuit 2 connected and the drain electrode is connected to a resistor R5 as well to the gate terminal of the MOS-FET electronic switching element Q4 connected.
- the other terminal of resistor R5 lies on ground.
- the MOS-FET Q2 substrate is on the battery voltage connected.
- the source electrode of the FET Q4 forms the output for the switch-on signal and the drain electrode and the substrate lie on ground.
- the functioning of the circuit arrangement shown in the figure is as follows. If the circuit arrangement is connected to voltage, ie to battery voltage, the operating point of oscillator 1 is centered on the operating voltage, ie battery voltage, and results from the two identical resistors R2 and R6. At its output, the oscillator supplies an alternating voltage superimposed with the direct voltage U Batt / 2, which is rectified via the diode D1, as a result of which a direct voltage potential of approximately U Batt / 2 plus U ⁇ peak is present at the gate electrode of the subsequent MOS transistor Q2 , Since this DC voltage is significantly below the operating voltage, the MOS transistor Q2 becomes conductive, as a result of which a voltage drop occurs across the resistor R1 and across the resistor R5.
- the capacitor C1 charges and as soon as its voltage is the switching threshold of transistor Q1 the latter becomes the leader.
- This will the operating point of the oscillator 1 is adjusted, i.e. the operating point is shifted towards the battery voltage.
- MOS transistor Q2 partially blocks, i.e. the Drain source resistance changes and thus decreases also the voltage drop across R1 decreases until a Voltage value of approx. 500 mV set on resistor R1 has that of the emitter base voltage of the transistor Q1 corresponds.
- the MOS-FET Q2 is now working as a constant current source, the current over the Resistor R1, MOS-FET Q2 and resistor R5 by R1 or by the emitter base voltage of the Transistor Q1 is determined. There is resistance R5 dimensioned so that the voltage drop on the resistor R5 the switching threshold of the MOS transistor Does not exceed Q4.
- the circuits 2 and 3 work as a controller that ensures that the Current through R1 and R5 remains constant.
- the state set in this way is the idle state of the Circuit arrangement, i.e. the coin validator is on hold and waits for a coin to be inserted.
- the circuit arrangement makes a stable operating point guaranteed in this condition, with all Component tolerances are balanced.
- the circuit parameters of the circuit arrangement are dimensioned so that the voltage change occurs relatively quickly at transistor Q2. This is necessary so that the capacitor C1 the voltage holds for the transistor Q1 and does not discharge.
- the capacitor C1 thus prevents the operating point of the oscillator 1 through the transistor Q1 adjusts, i.e. through the capacitor C1 is a spontaneous readjustment prevented, otherwise none Output signal from transistor Q4 would be generated.
- the oscillator takes again its stable operating point and the MOS transistor Q2 again acts as a constant current source.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Testing Of Coins (AREA)
- Dc-Dc Converters (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
- Keying Circuit Devices (AREA)
- Electronic Switches (AREA)
- Transmitters (AREA)
Abstract
Description
Claims (13)
- Schaltungsanordnung zur Erzeugung eines Einschaltsignals für batteriebetriebene Münzprüfer mit einem eine Spule zur Erfassung des Einwerfens einer Münze aufweisenden Oszillator, dessen Ausgangssignal sich durch die Münze ändert, und mit einem ersten elektronischen Schaltelement, das bei Einwurf der Münze durch Änderung seiner Steuerspannung das Einschaltsignal abgibt, dadurch gekennzeichnet, daß ein erster Schaltkreis (2) zum Einstellen des Arbeitspunktes des Oszillators (1) im ruhenden Zustand des Münzprüfers und ein zweiter, mit dem Ausgang des Oszillators verbundener, ein zweites elektronisches Schaltelement (Q2) aufweisender Schaltkreis (3) vorgesehen sind, wobei der erste und zweite Schaltkreis (2, 3) so miteinander verbunden sind, daß das zweite Schaltelement (Q2) im ruhenden Zustand des Münzprüfers als Konstant-Stromquelle wirkt, und daß bei Einwurf einer Münze der Strom durch das zweite Schaltelemente (Q2) sich abhängig von der Ausgangsspannung des Oszillators (1) derart ändert, daß das erste, mit dem zweiten Schaltelement (Q2) verbundene Schaltelement (Q4) schaltet und das Einschaltsignal liefert.
- Schaltungsanordnung nach Anspruch 1, dadurch gekennzeichnet, daß die Steuerelektrode des zweiten Schaltelementes (Q2) über eine Diode (D1) an den Ausgang des Oszillators (1) geschaltet ist.
- Schaltungsanordnung nach Anspruch 2, dadurch gekennzeichnet, daß die Diode (D1) so bemessen ist, daß sie bei Änderung der Ausgangsspannung des Oszillators (1) durch Anwesenheit einer Münze sperrt.
- Schaltungsanordnung nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß der erste Schaltkreis (2) einen Transistor aufweist, über den die Arbeitspunkteinstellung des Oszillators (1) für den ruhenden Zustand des Münzprüfers aktivierbar ist.
- Schaltungsanordnung nach Anspruch 4, dadurch gekennzeichnet, daß der Transistor (Q1) nach Anlegen der Batteriespannung geschaltet wird, wobei die über die Diode (D1) am Ausgang des Oszillators liegende Steuerelektrode des zweiten Schaltelementes (Q2) dieses leitend steuert, und der Transistor (Q1) aufgrund des dadurch fließenden Stroms schaltet.
- Schaltungsanordnung nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, daß der erste Schaltkreis (2) eine mit der Steuerelektrode des Transistors (Q1) verbundene und an die Batteriespannung angeschlossene Parallelschaltung eines Kondensators (C1) und eines Widerstandes (R1) aufweist.
- Schaltungsanordnung nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet, daß bei nicht aktiviertem ersten Schaltkreis (2) der Arbeitspunkt des Oszillators (1) mittig zur Batteriespannung liegt.
- Schaltungsanordnung nach einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, daß in Reihe zur Schaltstrecke des zweiten Schaltelementes (Q2) ein die Schaltschwelle des ersten Schaltelementes (Q4) vorgebender Widerstand geschaltet ist.
- Schaltungsanordnung nach einem der Ansprüche 1 bis 8, dadurch gekennzeichnet, daß in Reihe mit der Schaltstrecke des zweiten Schaltelementes (Q2) die Parallelschaltung aus Kondensator (C1) und Widerstand (R1) des ersten Schaltkreises (2) geschaltet ist.
- Schaltungsanordnung nach einem der Ansprüche 1 bis 9, dadurch gekennzeichnet, daß das erste und/oder zweite Schaltelement (Q2, Q4) als Feldeffekttransistor vorzugsweise als MOS-Feldeffekttransistor ausgebildet sind.
- Schaltungsanordnung nach einem der Ansprüche 1 bis 10, dadurch gekennzeichnet, daß der Oszillator ein Colpitts-Oszillator ist.
- Schaltungsanordnung nach einem der Ansprüche 1 bis 11, dadurch gekennzeichnet, daß parallel zur Diode (D1) ein Widerstand (R4) geschaltet ist, über den die Kapazität der Steuerelektrode des zweiten Schaltelementes (Q2) bei Sperren der Diode (D1) entladbar ist.
- Schaltungsanordnung nach einem der Ansprüche 1 bis 12, dadurch gekennzeichnet, daß der Kondensator (C1) des ersten Schaltkreises (1) so bemessen ist, daß bei Einwurf einer Münze und resultierender Spannungsänderung am zweiten Schaltelement (Q2) eine Nachstellung des Arbeitspunktes des Oszillators (1) über einen bestimmten Zeitraum verhindert wird.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10049758A DE10049758B4 (de) | 2000-09-29 | 2000-09-29 | Schaltungsanordnung zur Erzeugung eines Einschaltsignals für batteriebetriebene Münzprüfer |
DE10049758 | 2000-09-29 |
Publications (3)
Publication Number | Publication Date |
---|---|
EP1193656A2 true EP1193656A2 (de) | 2002-04-03 |
EP1193656A3 EP1193656A3 (de) | 2005-02-02 |
EP1193656B1 EP1193656B1 (de) | 2007-12-12 |
Family
ID=7659030
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP01250342A Expired - Lifetime EP1193656B1 (de) | 2000-09-29 | 2001-09-27 | Schaltungsanordnung zur Erzeugung eines Einschaltsignals für batteriebetriebene Münzprüfer |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1193656B1 (de) |
AT (1) | ATE381147T1 (de) |
DE (2) | DE10049758B4 (de) |
ES (1) | ES2296704T3 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8532710B2 (en) | 2006-09-01 | 2013-09-10 | Blackberry Limited | Integrated dialing |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0607624B1 (de) | 1993-01-21 | 1996-02-07 | National Rejectors Inc. GmbH | Elektrischer Einschaltsensor für batteriebetriebene Münzprüfer |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3581105A (en) * | 1968-09-23 | 1971-05-25 | Bell & Howell Co | Switching apparatus |
US4105105A (en) * | 1975-10-17 | 1978-08-08 | Libandor Trading Corporation Inc. | Method for checking coins and coin checking apparatus for the performance of the aforesaid method |
GB2011086A (en) * | 1977-10-13 | 1979-07-04 | Skf Uk Ltd | Improvements in or relating to inductive proximity detectors |
CH676147A5 (de) * | 1988-06-17 | 1990-12-14 | Vibro Meter Ag | |
ATE135860T1 (de) * | 1989-05-19 | 1996-04-15 | Festo Kg | Temperaturstabiler induktiver näherungsschalter |
CH690950A5 (de) * | 1996-06-13 | 2001-02-28 | Optosys Ag | Temperaturstabilisierter Oszillator und Verwendung desselben in einem Näherungsschalter. |
-
2000
- 2000-09-29 DE DE10049758A patent/DE10049758B4/de not_active Expired - Fee Related
-
2001
- 2001-09-27 ES ES01250342T patent/ES2296704T3/es not_active Expired - Lifetime
- 2001-09-27 AT AT01250342T patent/ATE381147T1/de not_active IP Right Cessation
- 2001-09-27 EP EP01250342A patent/EP1193656B1/de not_active Expired - Lifetime
- 2001-09-27 DE DE50113361T patent/DE50113361D1/de not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0607624B1 (de) | 1993-01-21 | 1996-02-07 | National Rejectors Inc. GmbH | Elektrischer Einschaltsensor für batteriebetriebene Münzprüfer |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8532710B2 (en) | 2006-09-01 | 2013-09-10 | Blackberry Limited | Integrated dialing |
Also Published As
Publication number | Publication date |
---|---|
EP1193656B1 (de) | 2007-12-12 |
DE10049758A1 (de) | 2002-04-18 |
ES2296704T3 (es) | 2008-05-01 |
DE50113361D1 (de) | 2008-01-24 |
DE10049758B4 (de) | 2004-07-22 |
ATE381147T1 (de) | 2007-12-15 |
EP1193656A3 (de) | 2005-02-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE602005005822T2 (de) | Schaltkreis und adaptives Verfahren zum Antrieb einer Halbbrückenschaltung | |
DE19750168B4 (de) | Drei Spannungsversorgungen für Treiberschaltungen von Leistungs-Halbleiterschaltern | |
EP0498917B1 (de) | Taktgesteuerter Umrichter mit Strombegrenzung | |
DE19983230B4 (de) | Dynamische Sollwertumschaltung | |
DE102004031369A1 (de) | Gatetreiberschaltkreis | |
DE102004018823B3 (de) | Schaltungsanordnung mit einem Leistungstransistor und einer Ansteuerschaltung für den Leistungstransistor | |
EP0660977A1 (de) | Rückspeisungsfester synchron-gleichrichter | |
DE102007020999A1 (de) | Ladungspumpe zur Erzeugung einer Eingangsspannung für einen Operationsverstärker | |
EP0639308B1 (de) | Schaltungsanordnung zum ansteuern eines mos-feldeffekttransistors | |
DE3024936A1 (de) | Wechselspannungsverstaerker in form einer integrierten schaltung | |
CH623420A5 (de) | ||
DE102009036623B4 (de) | Triggerschaltung und Gleichrichter, insbesondere für ein einen piezoelektrischen Mikrogenerator aufweisendes, energieautarkes Mikrosystem | |
DE69728134T2 (de) | Steuerschaltung für die Strom-Schalt-Flanken eines Leistungstransistors | |
DE10240167B4 (de) | Schaltungsanordnung mit einem Leistungstransistor und einer Ansteuerschaltung für den Leistungstransistor | |
DE60316105T2 (de) | Ansteuerschaltung für einen Steueranschluss eines Bipolartransistors mit geschaltetem und einer resonanten Last | |
DE3136300C2 (de) | ||
DE10049758B4 (de) | Schaltungsanordnung zur Erzeugung eines Einschaltsignals für batteriebetriebene Münzprüfer | |
DE19918041B4 (de) | Schaltnetzteil und Verfahren zur Ansteuerung eines Schalters in einem Schaltnetzteil | |
DE4410819A1 (de) | Schaltungsanordnung für den Betrieb eines Relais | |
EP0862271A2 (de) | Komparatorschaltung | |
DE102014108775B4 (de) | Tiefsetzer sowie LED-Einrichtung, insbesondere LED-Scheinwerfer oder LED-Signallicht, mit einem solchen Tiefsetzer | |
EP0992114B1 (de) | Ansteuerschaltung für ein steuerbares halbleiterbauelement | |
EP0607624B1 (de) | Elektrischer Einschaltsensor für batteriebetriebene Münzprüfer | |
DE10048592B4 (de) | Verpolschutzschaltung | |
DE19848829C2 (de) | Schaltungsanordnung zur Einstellung der Abschaltflanke eines Laststromes |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR |
|
AX | Request for extension of the european patent |
Free format text: AL;LT;LV;MK;RO;SI |
|
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: WALTER HANKEMECHANISCHE WERKSTAETTEN GMBH & CO. |
|
PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
|
AK | Designated contracting states |
Kind code of ref document: A3 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR |
|
AX | Request for extension of the european patent |
Extension state: AL LT LV MK RO SI |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: 7H 03K 17/95 A Ipc: 7G 07D 5/00 B |
|
17P | Request for examination filed |
Effective date: 20050706 |
|
AKX | Designation fees paid |
Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR |
|
GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
|
GRAS | Grant fee paid |
Free format text: ORIGINAL CODE: EPIDOSNIGR3 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: FG4D Free format text: NOT ENGLISH |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: EP |
|
GBT | Gb: translation of ep patent filed (gb section 77(6)(a)/1977) |
Effective date: 20071212 |
|
REG | Reference to a national code |
Ref country code: IE Ref legal event code: FG4D Free format text: LANGUAGE OF EP DOCUMENT: GERMAN |
|
REF | Corresponds to: |
Ref document number: 50113361 Country of ref document: DE Date of ref document: 20080124 Kind code of ref document: P |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: SE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20080312 |
|
REG | Reference to a national code |
Ref country code: ES Ref legal event code: FG2A Ref document number: 2296704 Country of ref document: ES Kind code of ref document: T3 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20071212 Ref country code: NL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20071212 |
|
NLV1 | Nl: lapsed or annulled due to failure to fulfill the requirements of art. 29p and 29m of the patents act | ||
EN | Fr: translation not filed | ||
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: PT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20080512 |
|
REG | Reference to a national code |
Ref country code: IE Ref legal event code: FD4D |
|
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20071212 Ref country code: FR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20080926 Ref country code: IE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20071212 |
|
26N | No opposition filed |
Effective date: 20080915 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20080313 |
|
BERE | Be: lapsed |
Owner name: WALTER HANKE MECHANISCHE WERKSTATTEN G.M.B.H. & C Effective date: 20080930 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: MC Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20080930 |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: PL |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: BE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20080930 Ref country code: CY Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20071212 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: CH Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20080930 Ref country code: LI Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20080930 Ref country code: AT Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20080927 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LU Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20080927 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: TR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20071212 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20190905 Year of fee payment: 19 Ref country code: IT Payment date: 20190925 Year of fee payment: 19 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: GB Payment date: 20190920 Year of fee payment: 19 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: ES Payment date: 20191022 Year of fee payment: 19 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R119 Ref document number: 50113361 Country of ref document: DE |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20200927 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20210401 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20200927 |
|
REG | Reference to a national code |
Ref country code: ES Ref legal event code: FD2A Effective date: 20220118 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IT Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20200927 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: ES Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20200928 |