EP1193656A2 - Switching circuit for generating a switch-on signal for battery-powered coin testers - Google Patents

Switching circuit for generating a switch-on signal for battery-powered coin testers Download PDF

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Publication number
EP1193656A2
EP1193656A2 EP01250342A EP01250342A EP1193656A2 EP 1193656 A2 EP1193656 A2 EP 1193656A2 EP 01250342 A EP01250342 A EP 01250342A EP 01250342 A EP01250342 A EP 01250342A EP 1193656 A2 EP1193656 A2 EP 1193656A2
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EP
European Patent Office
Prior art keywords
oscillator
coin
switching element
circuit arrangement
arrangement according
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Application number
EP01250342A
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German (de)
French (fr)
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EP1193656B1 (en
EP1193656A3 (en
Inventor
Bernd Rothe
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Walter Hanke Mechanische Werkstaetten GmbH and Co KG
Original Assignee
TRENNER D WH MUENZPRUEFER
Wh Muenzpruefer Dietmar Trenner GmbH
Walter Hanke Mechanische Werkstaetten GmbH and Co KG
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Publication of EP1193656A3 publication Critical patent/EP1193656A3/en
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    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07D—HANDLING OF COINS OR VALUABLE PAPERS, e.g. TESTING, SORTING BY DENOMINATIONS, COUNTING, DISPENSING, CHANGING OR DEPOSITING
    • G07D5/00—Testing specially adapted to determine the identity or genuineness of coins, e.g. for segregating coins which are unacceptable or alien to a currency
    • G07D5/08—Testing the magnetic or electric properties

Definitions

  • the invention relates to a circuit arrangement for Generation of a switch-on signal for battery-operated Coin validator according to the preamble of the main claim.
  • An electrical switch-on sensor is known from EP 0 607 624 B1 known for battery operated coin validators, who uses an oscillator. About a first transistor connected to the oscillator in Emitter sequencing becomes first over first Resistor discharge capacitor periodically like this charged that the first transistor when reducing the oscillator voltage becomes dead. About the first Transistor becomes a second battery voltage Transistor driven, the switch-on signal generated. The oscillator voltage breaks down when a coin is inserted into the coin validator while damping the coil of the oscillator.
  • the invention has for its object a circuit arrangement to generate a switch-on signal according to the preamble of the main claim create that always ensures a stable working point and with all component tolerances be balanced.
  • the special training of the Colpitts transistor ensures low power consumption and the provision of the constant current source gives a stable working point over the whole Temperature range compensation of component tolerances and a compensation for unwanted interference through metal objects in the coin validator. Farther becomes a more stable through the constant current source Switching point for the output transistor supplied, whereby the effect of fluctuations in switching thresholds of the integrated circuits used, the between 30% and 50%, are suppressed.
  • the circuit arrangement shown in the figure serves to switch on a battery-operated electronic Coin validator, whereby one of the Circuit arrangement generated electronic switch-on signal Circuits of the coin validator, such as electronic Test facilities are supplied with voltage.
  • One essential requirement for the presented Circuit arrangement is that they are at rest Condition and also in the operating state a slight Has electricity requirements.
  • the circuit arrangement essentially consists of a Colpitts oscillator 1, a first circuit 2 for setting the operating point of the oscillator 1 in the idle state of the coin validator, a second one Circuit 3 for driving a first electronic Switching element Q4, the output of the circuit arrangement represents and when inserting a coin a switch-on signal for the electronic circuits of the Coin validator.
  • the Colpitts oscillator 1 consists in a known manner of a capacitive voltage divider C3, C4, which determines the fraction of the coupled voltage.
  • the series connection of the capacitors C3, C4 acts as a resonant circuit capacitance.
  • the coil L1 of the Colpitts oscillator is connected to the connections of the capacitors C3, C4 and its inductance, together with the capacitors C3, C4, determines the resonance frequency.
  • the Colpitts oscillator has two MOS field-effect transistors Q3, Q5, the drain electrodes of which are connected to one another and form the output of the oscillator 1, the gate electrodes of which are connected to the live connection of the capacitor C3 and the source electrodes of which are on the one hand a resistor R2 to the battery voltage U Batt and on the other hand via a resistor R6 to ground or GND.
  • a capacitor C2 is connected in parallel with the resistor R6, which ensures that the negative feedback for the AC voltage (R6) goes to zero.
  • the substrate of the field effect transistor Q3 is connected to the battery voltage, while the substrate of the field effect transistor Q5 is connected to ground.
  • the resistors R2 and R6 preferably have the same resistance value and the FETS Q3, Q4 are also identical.
  • the Colpitts oscillator is designed so that the current consumption does not exceed 10 ⁇ A.
  • Current consumption is essentially determined by the quiescent current flowing through transistors Q3 and Q5.
  • the two resistors R2 and R6 and the switching thresholds of the transistors Q3 and Q5 are decisive for the quiescent current.
  • the circuit for setting the operating point of the Oscillator 1 in the idle state of the coin validator has a transistor Q1, the pnp transistor is trained on.
  • the emitter of transistor Q1 is connected to battery voltage during the Collector connected to the source of the FET Q3 is.
  • the base of transistor Q1 as a control electrode is present on the one hand via a capacitor C1 the battery voltage and on the other hand is about one Resistor R3, which is used to set the base current serves, connected to a resistor R1, the Resistor R1 with its other terminal as well is due to battery voltage.
  • the resistance value of R1 is much larger than that of R3.
  • the second circuit 3 for driving the electronic Switching element Q4 has a diode D1, preferably a Schottky diode, the anode of which the output of the oscillator 1 and its cathode is connected to the gate terminal of a MOS-FET Q2.
  • a resistor R4 is connected in parallel with the diode D1.
  • the Source of FET Q2 is at the connection point between resistor R3 and resistor R1 of the first circuit 2 connected and the drain electrode is connected to a resistor R5 as well to the gate terminal of the MOS-FET electronic switching element Q4 connected.
  • the other terminal of resistor R5 lies on ground.
  • the MOS-FET Q2 substrate is on the battery voltage connected.
  • the source electrode of the FET Q4 forms the output for the switch-on signal and the drain electrode and the substrate lie on ground.
  • the functioning of the circuit arrangement shown in the figure is as follows. If the circuit arrangement is connected to voltage, ie to battery voltage, the operating point of oscillator 1 is centered on the operating voltage, ie battery voltage, and results from the two identical resistors R2 and R6. At its output, the oscillator supplies an alternating voltage superimposed with the direct voltage U Batt / 2, which is rectified via the diode D1, as a result of which a direct voltage potential of approximately U Batt / 2 plus U ⁇ peak is present at the gate electrode of the subsequent MOS transistor Q2 , Since this DC voltage is significantly below the operating voltage, the MOS transistor Q2 becomes conductive, as a result of which a voltage drop occurs across the resistor R1 and across the resistor R5.
  • the capacitor C1 charges and as soon as its voltage is the switching threshold of transistor Q1 the latter becomes the leader.
  • This will the operating point of the oscillator 1 is adjusted, i.e. the operating point is shifted towards the battery voltage.
  • MOS transistor Q2 partially blocks, i.e. the Drain source resistance changes and thus decreases also the voltage drop across R1 decreases until a Voltage value of approx. 500 mV set on resistor R1 has that of the emitter base voltage of the transistor Q1 corresponds.
  • the MOS-FET Q2 is now working as a constant current source, the current over the Resistor R1, MOS-FET Q2 and resistor R5 by R1 or by the emitter base voltage of the Transistor Q1 is determined. There is resistance R5 dimensioned so that the voltage drop on the resistor R5 the switching threshold of the MOS transistor Does not exceed Q4.
  • the circuits 2 and 3 work as a controller that ensures that the Current through R1 and R5 remains constant.
  • the state set in this way is the idle state of the Circuit arrangement, i.e. the coin validator is on hold and waits for a coin to be inserted.
  • the circuit arrangement makes a stable operating point guaranteed in this condition, with all Component tolerances are balanced.
  • the circuit parameters of the circuit arrangement are dimensioned so that the voltage change occurs relatively quickly at transistor Q2. This is necessary so that the capacitor C1 the voltage holds for the transistor Q1 and does not discharge.
  • the capacitor C1 thus prevents the operating point of the oscillator 1 through the transistor Q1 adjusts, i.e. through the capacitor C1 is a spontaneous readjustment prevented, otherwise none Output signal from transistor Q4 would be generated.
  • the oscillator takes again its stable operating point and the MOS transistor Q2 again acts as a constant current source.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
  • Testing Of Coins (AREA)
  • Keying Circuit Devices (AREA)
  • Electronic Switches (AREA)
  • Transmitters (AREA)
  • Dc-Dc Converters (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The circuit has an oscillator with a detection coil and a first switch element that outputs the control signal when the coin is inserted. A first stage sets the oscillator working point in the rest state. A second stage has a switch element that acts as a constant current source in the rest state. Its current changes when a coin is inserted depending on oscillator output voltage so the first switch element switches and outputs a switch-on signal. The circuit has an oscillator (1) with a coil for detection coin insertion whose output signal is changed by the coin and a first electronic switch element (Q4) that outputs the control signal when the coin is inserted by changing its control voltage. A first stage (2) sets the oscillator working point in the rest state. A second stage (3) connected to the oscillator output has a second electronic switch element (Q2) and is connected to the first stage so that the second switch element acts as a constant current source in the rest state. The current in the switch element changes when a coin is inserted depending on the oscillator output voltage so that the first switch element switches and delivers the switch-on signal.

Description

Die Erfindung betrifft eine Schaltungsanordnung zur Erzeugung eines Einschaltsignals für batteriebetriebene Münzprüfer nach dem Oberbegriff des Hauptanspruchs.The invention relates to a circuit arrangement for Generation of a switch-on signal for battery-operated Coin validator according to the preamble of the main claim.

Aus der EP 0 607 624 B1 ist ein elektrischer Einschaltsensor für batteriebetriebene Münzprüfer bekannt, der einen Oszillator verwendet. Über einen ersten, an den Oszillator angeschlossenen Transistor in Emitterfolgeschaltung wird ein erster über einen ersten Widerstand entladbarer Kondensator periodisch so aufgeladen, daß der erste Transistor bei Verringerung der Oszillatorspannung stromlos wird. Über den ersten Transistor wird ein zweiter an Batteriespannung liegender Transistor angesteuert, der ein Einschaltsignal erzeugt. Die Oszillatorspannung bricht zusammen, wenn eine Münze in den Münzprüfer eingeworfen wird und dabei die Spule des Oszillator gedämpft wird.An electrical switch-on sensor is known from EP 0 607 624 B1 known for battery operated coin validators, who uses an oscillator. About a first transistor connected to the oscillator in Emitter sequencing becomes first over first Resistor discharge capacitor periodically like this charged that the first transistor when reducing the oscillator voltage becomes dead. About the first Transistor becomes a second battery voltage Transistor driven, the switch-on signal generated. The oscillator voltage breaks down when a coin is inserted into the coin validator while damping the coil of the oscillator.

Der Erfindung liegt die Aufgabe zugrunde, eine Schaltungsanordnung zur Erzeugung eines Einschaltsignals entsprechend dem Oberbegriff des Hauptanspruchs zu schaffen, die immer einen stabilen Arbeitspunkt gewährleistet und bei der alle Bauelementetoleranzen ausgeglichen werden.The invention has for its object a circuit arrangement to generate a switch-on signal according to the preamble of the main claim create that always ensures a stable working point and with all component tolerances be balanced.

Diese Aufgabe wird erfindungsgemäß durch die kennzeichnenden Merkmale des Hauptanspruchs gelöst.This object is achieved by the characterizing Features of the main claim solved.

Einerseits wird durch die besondere Ausbildung des Colpitts-Transistors ein niedriger Stromverbrauch gewährleistet und das Vorsehen der Konstantstromquelle ergibt einen stabilen Arbeitspunkt über den gesamten Temperaturbereich einen Ausgleich der Bauteiletoleranzen und einen Ausgleich von ungewollter Beeinflussung durch Metallgegenstände im Münzprüfer. Weiterhin wird durch die Konstantstromquelle ein stabiler Schaltpunkt für den Ausgangstransistor geliefert, wodurch die Wirkung von Schwankungen der Schaltschwellen der verwendeten integrierten Schaltkreise, die zwischen 30% und 50% liegen, unterdrückt werden.On the one hand, the special training of the Colpitts transistor ensures low power consumption and the provision of the constant current source gives a stable working point over the whole Temperature range compensation of component tolerances and a compensation for unwanted interference through metal objects in the coin validator. Farther becomes a more stable through the constant current source Switching point for the output transistor supplied, whereby the effect of fluctuations in switching thresholds of the integrated circuits used, the between 30% and 50%, are suppressed.

Durch die in den Unteransprüchen angegebenen Maßnahmen sind vorteilhafte Weiterbildungen und Verbesserungen möglich.By the measures specified in the subclaims are advantageous further developments and improvements possible.

Ein Ausführungsbeispiel der Erfindung ist in der Zeichnung dargestellt und wird in der nachfolgenden Beschreibung näher erläutert.An embodiment of the invention is in the Drawing shown and is in the following Description explained in more detail.

Die einzige Figur zeigt eine schaltungsgemäße Ausgestaltung der erfindungsgemäßen Schaltungsanordnung. The only figure shows an embodiment in accordance with the circuit the circuit arrangement according to the invention.

Die in der Figur dargestellte Schaltungsanordnung dient zum Einschalten eines batteriebetriebenen elektronischen Münzprüfers, wobei mittels eines von der Schaltungsanordnung erzeugten Einschaltsignals elektronische Schaltkreise des Münzprüfers, wie elektronische Prüfeinrichtungen mit Spannung versorgt werden. Eine wesentliche Anforderung an die dargestellte Schaltungsanordnung besteht darin, daß sie im ruhenden Zustand und auch im Betriebszustand einen geringen Strombedarf aufweist.The circuit arrangement shown in the figure serves to switch on a battery-operated electronic Coin validator, whereby one of the Circuit arrangement generated electronic switch-on signal Circuits of the coin validator, such as electronic Test facilities are supplied with voltage. An essential requirement for the presented Circuit arrangement is that they are at rest Condition and also in the operating state a slight Has electricity requirements.

Die Schaltungsanordnung besteht im Wesentlichen aus einem Colpitts-Oszillator 1, einem ersten Schaltkreis 2 zum Einstellen des Arbeitspunktes des Oszillators 1 im ruhenden Zustand des Münzprüfers, einem zweiten Schaltkreis 3 zum Ansteuern eines ersten elektronischen Schaltelementes Q4, das den Ausgang der Schaltungsanordnung darstellt und bei Einwurf einer Münze ein Einschaltsignal für die elektronischen Kreise des Münzprüfers abgibt.The circuit arrangement essentially consists of a Colpitts oscillator 1, a first circuit 2 for setting the operating point of the oscillator 1 in the idle state of the coin validator, a second one Circuit 3 for driving a first electronic Switching element Q4, the output of the circuit arrangement represents and when inserting a coin a switch-on signal for the electronic circuits of the Coin validator.

Der Colpitts-Oszillator 1 besteht in bekannter Weise aus einem kapazitiven Spannungsteiler C3, C4, der den Bruchteil der mitgekoppelten Spannung bestimmt. Dabei wirkt die Reihenschaltung der Kondensatoren C3, C4 als Schwingkreiskapazität. Die Spule L1 des Colpitts-Oszillators ist mit den Anschlüssen der Kondensatoren C3, C4 verbunden und ihre Induktivität bestimmt zusammen mit den Kondensatoren C3, C4 die Resonanzfrequenz. Weiterhin weist der Colpitts-Oszillator zwei MOS-Feldeffekttransistoren Q3, Q5 auf, deren Drain-Elektroden miteinander verbunden sind und den Ausgang des Oszillators 1 bilden, deren Gate-Elektroden gemeinsam an dem spannungsführenden Anschluß des Kondensators C3 liegen und deren Source-Elektroden einerseits über einen Widerstand R2 an die Batteriespannung UBatt und andererseits über einen Widerstand R6 an Masse oder GND, angeschlossen sind. Parallel zum Widerstand R6 ist ein Kondensator C2 geschaltet, der dafür sorgt, daß die Gegenkopplung für die Wechselspannung (R6) gegen Null geht. Das Substrat des Feldeffekttransistors Q3 liegt an Batteriespannung, während das Substrat des Feldeffekttransistors Q5 auf Masse liegt. Die Widerstände R2 und R6 haben vorzugsweise den gleichen Widerstandswert und auch die FETS Q3, Q4 sind identisch.The Colpitts oscillator 1 consists in a known manner of a capacitive voltage divider C3, C4, which determines the fraction of the coupled voltage. The series connection of the capacitors C3, C4 acts as a resonant circuit capacitance. The coil L1 of the Colpitts oscillator is connected to the connections of the capacitors C3, C4 and its inductance, together with the capacitors C3, C4, determines the resonance frequency. Furthermore, the Colpitts oscillator has two MOS field-effect transistors Q3, Q5, the drain electrodes of which are connected to one another and form the output of the oscillator 1, the gate electrodes of which are connected to the live connection of the capacitor C3 and the source electrodes of which are on the one hand a resistor R2 to the battery voltage U Batt and on the other hand via a resistor R6 to ground or GND. A capacitor C2 is connected in parallel with the resistor R6, which ensures that the negative feedback for the AC voltage (R6) goes to zero. The substrate of the field effect transistor Q3 is connected to the battery voltage, while the substrate of the field effect transistor Q5 is connected to ground. The resistors R2 and R6 preferably have the same resistance value and the FETS Q3, Q4 are also identical.

Der Colpitts-Oszillator ist so ausgelegt, daß die Stromaufnahme 10 µA nicht überschreitet. Der Stromverbrauch wird im wesentlichen durch den Ruhestrom, der durch die Transistoren Q3 und Q5 fließt, bestimmt. Bestimmend für den Ruhestrom sind die beiden Widerstände R2 und R6 sowie die Schaltschwellen der Transistoren Q3 und Q5. Es ergibt sich z.B. folgende Rechnung: I=(UBatt-UQ3,Q4)/(R2+R6) = (12V-5V)/1,36 MOhm ~ 5,14 µA The Colpitts oscillator is designed so that the current consumption does not exceed 10 µA. Current consumption is essentially determined by the quiescent current flowing through transistors Q3 and Q5. The two resistors R2 and R6 and the switching thresholds of the transistors Q3 and Q5 are decisive for the quiescent current. The following calculation results, for example: I = (U Batt -U Q3, Q4 ) / (R2 + R6) = (12V-5V) / 1.36 MOhm ~ 5.14 µA

Der Schaltkreis zum Einstellen des Arbeitspunktes des Oszillators 1 im ruhenden Zustand des Münzprüfers weist einen Transistor Q1, der als pnp-Transistor ausgebildet ist, auf. Der Emitter des Transistors Q1 ist an Batteriespannung angeschlossen, während der Kollektor mit dem Sourceanschluß des FETs Q3 verbunden ist. Die Basis des Transistors Q1 als Steuerelektrode liegt einerseits über einen Kondensator C1 an der Batteriespannung und ist andererseits über einen Widerstand R3, der zur Einstellung des Basisstroms dient, mit einem Widerstand R1 verbunden, wobei der Widerstand R1 mit seinem anderen Anschluß gleichfalls an Batteriespannung liegt. Dabei ist der Widerstandswert von R1 sehr viel größer als der von R3. The circuit for setting the operating point of the Oscillator 1 in the idle state of the coin validator has a transistor Q1, the pnp transistor is trained on. The emitter of transistor Q1 is connected to battery voltage during the Collector connected to the source of the FET Q3 is. The base of transistor Q1 as a control electrode is present on the one hand via a capacitor C1 the battery voltage and on the other hand is about one Resistor R3, which is used to set the base current serves, connected to a resistor R1, the Resistor R1 with its other terminal as well is due to battery voltage. Here is the resistance value of R1 is much larger than that of R3.

Der zweite Schaltkreis 3 zum Ansteuern des elektronischen Schaltelementes Q4 weist eine Diode D1, vorzugsweise eine Schottky-Diode auf, deren Anode mit dem Ausgang des Oszillators 1 und deren Kathode mit dem Gate-Anschluß eines MOS-FETs Q2 verbunden ist. Parallel zur Diode D1 liegt ein Widerstand R4. Die Source-Elektrode des FETs Q2 ist mit dem Verbindungspunkt zwischen Widerstand R3 und Widerstand R1 des ersten Schaltkreises 2 verbunden und die Drain-Elektrode ist sowohl an einen Widerstand R5 als auch an den Gate-Anschluß des gleichfalls als MOS-FET ausgebildeten elektronischen Schaltelementes Q4 angeschlossen. Der andere Anschluß des Widerstandes R5 liegt auf Masse. Das Substrat des MOS-FETs Q2 ist an die Batteriespannung angeschlossen. Die Source-Elektrode des FETs Q4 bildet den Ausgang für das Einschaltsignal und die Drain-Elektrode sowie das Substrat liegen auf Masse.The second circuit 3 for driving the electronic Switching element Q4 has a diode D1, preferably a Schottky diode, the anode of which the output of the oscillator 1 and its cathode is connected to the gate terminal of a MOS-FET Q2. A resistor R4 is connected in parallel with the diode D1. The Source of FET Q2 is at the connection point between resistor R3 and resistor R1 of the first circuit 2 connected and the drain electrode is connected to a resistor R5 as well to the gate terminal of the MOS-FET electronic switching element Q4 connected. The other terminal of resistor R5 lies on ground. The MOS-FET Q2 substrate is on the battery voltage connected. The source electrode of the FET Q4 forms the output for the switch-on signal and the drain electrode and the substrate lie on ground.

Die Funktionsweise der in der Figur dargestellten Schaltungsanordnung ist wie folgt. Wenn die Schaltungsanordnung an Spannung, d.h. an Batteriespannung gelegt wird, liegt der Arbeitspunkt des Oszillators 1 mittig zur Betriebsspannung, d.h. Batteriespannung und ergibt sich aus den beiden gleichen Widerständen R2 und R6. Der Oszillator liefert an seinem Ausgang eine mit der Gleichspannung UBatt/2 überlagerte Wechselspannung, die über die Diode D1 gleichgerichtet wird, wodurch an der Gate-Elektrode des nachfolgenden MOS-Transistors Q2 ein Gleichspannungspotential von etwa UBatt/2 plus U~Spitze liegt. Da diese Gleichspannung deutlich unter der Betriebsspannung liegt, wird der MOS-Transistor Q2 leitend, wodurch ein Spannungsabfall über den Widerstand R1 und über den Widerstand R5 auftritt. The functioning of the circuit arrangement shown in the figure is as follows. If the circuit arrangement is connected to voltage, ie to battery voltage, the operating point of oscillator 1 is centered on the operating voltage, ie battery voltage, and results from the two identical resistors R2 and R6. At its output, the oscillator supplies an alternating voltage superimposed with the direct voltage U Batt / 2, which is rectified via the diode D1, as a result of which a direct voltage potential of approximately U Batt / 2 plus U ~ peak is present at the gate electrode of the subsequent MOS transistor Q2 , Since this DC voltage is significantly below the operating voltage, the MOS transistor Q2 becomes conductive, as a result of which a voltage drop occurs across the resistor R1 and across the resistor R5.

Dadurch lädt sich der Kondensator C1 auf und sobald seine Spannung die Schaltschwelle des Transistors Q1 erreicht hat, wird letzterer leitend. Dadurch wird der Arbeitspunkt des Oszillators 1 verstellt, d.h. der Arbeitspunkt wird zur Batteriespannung hin verschoben. Dadurch verschiebt sich auch die Ausgangsspannung des Oszillators 1, d.h. die Amplitude bleibt gleich, aber die Mittenspannung wird verschoben, wodurch das Gleichspannungspotential am Gate des MOS-Transistors Q2 ansteigt. Mit steigender Gate-Spannung sperrt der MOS-Transistor Q2 teilweise, d.h. der Drain Source Widerstand ändert sich und damit nimmt auch der Spannungsabfall über R1 ab, bis sich ein Spannungswert von ca. 500 mV am Widerstand R1 eingestellt hat, der der Emitter-Basisspannung des Transistors Q1 entspricht. Der MOS-FET Q2 arbeitet jetzt als Konstant-Stromquelle, wobei der Strom über den Widerstand R1, den MOS-FET Q2 und den Widerstand R5 durch R1 bzw. durch die Emitter-Basisspannung des Transistors Q1 bestimmt wird. Dabei ist der Widerstand R5 so dimensioniert, daß der Spannungsabfall an den Widerstand R5 die Schaltschwelle des MOS-Transistors Q4 nicht überschreitet. Die Schaltungen 2 und 3 arbeiten als Regler, der dafür sorgt, daß der Strom durch R1 und R5 konstant bleibt.As a result, the capacitor C1 charges and as soon as its voltage is the switching threshold of transistor Q1 the latter becomes the leader. This will the operating point of the oscillator 1 is adjusted, i.e. the operating point is shifted towards the battery voltage. This also shifts the output voltage of oscillator 1, i.e. the amplitude remains the same, but the center tension is shifted, causing the DC voltage potential at the gate of the MOS transistor Q2 increases. With increasing gate voltage MOS transistor Q2 partially blocks, i.e. the Drain source resistance changes and thus decreases also the voltage drop across R1 decreases until a Voltage value of approx. 500 mV set on resistor R1 has that of the emitter base voltage of the transistor Q1 corresponds. The MOS-FET Q2 is now working as a constant current source, the current over the Resistor R1, MOS-FET Q2 and resistor R5 by R1 or by the emitter base voltage of the Transistor Q1 is determined. There is resistance R5 dimensioned so that the voltage drop on the resistor R5 the switching threshold of the MOS transistor Does not exceed Q4. The circuits 2 and 3 work as a controller that ensures that the Current through R1 and R5 remains constant.

Der so eingestellte Zustand ist der Ruhezustand der Schaltungsanordnung, d.h. der Münzprüfer ist im Wartezustand und wartet auf den Einwurf einer Münze. Durch die Schaltungsanordnung wird ein stabiler Arbeitspunkt in diesem Zustand gewährleistet, wobei alle Bauelementetoleranzen ausgeglichen sind.The state set in this way is the idle state of the Circuit arrangement, i.e. the coin validator is on hold and waits for a coin to be inserted. The circuit arrangement makes a stable operating point guaranteed in this condition, with all Component tolerances are balanced.

Wird nun ein Metallgegenstand in die Nähe der Spule L1 des Oszillators 1 gebracht, d.h. wird eine Münze eingeworfen, so wird die Schwingung des Oszillators 1 gedämpft, wodurch die Amplitude der Wechselspannung kleiner wird. Dadurch sperrt die Diode T1 und leitet nicht mehr, wodurch die Kapazität der Gate-Elektrode des MOS-FETs Q2 sich über den Widerstand R4 entlädt. Die kleiner werdende Gatespannung erzeugt einen höheren Strom durch den Transistor Q2 und somit einen höheren Spannungsabfall am Widerstand R5. Dadurch wird die Schaltschwelle des Transistors Q4 überschritten, wodurch der Transistor Q4 nach GND oder Masse schaltet und ein Ausgangssignal, d.h. ein Einschaltsignal für die elektronischen Schaltkreise des Münzprüfers erzeugt. Die Schaltungsparameter der Schaltungsanordnung sind dabei so bemessen, daß die Spannungsänderung am Transistor Q2 relativ schnell auftritt. Dies ist notwendig, damit der Kondensator C1 die Spannung für den Transistor Q1 hält und sich nicht entlädt. Der Kondensator C1 verhindert somit, daß sich der Arbeitspunkt des Oszillators 1 über den Transistor Q1 nachstellt, d.h. durch den Kondensator C1 wird eine spontane Nachregelung verhindert, da ansonsten kein Ausgangssignal vom Transistor Q4 erzeugt würde.Now a metal object is near the coil L1 of oscillator 1 brought, i.e. becomes a coin thrown in, the oscillation of the oscillator 1 damped, reducing the amplitude of the AC voltage gets smaller. As a result, the diode T1 blocks and conducts no longer, increasing the capacity of the gate electrode of the MOS-FET Q2 discharges through the resistor R4. The decreasing gate voltage creates a higher one Current through transistor Q2 and thus a higher one Voltage drop across resistor R5. This will the switching threshold of transistor Q4 exceeded, whereby transistor Q4 switches to GND or ground and an output signal, i.e. a switch-on signal for the electronic circuits of the coin validator generated. The circuit parameters of the circuit arrangement are dimensioned so that the voltage change occurs relatively quickly at transistor Q2. This is necessary so that the capacitor C1 the voltage holds for the transistor Q1 and does not discharge. The capacitor C1 thus prevents the operating point of the oscillator 1 through the transistor Q1 adjusts, i.e. through the capacitor C1 is a spontaneous readjustment prevented, otherwise none Output signal from transistor Q4 would be generated.

Nach dem Einwurf der Münze nimmt der Oszillator wiederum seinen stabilen Arbeitspunkt ein und der MOS-Transistor Q2 wirkt wieder als Konstant-Stromquelle.After inserting the coin, the oscillator takes again its stable operating point and the MOS transistor Q2 again acts as a constant current source.

Claims (13)

Schaltungsanordnung zur Erzeugung eines Einschaltsignals für batteriebetriebene Münzprüfer mit einem eine Spule zur Erfassung des Einwerfens einer Münze aufweisenden Oszillator, dessen Ausgangssignal sich durch die Münze ändert, und mit einem ersten elektronischen Schaltelement, das bei Einwurf der Münze durch Änderung seiner Steuerspannung das Einschaltsignal abgibt, dadurch gekennzeichnet, daß ein erster Schaltkreis (2) zum Einstellen des Arbeitspunktes des Oszillators (1) im ruhenden Zustand des Münzprüfers und ein zweiter, mit dem Ausgang des Oszillators verbundener, ein zweites elektronisches Schaltelement (Q2) aufweisender Schaltkreis (3) vorgesehen sind, wobei der erste und zweite Schaltkreis (2, 3) so miteinander verbunden sind, daß das zweite Schaltelement (Q2) im ruhenden Zustand des Münzprüfers als Konstant-Stromquelle wirkt, und daß bei Einwurf einer Münze der Strom durch das zweite Schaltelemente (Q2) sich abhängig von der Ausgangsspannung des Oszillators (1) derart ändert, daß das erste, mit dem zweiten Schaltelement (Q2) verbundene Schaltelement (Q4) schaltet und das Einschaltsignal liefert.Circuitry for generating a switch-on signal for battery-powered coin validator with a a coil for detecting the Einwerfens a coin having oscillator whose output signal is changed by the coin, and with a first electronic switching element by changing its control voltage outputs the turn upon insertion of the coin, characterized characterized in that a first circuit (2) for setting the operating point of the oscillator (1) in the idle state of the coin validator and a second circuit (3) having a second electronic switching element (Q2) connected to the output of the oscillator are provided, whereby the first and second circuits (2, 3) are connected to one another in such a way that the second switching element (Q2) acts as a constant current source when the coin validator is at rest, and that the current through the second switching elements (Q2) depends on the insertion of a coin from the output voltage of the oscillator (1) changes such that the first switching element (Q4) connected to the second switching element (Q2) switches and supplies the switch-on signal. Schaltungsanordnung nach Anspruch 1, dadurch gekennzeichnet, daß die Steuerelektrode des zweiten Schaltelementes (Q2) über eine Diode (D1) an den Ausgang des Oszillators (1) geschaltet ist. Circuit arrangement according to Claim 1, characterized in that the control electrode of the second switching element (Q2) is connected to the output of the oscillator (1) via a diode (D1). Schaltungsanordnung nach Anspruch 2, dadurch gekennzeichnet, daß die Diode (D1) so bemessen ist, daß sie bei Änderung der Ausgangsspannung des Oszillators (1) durch Anwesenheit einer Münze sperrt.Circuit arrangement according to Claim 2, characterized in that the diode (D1) is dimensioned such that it blocks when the output voltage of the oscillator (1) changes due to the presence of a coin. Schaltungsanordnung nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß der erste Schaltkreis (2) einen Transistor aufweist, über den die Arbeitspunkteinstellung des Oszillators (1) für den ruhenden Zustand des Münzprüfers aktivierbar ist.Circuit arrangement according to one of Claims 1 to 3, characterized in that the first circuit (2) has a transistor via which the operating point setting of the oscillator (1) can be activated for the idle state of the coin validator. Schaltungsanordnung nach Anspruch 4, dadurch gekennzeichnet, daß der Transistor (Q1) nach Anlegen der Batteriespannung geschaltet wird, wobei die über die Diode (D1) am Ausgang des Oszillators liegende Steuerelektrode des zweiten Schaltelementes (Q2) dieses leitend steuert, und der Transistor (Q1) aufgrund des dadurch fließenden Stroms schaltet.Circuit arrangement according to Claim 4, characterized in that the transistor (Q1) is switched after application of the battery voltage, the control electrode of the second switching element (Q2) located at the output of the oscillator and controlling the diode (D1) controlling the latter, and the transistor (Q1 ) switches due to the current flowing through it. Schaltungsanordnung nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, daß der erste Schaltkreis (2) eine mit der Steuerelektrode des Transistors (Q1) verbundene und an die Batteriespannung angeschlossene Parallelschaltung eines Kondensators (C1) und eines Widerstandes (R1) aufweist.Circuit arrangement according to one of Claims 1 to 5, characterized in that the first circuit (2) has a parallel connection of a capacitor (C1) and a resistor (R1) connected to the control electrode of the transistor (Q1) and connected to the battery voltage. Schaltungsanordnung nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet, daß bei nicht aktiviertem ersten Schaltkreis (2) der Arbeitspunkt des Oszillators (1) mittig zur Batteriespannung liegt.Circuit arrangement according to one of claims 1 to 6, characterized in that when the first circuit (2) is not activated, the operating point of the oscillator (1) is centered on the battery voltage. Schaltungsanordnung nach einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, daß in Reihe zur Schaltstrecke des zweiten Schaltelementes (Q2) ein die Schaltschwelle des ersten Schaltelementes (Q4) vorgebender Widerstand geschaltet ist.Circuit arrangement according to one of Claims 1 to 7, characterized in that a resistor which specifies the switching threshold of the first switching element (Q4) is connected in series with the switching path of the second switching element (Q2). Schaltungsanordnung nach einem der Ansprüche 1 bis 8, dadurch gekennzeichnet, daß in Reihe mit der Schaltstrecke des zweiten Schaltelementes (Q2) die Parallelschaltung aus Kondensator (C1) und Widerstand (R1) des ersten Schaltkreises (2) geschaltet ist.Circuit arrangement according to one of claims 1 to 8, characterized in that the parallel connection of capacitor (C1) and resistor (R1) of the first circuit (2) is connected in series with the switching path of the second switching element (Q2). Schaltungsanordnung nach einem der Ansprüche 1 bis 9, dadurch gekennzeichnet, daß das erste und/oder zweite Schaltelement (Q2, Q4) als Feldeffekttransistor vorzugsweise als MOS-Feldeffekttransistor ausgebildet sind.Circuit arrangement according to one of claims 1 to 9, characterized in that the first and / or second switching element (Q2, Q4) are designed as a field effect transistor, preferably as a MOS field effect transistor. Schaltungsanordnung nach einem der Ansprüche 1 bis 10, dadurch gekennzeichnet, daß der Oszillator ein Colpitts-Oszillator ist.Circuit arrangement according to one of claims 1 to 10, characterized in that the oscillator is a Colpitts oscillator. Schaltungsanordnung nach einem der Ansprüche 1 bis 11, dadurch gekennzeichnet, daß parallel zur Diode (D1) ein Widerstand (R4) geschaltet ist, über den die Kapazität der Steuerelektrode des zweiten Schaltelementes (Q2) bei Sperren der Diode (D1) entladbar ist.Circuit arrangement according to one of Claims 1 to 11, characterized in that a resistor (R4) is connected in parallel with the diode (D1), via which the capacitance of the control electrode of the second switching element (Q2) can be discharged when the diode (D1) is blocked. Schaltungsanordnung nach einem der Ansprüche 1 bis 12, dadurch gekennzeichnet, daß der Kondensator (C1) des ersten Schaltkreises (1) so bemessen ist, daß bei Einwurf einer Münze und resultierender Spannungsänderung am zweiten Schaltelement (Q2) eine Nachstellung des Arbeitspunktes des Oszillators (1) über einen bestimmten Zeitraum verhindert wird.Circuit arrangement according to one of Claims 1 to 12, characterized in that the capacitor (C1) of the first circuit (1) is dimensioned such that when a coin is inserted and the voltage on the second switching element (Q2) changes, the operating point of the oscillator (1 ) is prevented for a certain period of time.
EP01250342A 2000-09-29 2001-09-27 Switching circuit for generating a switch-on signal for battery-powered coin testers Expired - Lifetime EP1193656B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10049758A DE10049758B4 (en) 2000-09-29 2000-09-29 Circuit arrangement for generating a switch-on signal for battery-operated coin validators
DE10049758 2000-09-29

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EP1193656A2 true EP1193656A2 (en) 2002-04-03
EP1193656A3 EP1193656A3 (en) 2005-02-02
EP1193656B1 EP1193656B1 (en) 2007-12-12

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AT (1) ATE381147T1 (en)
DE (2) DE10049758B4 (en)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8532710B2 (en) 2006-09-01 2013-09-10 Blackberry Limited Integrated dialing

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0607624B1 (en) 1993-01-21 1996-02-07 National Rejectors Inc. GmbH Electrical switch-on sensor for battery powered coin tester

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3581105A (en) * 1968-09-23 1971-05-25 Bell & Howell Co Switching apparatus
US4105105A (en) * 1975-10-17 1978-08-08 Libandor Trading Corporation Inc. Method for checking coins and coin checking apparatus for the performance of the aforesaid method
GB2011086A (en) * 1977-10-13 1979-07-04 Skf Uk Ltd Improvements in or relating to inductive proximity detectors
CH676147A5 (en) * 1988-06-17 1990-12-14 Vibro Meter Ag
DE59010206D1 (en) * 1989-05-19 1996-04-25 Festo Kg Temperature stable inductive proximity switch
CH690950A5 (en) * 1996-06-13 2001-02-28 Optosys Ag Temperature-stabilized oscillator, and using the same in a proximity switch.

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0607624B1 (en) 1993-01-21 1996-02-07 National Rejectors Inc. GmbH Electrical switch-on sensor for battery powered coin tester

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8532710B2 (en) 2006-09-01 2013-09-10 Blackberry Limited Integrated dialing

Also Published As

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DE10049758B4 (en) 2004-07-22
ES2296704T3 (en) 2008-05-01
DE10049758A1 (en) 2002-04-18
EP1193656B1 (en) 2007-12-12
DE50113361D1 (en) 2008-01-24
ATE381147T1 (en) 2007-12-15
EP1193656A3 (en) 2005-02-02

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